PIC18F87k22 RTCC

/***  Include and Header files   ******************************************************************************/

  #include <xc.h>                 //by Microchip

    #include <p18f87K22.h>      //by Microchip

/***  Configuration PIC   *********************************************************************************/

// PIC18F87K22 Configuration Bit Settings

// Use project enums instead of #define for ON and OFF.

// PIC18F87K22 Configuration Bit Settings

// 'C' source line config statements

// #pragma config statements should precede project file includes.

// Use project enums instead of #define for ON and OFF.

// CONFIG1L

#pragma config RETEN = OFF      // VREG Sleep Enable bit (Disabled - Controlled by SRETEN bit)

#pragma config INTOSCSEL = HIGH // LF-INTOSC Low-power Enable bit (LF-INTOSC in High-power mode during Sleep)

#pragma config SOSCSEL = HIGH   // SOSC Power Selection and mode Configuration bits (High Power SOSC circuit selected)

#pragma config XINST = OFF      // Extended Instruction Set (Disabled)

// CONFIG1H

#pragma config FOSC = INTIO2    // Oscillator (Internal RC oscillator)

#pragma config PLLCFG = ON      // PLL x4 Enable bit (Enabled)

#pragma config FCMEN = OFF      // Fail-Safe Clock Monitor (Disabled)

#pragma config IESO = OFF       // Internal External Oscillator Switch Over Mode (Disabled)

// CONFIG2L

#pragma config PWRTEN = OFF     // Power Up Timer (Disabled)

#pragma config BOREN = SBORDIS  // Brown Out Detect (Enabled in hardware, SBOREN disabled)

#pragma config BORV = 3         // Brown-out Reset Voltage bits (1.8V)

#pragma config BORPWR = ZPBORMV // BORMV Power level (ZPBORMV instead of BORMV is selected)

// CONFIG2H

#pragma config WDTEN = SWDTDIS  // Watchdog Timer (WDT enabled in hardware; SWDTEN bit disabled)

#pragma config WDTPS = 1048576  // Watchdog Postscaler (1:1048576)

// CONFIG3L

#pragma config RTCOSC = 0       // RTCC Clock Select (RTCC uses SOSC)

#pragma config EASHFT = ON      // External Address Shift bit (Address Shifting enabled)

#pragma config ABW = MM         // Address Bus Width Select bits (8-bit address bus)

#pragma config BW = 16          // Data Bus Width (16-bit external bus mode)

#pragma config WAIT = OFF       // External Bus Wait (Disabled)

// CONFIG3H

#pragma config CCP2MX = PORTC   // CCP2 Mux (RC1)

#pragma config ECCPMX = PORTE   // ECCP Mux (Enhanced CCP1/3 [P1B/P1C/P3B/P3C] muxed with RE6/RE5/RE4/RE3)

#pragma config MSSPMSK = MSK7   // MSSP address masking (7 Bit address masking mode)

#pragma config MCLRE = ON       // Master Clear Enable (MCLR Enabled, RG5 Disabled)

// CONFIG4L

#pragma config STVREN = ON      // Stack Overflow Reset (Enabled)

#pragma config BBSIZ = BB2K     // Boot Block Size (2K word Boot Block size)

// CONFIG5L

#pragma config CP0 = OFF        // Code Protect 00800-03FFF (Disabled)

#pragma config CP1 = OFF        // Code Protect 04000-07FFF (Disabled)

#pragma config CP2 = OFF        // Code Protect 08000-0BFFF (Disabled)

#pragma config CP3 = OFF        // Code Protect 0C000-0FFFF (Disabled)

#pragma config CP4 = OFF        // Code Protect 10000-13FFF (Disabled)

#pragma config CP5 = OFF        // Code Protect 14000-17FFF (Disabled)

#pragma config CP6 = OFF        // Code Protect 18000-1BFFF (Disabled)

#pragma config CP7 = OFF        // Code Protect 1C000-1FFFF (Disabled)

// CONFIG5H

#pragma config CPB = OFF        // Code Protect Boot (Disabled)

#pragma config CPD = OFF        // Data EE Read Protect (Disabled)

// CONFIG6L

#pragma config WRT0 = OFF       // Table Write Protect 00800-03FFF (Disabled)

#pragma config WRT1 = OFF       // Table Write Protect 04000-07FFF (Disabled)

#pragma config WRT2 = OFF       // Table Write Protect 08000-0BFFF (Disabled)

#pragma config WRT3 = OFF       // Table Write Protect 0C000-0FFFF (Disabled)

#pragma config WRT4 = OFF       // Table Write Protect 10000-13FFF (Disabled)

#pragma config WRT5 = OFF       // Table Write Protect 14000-17FFF (Disabled)

#pragma config WRT6 = OFF       // Table Write Protect 18000-1BFFF (Disabled)

#pragma config WRT7 = OFF       // Table Write Protect 1C000-1FFFF (Disabled)

// CONFIG6H

#pragma config WRTC = OFF       // Config. Write Protect (Disabled)

#pragma config WRTB = OFF       // Table Write Protect Boot (Disabled)

#pragma config WRTD = OFF       // Data EE Write Protect (Disabled)

// CONFIG7L

#pragma config EBRT0 = OFF      // Table Read Protect 00800-03FFF (Disabled)

#pragma config EBRT1 = OFF      // Table Read Protect 04000-07FFF (Disabled)

#pragma config EBRT2 = OFF      // Table Read Protect 08000-0BFFF (Disabled)

#pragma config EBRT3 = OFF      // Table Read Protect 0C000-0FFFF (Disabled)

#pragma config EBRT4 = OFF      // Table Read Protect 10000-13FFF (Disabled)

#pragma config EBRT5 = OFF      // Table Read Protect 14000-17FFF (Disabled)

#pragma config EBRT6 = OFF      // Table Read Protect 18000-1BFFF (Disabled)

#pragma config EBRT7 = OFF      // Table Read Protect 1C000-1FFFF (Disabled)

// CONFIG7H

#pragma config EBRTB = OFF      // Table Read Protect Boot (Disabled)

/***  VARIABLES   *********************************************************************************/

        #define _XTAL_FREQ      4000000         //Fosc  frequency for _delay() library (4MHz)

/***  PRIVATE PROTOTYPES   ***********************************************************************/

void Init(void);      //Aufruf der Initialisierung vor Ausführung des main()

//******************************************************************************

//      MAIN PROGRAM

//******************************************************************************

void main(void)

{

  Init();        //Initialisierung

  while(1)      //Endlosschleife

  {

  }

}//end main();

//*********************************************************************************************

//      INITIALISIERUNG PIC

//*********************************************************************************************

void Init(void)

{

/***  SET VALUES OF VARIABLES   ***********************************************************/

/***  Set Inputs, Outputs   ***************************************************************/

//*//   All PINs with an * are free usable I/O PINs  //*//

    //PORTA A0-A5

  TRISAbits.TRISA0 = 1;    //set RA0 as INPUT    used for Taster 1

  TRISAbits.TRISA1 = 1;    //set RA1 as INPUT    used for Taster 2

  TRISAbits.TRISA2 = 1;    //set RA2 as INPUT    used for Taster 3

  TRISAbits.TRISA3 = 1;    //set RA3 as INPUT    used for Taster 4

  TRISAbits.TRISA4 = 1;    //set RA4 as INPUT    used for Taster 5

    TRISAbits.TRISA5 = 1;    //set RA5 as INPUT    used for Schalter 1

    //RA6 see the OSC2/CLKO/RA6 pin.

    //RA7 see the OSC1/CLKI/RA7 pin.

  //PORTB B0-B7

  TRISBbits.TRISB0 = 0;    //set RB0 as OUTPUT    used as BT-mode

  TRISBbits.TRISB6 = 1;    //set RB6 as INPUT    used as PGC

  TRISBbits.TRISB7 = 1;    //set RB7 as INPUT    used as PGD

  //PORTC C0-C7

    TRISCbits.TRISC6 = 0;    //set RC6 as OUTPUT    used as BT-UART TX

  TRISCbits.TRISC7 = 1;    //set RC7 as INPUT    used as BT-UART RX

    //PORTG G0-G4

  TRISGbits.TRISG4 = 0;    //set RG4 as OUTPUT    used for RTCC Pin

  //RG5 used as MCLR

    RTCWREN = 1;                //RTCC Value Registers Write Enable bit

                                //RTCVALH and RTCVALL registers can be written to by the user

    RTCEN = 1;                  //RTCC module is enabled

    RTCOE = 1;                  //RTCC clock output is enabled

    AMASK3 = 0;                 //Alarm Mask Configuration bits

    AMASK2 = 0;                 //set to: Every 10 seconds

    AMASK1 = 1;

    AMASK0 = 0;

    ARPT7 = 0;                  // ALARM REPEAT REGISTER

    ARPT6 = 0;

    ARPT5 = 0;

    ARPT4 = 1;

    ARPT3 = 1;

    ARPT2 = 1;

    ARPT1 = 1;

    ARPT0 = 1;

}//end Initialization();

/***  end of file  *********************************************************************************************/