Forum: FPGA, VHDL & Co. Lattice MachxO3 - LVDS invertieren


von Holger K. (holgerkraehe)


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Hallo zusammen

Ich habe bei meinem Board ausversehen P und N vertauscht.
Gibt es eine möglichkeit, die Polarität der LVDS-Paare direkt zu 
invertieren?

Danke!

von lvds-chef (Gast)


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In Hardware nicht, aber in Logik:

internal_signal <= not external_lvds_signal;

von Holger K. (holgerkraehe)


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lvds-chef schrieb:
> In Hardware nicht, aber in Logik:
>
> internal_signal <= not external_lvds_signal;
Leider mak diamond dies nicht:
1
ERROR - PAD signal LVDS_OUT_DATA_7 has illegal connections to block rgblvds_i/LVDS_OUT_DATA_7__I_0_1_lut. IO buffer is expected.
2
ERROR - PAD signal LVDS_OUT_DATA_6 has illegal connections to block rgblvds_i/LVDS_OUT_DATA_6__I_0_1_lut. IO buffer is expected.
3
ERROR - PAD signal LVDS_OUT_DATA_5 has illegal connections to block rgblvds_i/LVDS_OUT_DATA_5__I_0_1_lut. IO buffer is expected.
4
ERROR - PAD signal LVDS_OUT_DATA_4 has illegal connections to block rgblvds_i/LVDS_OUT_DATA_4__I_0_1_lut. IO buffer is expected.
5
ERROR - PAD signal LVDS_OUT_DATA_3 has illegal connections to block rgblvds_i/LVDS_OUT_DATA_3__I_0_1_lut. IO buffer is expected.
6
ERROR - PAD signal LVDS_OUT_DATA_2 has illegal connections to block rgblvds_i/LVDS_OUT_DATA_2__I_0_1_lut. IO buffer is expected.
7
ERROR - PAD signal LVDS_OUT_DATA_1 has illegal connections to block rgblvds_i/LVDS_OUT_DATA_1__I_0_1_lut. IO buffer is expected.
8
ERROR - PAD signal LVDS_OUT_DATA_0 has illegal connections to block rgblvds_i/LVDS_OUT_DATA_0__I_0_1_lut. IO buffer is expected.
9
INFO - Errors found in user's design.  Output files not written. Check map report for more details.

von Holger K. (holgerkraehe)


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ok habs gefixt. danke!

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