1 | #include <msp430.h>
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2 |
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3 | unsigned char TXData;
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4 | unsigned char TXByteCtr;
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5 |
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6 | int main(void)
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7 | {
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8 | WDTCTL = WDTPW | WDTHOLD; // Stop WDT
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9 | P3SEL |= 0x03; // Assign I2C pins to USCI_B0
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10 | // P3DIR |= 0x03;
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11 | UCB0CTL1 |= UCSWRST; // Enable SW reset
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12 | UCB0CTL0 = UCMST | UCMODE_3 | UCSYNC; // I2C Master, synchronous mode
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13 | UCB0CTL1 = UCSSEL_2 | UCSWRST; // Use SMCLK, keep SW reset
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14 | UCB0BR0 = 12; // fSCL = SMCLK/12 = ~100kHz
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15 | UCB0BR1 = 0;
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16 | UCB0I2CSA = 0x48; // Slave Address is 048h
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17 | UCB0CTL1 &= ~UCSWRST; // Clear SW reset, resume operation
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18 | UCB0IE |= UCTXIE; // Enable TX interrupt
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19 |
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20 | TXData = 0x31; // Holds TX data
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21 |
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22 | while (1)
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23 | {
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24 | TXByteCtr = 1; // Load TX byte counter
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25 |
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26 | //UCB0CTL1 |= UCTXSTP;
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27 | while (UCB0CTL1 & UCTXSTP); // Ensure stop condition got sent
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28 | UCB0CTL1 |= UCTR | UCTXSTT; // I2C TX, start condition
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29 |
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30 | __bis_SR_register(GIE); // Enter LPM0 w/ interrupts
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31 | __no_operation(); // Remain in LPM0 until all data
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32 | // is TX'd
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33 | if(TXData <= 0x39){
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34 | TXData++; // Increment data byte
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35 | }
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36 | else{
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37 | TXData = 0x21;
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38 | }
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39 | }
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40 | }
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41 |
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42 | //------------------------------------------------------------------------------
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43 | // The USCIAB0_ISR is structured such that it can be used to transmit any
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44 | // number of bytes by pre-loading TXByteCtr with the byte count.
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45 | //------------------------------------------------------------------------------
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46 | #pragma vector = USCI_B0_VECTOR
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47 | __interrupt void USCI_B0_ISR(void)
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48 | {
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49 | switch(__even_in_range(UCB0IV,12))
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50 | {
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51 | case 0: break; // Vector 0: No interrupts
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52 | case 2: break; // Vector 2: ALIFG
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53 | case 4: break; // Vector 4: NACKIFG
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54 | case 6: break; // Vector 6: STTIFG
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55 | case 8: break; // Vector 8: STPIFG
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56 | case 10: break; // Vector 10: RXIFG
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57 | case 12: // Vector 12: TXIFG
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58 | if (TXByteCtr) // Check TX byte counter
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59 | {
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60 | UCB0TXBUF = TXData; // Load TX buffer
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61 | TXByteCtr--; // Decrement TX byte counter
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62 | }
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63 | else
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64 | {
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65 | UCB0CTL1 |= UCTXSTP; // I2C stop condition
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66 | UCB0IFG &= ~UCTXIFG; // Clear USCI_B0 TX int flag
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67 | //__bis_SR_register_on_exit(LPM0_bits); // Exit LPM0
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68 | }
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69 | break;
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70 | default: break;
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71 | }
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72 | }
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