fsmc am stm32f4

// GPIO Init-Structure

  GPIO_InitTypeDef gpioInitStruct;

  // Enable GPIO D and E clocks

  RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOD | RCC_AHB1Periph_GPIOE, ENABLE);

  //Create GPIO D InitStructure for used pins

  gpioInitStruct.GPIO_Mode =    GPIO_Mode_AF;

  gpioInitStruct.GPIO_Speed =    GPIO_Speed_100MHz;

  gpioInitStruct.GPIO_OType =   GPIO_OType_PP;

  gpioInitStruct.GPIO_PuPd =    GPIO_PuPd_UP;

  gpioInitStruct.GPIO_Pin =    GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_4 | GPIO_Pin_5 | GPIO_Pin_7 | GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 | GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15;

  // Initialize Pins

  GPIO_Init(GPIOD, &gpioInitStruct);

  // Configure GPIO D pins as FSMC alternate functions

  GPIO_PinAFConfig(GPIOD, GPIO_PinSource0, GPIO_AF_FSMC);

  GPIO_PinAFConfig(GPIOD, GPIO_PinSource1, GPIO_AF_FSMC);

  GPIO_PinAFConfig(GPIOD, GPIO_PinSource4, GPIO_AF_FSMC);

  GPIO_PinAFConfig(GPIOD, GPIO_PinSource5, GPIO_AF_FSMC);

  GPIO_PinAFConfig(GPIOD, GPIO_PinSource7, GPIO_AF_FSMC);

  GPIO_PinAFConfig(GPIOD, GPIO_PinSource8, GPIO_AF_FSMC);

  GPIO_PinAFConfig(GPIOD, GPIO_PinSource9, GPIO_AF_FSMC);

  GPIO_PinAFConfig(GPIOD, GPIO_PinSource10, GPIO_AF_FSMC);

  GPIO_PinAFConfig(GPIOD, GPIO_PinSource11, GPIO_AF_FSMC);

  GPIO_PinAFConfig(GPIOD, GPIO_PinSource12, GPIO_AF_FSMC);

  GPIO_PinAFConfig(GPIOD, GPIO_PinSource13, GPIO_AF_FSMC);

  GPIO_PinAFConfig(GPIOD, GPIO_PinSource14, GPIO_AF_FSMC);

  GPIO_PinAFConfig(GPIOD, GPIO_PinSource15, GPIO_AF_FSMC);

  // Create GPIO E InitStructure for used pins

  gpioInitStruct.GPIO_Pin =    GPIO_Pin_3 | GPIO_Pin_4 | GPIO_Pin_5 | GPIO_Pin_6 | GPIO_Pin_7 | GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 | GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15;

  // Initialize pins

  GPIO_Init(GPIOE, &gpioInitStruct);

  //Configure GPIO E pins as FSMC alternate function

  GPIO_PinAFConfig(GPIOE, GPIO_PinSource3, GPIO_AF_FSMC);

  GPIO_PinAFConfig(GPIOE, GPIO_PinSource4, GPIO_AF_FSMC);

  GPIO_PinAFConfig(GPIOE, GPIO_PinSource5, GPIO_AF_FSMC);

  GPIO_PinAFConfig(GPIOE, GPIO_PinSource6, GPIO_AF_FSMC);

  GPIO_PinAFConfig(GPIOE, GPIO_PinSource7, GPIO_AF_FSMC);

  GPIO_PinAFConfig(GPIOE, GPIO_PinSource8, GPIO_AF_FSMC);

  GPIO_PinAFConfig(GPIOE, GPIO_PinSource9, GPIO_AF_FSMC);

  GPIO_PinAFConfig(GPIOE, GPIO_PinSource10, GPIO_AF_FSMC);

  GPIO_PinAFConfig(GPIOE, GPIO_PinSource11, GPIO_AF_FSMC);

  GPIO_PinAFConfig(GPIOE, GPIO_PinSource12, GPIO_AF_FSMC);

  GPIO_PinAFConfig(GPIOE, GPIO_PinSource13, GPIO_AF_FSMC);

  GPIO_PinAFConfig(GPIOE, GPIO_PinSource14, GPIO_AF_FSMC);

  GPIO_PinAFConfig(GPIOE, GPIO_PinSource15, GPIO_AF_FSMC);

FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure;

  FSMC_NORSRAMTimingInitTypeDef FSMC_NORSRAMTimingInitStructureRead;

  FSMC_NORSRAMTimingInitTypeDef FSMC_NORSRAMTimingInitStructureWrite;

  // Enable FSMC Clock

  RCC_AHB3PeriphClockCmd(RCC_AHB3Periph_FSMC, ENABLE);

  // Define Read timing parameters

  FSMC_NORSRAMTimingInitStructureRead.FSMC_AddressSetupTime = 0;

  FSMC_NORSRAMTimingInitStructureRead.FSMC_AddressHoldTime = 7;

  FSMC_NORSRAMTimingInitStructureRead.FSMC_DataSetupTime = 4;

  FSMC_NORSRAMTimingInitStructureRead.FSMC_BusTurnAroundDuration = 3;

  FSMC_NORSRAMTimingInitStructureRead.FSMC_CLKDivision = 2;

  FSMC_NORSRAMTimingInitStructureRead.FSMC_DataLatency = 1;

  FSMC_NORSRAMTimingInitStructureRead.FSMC_AccessMode = FSMC_AccessMode_A;

  // Define Write timing parameters

  FSMC_NORSRAMTimingInitStructureWrite.FSMC_AddressSetupTime = 0;

  FSMC_NORSRAMTimingInitStructureWrite.FSMC_AddressHoldTime = 6;

  FSMC_NORSRAMTimingInitStructureWrite.FSMC_DataSetupTime = 1;

  FSMC_NORSRAMTimingInitStructureWrite.FSMC_BusTurnAroundDuration = 3;

  FSMC_NORSRAMTimingInitStructureWrite.FSMC_CLKDivision = 2;

  FSMC_NORSRAMTimingInitStructureWrite.FSMC_DataLatency = 2;

  FSMC_NORSRAMTimingInitStructureWrite.FSMC_AccessMode = FSMC_AccessMode_A;

  // Define protocol type

  FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM1;

  FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;

  FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM;

  FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_8b;

  FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;

  FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable;

  FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_High; // Don't care

  FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;

  FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState; // Don't care

  FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;

  FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;

  FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Enable;

  FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;

  FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &FSMC_NORSRAMTimingInitStructureRead;

  FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &FSMC_NORSRAMTimingInitStructureWrite;

  // Initialize FSMC for read and write

  FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);

  // Enable FSMC

  FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM1, ENABLE);