1 | #include <avr/io.h>
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2 | #include <avr/interrupt.h>
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3 |
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4 | #include "rc5.h"
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5 |
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6 | #ifndef RC5_PRESCALE
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7 | #define RC5_PRESCALE 64
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8 | #endif /* RC5_PRESCALE */
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9 |
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10 | /* ******************************************************************************** */
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11 |
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12 | rc5_t rc5;
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13 |
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14 | /* ******************************************************************************** */
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15 |
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16 | #ifndef F_CPU
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17 | #error Please define F_CPU
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18 | #endif /* !F_CPU */
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19 |
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20 | /* µs for a whole bit of RC5 (first & second part) */
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21 | #define RC5_BIT_US (64*27)
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22 |
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23 | #define RC5_TICKS \
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24 | ((uint8_t) ((uint32_t) (F_CPU / 1000 * RC5_BIT_US / 1000 / RC5_PRESCALE)))
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25 |
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26 | #define RC5_DELTA \
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27 | (RC5_TICKS / 6)
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28 |
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29 | typedef union
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30 | {
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31 | uint16_t w;
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32 | uint8_t b[2];
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33 | } code_t;
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34 |
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35 | static code_t code;
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36 | static uint8_t rc5_addr;
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37 |
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38 | /* Number of Bits received so far */
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39 | /* Number of Interrupts occured so far */
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40 | static uint8_t nbits;
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41 | static uint8_t nint;
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42 |
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43 | /* ******************************************************************************** */
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44 |
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45 | void rc5_init (uint8_t addr)
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46 | {
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47 | nint = 0;
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48 | nbits = 0;
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49 | rc5.flip = -1;
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50 |
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51 | rc5_addr = addr;
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52 |
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53 | #if (RC5_PRESCALE==1024)
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54 | TCCR2 |= ((1 << CS22) | (1 << CS20) | (1 << CS21));
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55 | #elif (RC5_PRESCALE==256)
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56 | TCCR2 |= ((1 << CS22) | (1 << CS21));
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57 | #elif (RC5_PRESCALE==64)
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58 | TCCR2 |= (1 << CS22);
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59 | #else
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60 | #error This RC5_PRESCALE is not supported
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61 | #endif /* RC5_PRESCALE */
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62 |
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63 | /* INTx on falling edge */
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64 | /* clear pending INTx */
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65 | /* enable INTx interrupt */
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66 | MCUCR &= ~(1 << ISC2);
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67 | GIFR |= (1 << INTF2);
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68 | GICR |= (1 << INT2);
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69 | }
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70 |
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71 | /* ******************************************************************************** */
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72 |
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73 | ISR(TIMER2_OVF_vect)
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74 | {
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75 | TIMSK &= ~(1 << TOIE2);
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76 |
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77 | uint8_t _nbits = nbits;
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78 | code_t _code = code;
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79 |
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80 | if (26 == _nbits)
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81 | {
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82 | _nbits++;
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83 | _code.w <<= 1;
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84 | }
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85 |
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86 | if (27 == _nbits
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87 | && _code.b[1] >= 0x30 /* AGC == 3 */
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88 | && 0 > rc5.flip)
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89 | {
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90 | uint8_t _rc5_code;
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91 | uint8_t _rc5_addr;
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92 | /* we do the bit manipulation stuff by hand, because of code size */
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93 | _rc5_code = _code.b[0] & 0x3f; /* 0b00111111 : #0..#5 */
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94 | _code.w <<= 2;
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95 | _rc5_addr = _code.b[1] & 0x1f; /* 0b00011111 : #6..#10 */
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96 |
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97 | if ((rc5_addr & 0x80)
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98 | || rc5_addr == _rc5_addr)
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99 | {
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100 | rc5.code = _rc5_code;
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101 | rc5.addr = _rc5_addr;
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102 | signed char flip = 0;
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103 | if (_code.b[1] & 0x20) /* 0b00100000 : #11 */
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104 | flip = 1;
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105 | rc5.flip = flip;
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106 | }
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107 | }
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108 |
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109 | nint = 0;
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110 | nbits = 0;
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111 |
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112 | /* INTx on falling edge */
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113 | /* clear pending INTx */
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114 | /* enable INTx interrupt */
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115 |
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116 | MCUCR &= ~(1 << ISC2);
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117 | GIFR |= (1 << INTF2);
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118 | GICR |= (1 << INT2);
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119 |
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120 | }
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121 |
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122 | /* ******************************************************************************** */
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123 |
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124 |
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125 | ISR(INT2_vect)
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126 | {
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127 | code_t _code = code;
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128 | uint8_t _nint = nint;
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129 |
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130 | uint8_t tcnt0 = TCNT2;
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131 | TCNT2 = 0;
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132 |
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133 | if (0 == _nint)
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134 | {
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135 |
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136 | MCUCR &= ~(1 << ISC2);
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137 |
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138 | TIFR |= (1 << TOV2);
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139 | TIMSK |= (1 << TOIE2);
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140 | _code.w = 0;
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141 | }
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142 | else
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143 | {
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144 | /* Number of bits of the just elapsed period */
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145 | uint8_t n = 1;
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146 |
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147 | /* Bits received so far */
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148 | uint8_t _nbits = nbits;
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149 |
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150 | /* is TCNT0 close to RC5_TICKS or RC5_TICKS/2 ? */
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151 | if (tcnt0 > RC5_TICKS + RC5_DELTA)
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152 | goto invalid;
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153 | else if (tcnt0 < RC5_TICKS/2 - RC5_DELTA)
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154 | goto invalid;
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155 | else if (tcnt0 > RC5_TICKS - RC5_DELTA)
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156 | n = 2;
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157 | else if (tcnt0 > RC5_TICKS/2 + RC5_DELTA)
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158 | goto invalid;
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159 |
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160 | /* store the just received 1 or 2 bits */
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161 | do
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162 | {
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163 | _nbits++;
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164 | if (_nbits & 1)
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165 | {
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166 | _code.w <<= 1;
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167 | _code.b[0] |= _nint & 1;
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168 | }
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169 | }
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170 | while (--n);
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171 |
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172 | if (0)
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173 | {
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174 | invalid:
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175 |
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176 | /* disable INTx, run into Overflow0 */
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177 | GICR &= ~(1 << INT2);
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178 |
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179 | _nbits = 0;
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180 | }
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181 |
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182 | nbits = _nbits;
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183 | }
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184 |
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185 | code = _code;
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186 | nint = 1+_nint;
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187 | }
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