1 | #include "irmp.h"
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2 | #define F_CPU 8000000UL
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3 | #ifndef F_CPU
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4 | #error F_CPU unkown
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5 | #endif
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6 |
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7 | /*---------------------------------------------------------------------------------------------------------------------------------------------------
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8 | * ATMEL AVR part:
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9 | *---------------------------------------------------------------------------------------------------------------------------------------------------
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10 | */
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11 | #if defined (ATMEL_AVR)
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12 |
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13 | #define LED_PORT PORTD // LED at PD6
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14 | #define LED_DDR DDRD
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15 | #define LED_PIN 6
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16 |
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17 |
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18 | #include "irmp.h"
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19 | #define BAUD 9600L
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20 | #include <util/setbaud.h>
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21 |
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22 | #ifdef UBRR0H
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23 |
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24 | #define UART0_UBRRH UBRR0H
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25 | #define UART0_UBRRL UBRR0L
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26 | #define UART0_UCSRA UCSR0A
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27 | #define UART0_UCSRB UCSR0B
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28 | #define UART0_UCSRC UCSR0C
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29 | #define UART0_UDRE_BIT_VALUE (1<<UDRE0)
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30 | #define UART0_UCSZ1_BIT_VALUE (1<<UCSZ01)
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31 | #define UART0_UCSZ0_BIT_VALUE (1<<UCSZ00)
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32 | #ifdef URSEL0
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33 | #define UART0_URSEL_BIT_VALUE (1<<URSEL0)
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34 | #else
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35 | #define UART0_URSEL_BIT_VALUE (0)
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36 | #endif
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37 | #define UART0_TXEN_BIT_VALUE (1<<TXEN0)
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38 | #define UART0_UDR UDR0
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39 | #define UART0_U2X U2X0
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40 |
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41 | #else
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42 |
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43 | #define UART0_UBRRH UBRRH
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44 | #define UART0_UBRRL UBRRL
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45 | #define UART0_UCSRA UCSRA
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46 | #define UART0_UCSRB UCSRB
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47 | #define UART0_UCSRC UCSRC
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48 | #define UART0_UDRE_BIT_VALUE (1<<UDRE)
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49 | #define UART0_UCSZ1_BIT_VALUE (1<<UCSZ1)
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50 | #define UART0_UCSZ0_BIT_VALUE (1<<UCSZ0)
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51 | #ifdef URSEL
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52 | #define UART0_URSEL_BIT_VALUE (1<<URSEL)
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53 | #else
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54 | #define UART0_URSEL_BIT_VALUE (0)
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55 | #endif
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56 | #define UART0_TXEN_BIT_VALUE (1<<TXEN)
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57 | #define UART0_UDR UDR
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58 | #define UART0_U2X U2X
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59 |
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60 | #endif //UBRR0H
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61 |
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62 | static void
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63 | uart_init (void)
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64 | {
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65 | UART0_UBRRH = UBRRH_VALUE; // set baud rate
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66 | UART0_UBRRL = UBRRL_VALUE;
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67 |
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68 | #if USE_2X
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69 | UART0_UCSRA |= (1<<UART0_U2X);
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70 | #else
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71 | UART0_UCSRA &= ~(1<<UART0_U2X);
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72 | #endif
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73 |
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74 | UART0_UCSRC = UART0_UCSZ1_BIT_VALUE | UART0_UCSZ0_BIT_VALUE | UART0_URSEL_BIT_VALUE;
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75 | UART0_UCSRB |= UART0_TXEN_BIT_VALUE; // enable UART TX
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76 | }
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77 |
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78 | static void
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79 | uart_putc (unsigned char ch)
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80 | {
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81 | while (!(UART0_UCSRA & UART0_UDRE_BIT_VALUE))
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82 | {
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83 | ;
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84 | }
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85 |
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86 | UART0_UDR = ch;
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87 | }
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88 |
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89 | static void
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90 | uart_puts (char * s)
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91 | {
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92 | while (*s)
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93 | {
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94 | uart_putc (*s);
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95 | s++;
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96 | }
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97 | }
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98 |
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99 | static void
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100 | uart_puts_P (PGM_P s)
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101 | {
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102 | uint8_t ch;
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103 |
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104 | while ((ch = pgm_read_byte(s)) != '\0')
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105 | {
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106 | uart_putc (ch);
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107 | s++;
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108 | }
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109 | }
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110 |
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111 | static uint8_t
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112 | itox (uint8_t val)
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113 | {
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114 | uint8_t rtc;
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115 |
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116 | val &= 0x0F;
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117 |
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118 | if (val <= 9)
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119 | {
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120 | rtc = val + '0';
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121 | }
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122 | else
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123 | {
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124 | rtc = val - 10 + 'A';
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125 | }
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126 | return (rtc);
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127 | }
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128 |
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129 | static void
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130 | itoxx (char * xx, unsigned char i)
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131 | {
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132 | *xx++ = itox (i >> 4);
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133 | *xx++ = itox (i & 0x0F);
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134 | *xx = '\0';
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135 | }
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136 |
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137 | static void
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138 | timer1_init (void)
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139 | {
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140 | #if defined (__AVR_ATtiny45__) || defined (__AVR_ATtiny85__) // ATtiny45 / ATtiny85:
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141 |
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142 | #if F_CPU >= 16000000L
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143 | OCR1C = (F_CPU / F_INTERRUPTS / 8) - 1; // compare value: 1/15000 of CPU frequency, presc = 8
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144 | TCCR1 = (1 << CTC1) | (1 << CS12); // switch CTC Mode on, set prescaler to 8
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145 | #else
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146 | OCR1C = (F_CPU / F_INTERRUPTS / 4) - 1; // compare value: 1/15000 of CPU frequency, presc = 4
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147 | TCCR1 = (1 << CTC1) | (1 << CS11) | (1 << CS10); // switch CTC Mode on, set prescaler to 4
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148 | #endif
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149 |
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150 | #else // ATmegaXX:
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151 | OCR1A = (F_CPU / F_INTERRUPTS) - 1; // compare value: 1/15000 of CPU frequency
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152 | TCCR1B = (1 << WGM12) | (1 << CS10); // switch CTC Mode on, set prescaler to 1
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153 | #endif
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154 |
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155 | #ifdef TIMSK1
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156 | TIMSK1 = 1 << OCIE1A; // OCIE1A: Interrupt by timer compare
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157 | #else
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158 | TIMSK = 1 << OCIE1A; // OCIE1A: Interrupt by timer compare
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159 | #endif
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160 | }
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161 |
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162 | #ifdef TIM1_COMPA_vect // ATtiny84
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163 | #define COMPA_VECT TIM1_COMPA_vect
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164 | #else
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165 | #define COMPA_VECT TIMER1_COMPA_vect // ATmega
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166 | #endif
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167 |
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168 | ISR(COMPA_VECT) // Timer1 output compare A interrupt service routine, called every 1/15000 sec
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169 | {
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170 | (void) irmp_ISR(); // call irmp ISR
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171 | // call other timer interrupt routines...
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172 | }
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173 |
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174 |
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175 | /*-----------------------------------------------------------------------------------------------------------------------
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176 | * Called (back) from IRMP module
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177 | * This example switches a LED (which is connected to Vcc)
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178 | *-----------------------------------------------------------------------------------------------------------------------
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179 | */
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180 | void
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181 | led_callback (uint8_t on)
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182 | {
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183 | if (on)
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184 | {
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185 | LED_PORT &= ~ (1 << LED_PIN);
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186 | }
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187 | else
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188 | {
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189 |
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190 | LED_PORT |=(1 << LED_PIN);
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191 | }
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192 | }
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193 | /*-----------------------------------------------------------------------------------------------------------------------*/
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194 |
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195 | int main (void)
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196 | {
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197 |
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198 |
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199 | IRMP_DATA irmp_data;
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200 | char buf[3];
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201 |
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202 | if (irmp_get_data (&irmp_data))
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203 | {
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204 | if (irmp_data.protocol == IRMP_NEC_PROTOCOL ||IRMP_NEC42_PROTOCOL || IRMP_NEC16_PROTOCOL) // NEC-Protokoll && Adresse 0x1234
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205 | {
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206 |
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207 | DDRD=0xFF;
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208 |
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209 | PORTD=0b10000000; //Blinke, wenn du was erkennst...
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210 | _delay_ms(1000);
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211 | PORTD=0b00000000;
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212 | _delay_ms(1000);
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213 |
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214 |
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215 | // switch (irmp_data.command)
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216 | // {
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217 | // case 0x0001: key1_pressed(); break; // Taste 1
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218 | // case 0x0002: key2_pressed(); break; // Taste 2
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219 | // ...
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220 | // case 0x0009: key9_pressed(); break; // Taste 9
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221 | // }
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222 | }
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223 | }
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224 |
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225 | irmp_init(); // initialize irmp
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226 |
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227 | LED_DDR |= (1 << LED_PIN); // LED pin to output
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228 | LED_PORT |= (1 << LED_PIN); // switch LED off (active low)
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229 | irmp_set_callback_ptr (led_callback);
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230 |
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231 | timer1_init(); // initialize timer1
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232 | uart_init(); // initialize uart
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233 |
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234 | sei (); // enable interrupts
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235 |
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236 | for (;;)
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237 | {
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238 | if (irmp_get_data (&irmp_data))
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239 | {
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240 | uart_puts_P (PSTR("protocol: 0x"));
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241 | itoxx (buf, irmp_data.protocol);
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242 | uart_puts (buf);
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243 |
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244 | #if IRMP_PROTOCOL_NAMES == 1
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245 | uart_puts_P (PSTR(" "));
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246 | uart_puts_P (pgm_read_word (&(irmp_protocol_names[irmp_data.protocol])));
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247 | #endif
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248 |
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249 | uart_puts_P (PSTR(" address: 0x"));
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250 | itoxx (buf, irmp_data.address >> 8);
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251 | uart_puts (buf);
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252 | itoxx (buf, irmp_data.address & 0xFF);
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253 | uart_puts (buf);
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254 |
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255 | uart_puts_P (PSTR(" command: 0x"));
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256 | itoxx (buf, irmp_data.command >> 8);
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257 | uart_puts (buf);
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258 | itoxx (buf, irmp_data.command & 0xFF);
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259 | uart_puts (buf);
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260 |
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261 | uart_puts_P (PSTR(" flags: 0x"));
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262 | itoxx (buf, irmp_data.flags);
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263 | uart_puts (buf);
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264 |
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265 | uart_puts_P (PSTR("\r\n"));
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266 | }
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267 | }
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268 | }
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269 |
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270 | /*---------------------------------------------------------------------------------------------------------------------------------------------------
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271 | * LM4F120 Launchpad (ARM Cortex M4):
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272 | *---------------------------------------------------------------------------------------------------------------------------------------------------
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273 | */
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274 | #elif defined(STELLARIS_ARM_CORTEX_M4)
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275 |
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276 | void
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277 | timer1_init (void)
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278 | {
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279 | SysCtlPeripheralEnable(SYSCTL_PERIPH_TIMER1);
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280 | TimerConfigure(TIMER1_BASE, TIMER_CFG_32_BIT_PER);
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281 |
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282 | TimerLoadSet(TIMER1_BASE, TIMER_A, (F_CPU / F_INTERRUPTS) -1);
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283 | IntEnable(INT_TIMER1A);
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284 | TimerIntEnable(TIMER1_BASE, TIMER_TIMA_TIMEOUT);
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285 | TimerEnable(TIMER1_BASE, TIMER_A);
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286 | // Important: Timer1IntHandler has to be configured in startup_ccs.c !
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287 | }
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288 |
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289 | void
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290 | Timer1IntHandler(void) // Timer1 Interrupt Handler
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291 | {
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292 | (void) irmp_ISR(); // call irmp ISR
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293 | // call other timer interrupt routines...
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294 | }
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295 |
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296 | int
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297 | main (void)
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298 | {
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299 | IRMP_DATA irmp_data;
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300 |
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301 | ROM_FPUEnable();
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302 | ROM_FPUStackingEnable();
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303 | ROM_SysCtlClockSet(SYSCTL_SYSDIV_5|SYSCTL_USE_PLL|SYSCTL_XTAL_16MHZ|SYSCTL_OSC_MAIN);
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304 |
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305 | irmp_init(); // initialize irmp
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306 | timer1_init(); // initialize timer1
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307 | sei (); // enable interrupts
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308 |
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309 | for (;;)
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310 | {
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311 | if (irmp_get_data (&irmp_data))
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312 | {
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313 | // ir signal decoded, do something here...
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314 | // irmp_data.protocol is the protocol, see irmp.h
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315 | // irmp_data.address is the address/manufacturer code of ir sender
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316 | // irmp_data.command is the command code
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317 | // irmp_protocol_names[irmp_data.protocol] is the protocol name (if enabled, see irmpconfig.h)
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318 | }
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319 | }
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320 | }
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321 |
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322 | /*---------------------------------------------------------------------------------------------------------------------------------------------------
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323 | * PIC18F4520 with XC8 compiler:
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324 | *---------------------------------------------------------------------------------------------------------------------------------------------------
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325 | */
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326 | #elif defined (__XC8)
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327 |
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328 | #define _XTAL_FREQ 32000000UL // 32MHz clock
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329 | #define FOSC _XTAL_FREQ
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330 | #define FCY FOSC / 4UL // --> 8MHz
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331 |
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332 | #define BAUDRATE 19200UL
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333 | #define BRG (( FCY 16 BAUDRATE ) -1UL)
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334 |
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335 | #include <stdio.h>
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336 | #include <stdlib.h>
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337 |
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338 | int
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339 | main (void)
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340 | {
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341 | IRMP_DATA irmp_data;
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342 |
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343 | irmp_init(); // initialize irmp
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344 |
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345 | // infinite loop, interrupts will blink PORTD pins and handle UART communications.
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346 | while (1)
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347 | {
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348 | LATBbits.LATB0 = ~LATBbits.LATB0;
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349 |
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350 | if (irmp_get_data (&irmp_data))
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351 | {
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352 | // ir signal decoded, do something here...
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353 | // irmp_data.protocol is the protocol, see irmp.h
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354 | // irmp_data.address is the address/manufacturer code of ir sender
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355 | // irmp_data.command is the command code
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356 | // irmp_protocol_names[irmp_data.protocol] is the protocol name (if enabled, see irmpconfig.h)
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357 | printf("proto %d addr %d cmd %d\n", irmp_data.protocol, irmp_data.address, irmp_data.command );
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358 | }
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359 | }
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360 | }
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361 |
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362 | void interrupt high_priority high_isr(void)
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363 | {
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364 | if (TMR2IF)
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365 | {
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366 | TMR2IF = 0; // clear Timer 0 interrupt flag
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367 | irmp_ISR();
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368 | }
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369 | }
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370 |
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371 | /*---------------------------------------------------------------------------------------------------------------------------------------------------
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372 | * STM32:
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373 | *---------------------------------------------------------------------------------------------------------------------------------------------------
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374 | */
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375 | #elif defined(ARM_STM32)
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376 |
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377 | uint32_t
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378 | SysCtlClockGet(void)
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379 | {
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380 | RCC_ClocksTypeDef RCC_ClocksStatus;
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381 | RCC_GetClocksFreq(&RCC_ClocksStatus);
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382 | return RCC_ClocksStatus.SYSCLK_Frequency;
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383 | }
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384 |
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385 | void
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386 | timer2_init (void)
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387 | {
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388 | TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
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389 | NVIC_InitTypeDef NVIC_InitStructure;
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390 | RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2, ENABLE);
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391 |
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392 | TIM_TimeBaseStructure.TIM_ClockDivision = TIM_CKD_DIV1;
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393 | TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
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394 | TIM_TimeBaseStructure.TIM_Period = 7;
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395 | TIM_TimeBaseStructure.TIM_Prescaler = ((F_CPU / F_INTERRUPTS)/8) - 1;
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396 | TIM_TimeBaseInit(TIM2, &TIM_TimeBaseStructure);
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397 |
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398 | TIM_ITConfig(TIM2, TIM_IT_Update, ENABLE);
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399 |
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400 | NVIC_InitStructure.NVIC_IRQChannel = TIM2_IRQn;
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401 | NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
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402 | NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0x0F;
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403 | NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0x0F;
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404 | NVIC_Init(&NVIC_InitStructure);
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405 |
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406 | TIM_Cmd(TIM2, ENABLE);
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407 | }
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408 |
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409 | void
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410 | TIM2_IRQHandler(void) // Timer2 Interrupt Handler
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411 | {
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412 | TIM_ClearITPendingBit(TIM2, TIM_IT_Update);
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413 | (void) irmp_ISR(); // call irmp ISR
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414 | // call other timer interrupt routines...
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415 | }
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416 |
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417 | int
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418 | main (void)
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419 | {
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420 | IRMP_DATA irmp_data;
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421 |
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422 | irmp_init(); // initialize irmp
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423 | timer2_init(); // initialize timer2
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424 |
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425 | for (;;)
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426 | {
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427 | if (irmp_get_data (&irmp_data))
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428 | {
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429 | // ir signal decoded, do something here...
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430 | // irmp_data.protocol is the protocol, see irmp.h
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431 | // irmp_data.address is the address/manufacturer code of ir sender
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432 | // irmp_data.command is the command code
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433 | // irmp_protocol_names[irmp_data.protocol] is the protocol name (if enabled, see irmpconfig.h)
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434 | }
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435 | }
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436 | }
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437 | #endif
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Call_Back_Signal.png
(2,6 KB)
Orignial_Signal.png
(2,5 KB)
