Hallo,
er war nach 45 Minuten Synthese noch nicht fertig.
Also es schien so als ob er gar nicht mehr aufhört, habe deswegen
abgebrochen.
Wegen den Resourcen:
INFO:Xst:1767 - HDL ADVISOR - Resource sharing has identified that some
arithmetic operations in this design can share the same physical
resources for reduced device utilization. For improved clock frequency
you may try to disable resource sharing.
========================================================================
=
HDL Synthesis Report
Macro Statistics
# RAMs : 1
32768x8-bit dual-port RAM : 1
# ROMs : 2
4x1-bit ROM : 1
64x16-bit ROM : 1
# Adders/Subtractors : 1
17-bit addsub : 1
# Counters : 8
10-bit up counter : 1
11-bit up counter : 1
15-bit up counter : 1
17-bit up counter : 1
2-bit up counter : 1
24-bit up counter : 1
8-bit up counter : 2
# Registers : 20
1-bit register : 10
16-bit register : 1
2-bit register : 1
3-bit register : 4
32-bit register : 2
8-bit register : 2
# Comparators : 9
10-bit comparator greatequal : 2
10-bit comparator less : 1
11-bit comparator greatequal : 2
11-bit comparator greater : 1
11-bit comparator less : 2
11-bit comparator lessequal : 1
# Tristates : 1
1-bit tristate buffer : 1
========================================================================
=
========================================================================
=
* Advanced HDL Synthesis
*
========================================================================
=
WARNING:Xst:1293 - FF/Latch <data_sr_0> has a constant value of 1 in
block <Inst_i2c_sender>. This FF/Latch will be trimmed during the
optimization process.
Synthesizing (advanced) Unit <frame_buffer>.
INFO:Xst:3218 - HDL ADVISOR - The RAM <Mram_ram> will be implemented on
LUTs either because you have described an asynchronous read or because
of currently unsupported block RAM features. If you have described an
asynchronous read, making it synchronous would allow you to take
advantage of available block RAM resources, for optimized device usage
and improved timings. Please refer to your documentation for coding
guidelines.
-----------------------------------------------------------------------
| ram_type | Distributed |
|
-----------------------------------------------------------------------
| Port A
|
| aspect ratio | 32768-word x 8-bit |
|
| clkA | connected to signal <clka> | rise
|
| weA | connected to signal <wea> | high
|
| addrA | connected to signal <addra> |
|
| diA | connected to signal <dina> |
|
-----------------------------------------------------------------------
| Port B
|
| aspect ratio | 32768-word x 8-bit |
|
| addrB | connected to signal <addrb> |
|
| doB | connected to signal <doutb> |
|
-----------------------------------------------------------------------
Unit <frame_buffer> synthesized (advanced).
Synthesizing (advanced) Unit <ov7670_registers>.
INFO:Xst:3044 - The ROM <Mrom_sreg_mux0002> will be implemented as a
read-only BLOCK RAM, absorbing the register: <sreg_mux0002>.
INFO:Xst:3225 - The RAM <Mrom_sreg_mux0002> will be implemented as BLOCK
RAM
-----------------------------------------------------------------------
| ram_type | Block |
|
-----------------------------------------------------------------------
| Port A
|
| aspect ratio | 64-word x 16-bit |
|
| mode | write-first |
|
| clkA | connected to signal <clk> | rise
|
| weA | connected to internal node | high
|
| addrA | connected to signal <address> |
|
| diA | connected to internal node |
|
| doA | connected to signal <sreg> |
|
| dorstA | connected to signal <sreg_and0000> | low
|
| reset value | 1111111111111111
|
-----------------------------------------------------------------------
| optimization | speed |
|
-----------------------------------------------------------------------
Unit <ov7670_registers> synthesized (advanced).
========================================================================
=
Advanced HDL Synthesis Report
Macro Statistics
# RAMs : 2
32768x8-bit dual-port distributed RAM : 1
64x16-bit single-port block RAM : 1
# ROMs : 1
4x1-bit ROM : 1
# Adders/Subtractors : 1
17-bit addsub : 1
# Counters : 8
10-bit up counter : 1
11-bit up counter : 1
15-bit up counter : 1
17-bit up counter : 1
2-bit up counter : 1
24-bit up counter : 1
8-bit up counter : 2
# Registers : 104
Flip-Flops : 104
# Comparators : 9
10-bit comparator greatequal : 2
10-bit comparator less : 1
11-bit comparator greatequal : 2
11-bit comparator greater : 1
11-bit comparator less : 2
11-bit comparator lessequal : 1
========================================================================
=
========================================================================
=
* Low Level Synthesis
*
========================================================================
=
WARNING:Xst:1293 - FF/Latch <data_sr_0> has a constant value of 1 in
block <I2CSender>. This FF/Latch will be trimmed during the optimization
process.
Process interrupted by the user
Process "Synthesize - XST" did not complete
