BMP280 an PIC18F45K42 mit MPLAP und I2C

I2C_IDLE() //function checks the status of the bus. It checks either I2C bus is busy or free. is It completed the last operation successfully?

void I2C_IDLE()

{

  while ((SSPSTAT & 0x04) || (SSPCON2 & 0x1F));

}

I2C_Initialize_Master() //function enables master mode and generates clock frequency by uploading a value to the SSPADD register.

void I2C_Master_Init()

{

SSPCON = 0x28;  // enable I2C pins SCL and SDA for serial communication

SSPCON2 = 0x00; 

SSPSTAT = 0x00;  //slew rate enables for high speed control

SSPADD = ((_XTAL_FREQ/4)/I2C_BaudRate) - 1;

TRISC3 = 1;  //Set as a digital input 

TRISC4 = 1;  //Set as a digital input 

}

//This function should be called before using other functions.

void I2C_Start()

{

I2C_IDLE();

SSPCON2bits.SEN = 1;  // initial start condition on SDA line

}

//This function sends stops condition to end data transfer.

void I2C_Stop()

{

I2C_IDLE();

SSPCON2bits.PEN = 1; // Initiate Stop condition on SDA and SCL pins

}

//This function sends a  signal to a slave that the master wants to send more data. It will restart the data transfer.

void I2C_Restart()

{

I2C_IDLE();

SSPCON2bits.RSEN = 1; // Initiate Repeated Start condition on SDA and SCL pins.

}

//These two functions provide an ACK signal after sending a 7bit/10bit address or 8bit data.

void I2C_ACK(void)

{

  I2C_IDLE();

  SSPCON2bits.ACKDT = 0; //Acknowledge Data bit  

  SSPCON2bits.ACKEN = 1;  // Acknowledge Sequence Enable bit(

}

void I2C_NACK(void)

{

I2C_IDLE();

SSPCON2bits.ACKDT = 1; 

SSPCON2bits.ACKEN = 1; 

}

I2C_Write() //used to transmit address and data through the SDA wire.

// input parameter to this function can be a byte ( either address or data)

unsigned char I2C_Write(unsigned char Data)

{

I2C_IDLE();   // wait untill I2C_Bus of PIC18F4550 microcontroller becomes free 

SSPBUF = Data; // store data inside SSPBUF register of PIC18F4550 microcontroller

I2C_Wait();  

return ACKSTAT; //return status of data or address transmission

}

This I2C_Read_Byte() //routine reads a byte from the I2C_Bus and returns its value.

unsigned char I2C_Read_Byte(void)

{

SSPCON2bits.RCEN = 1; // Enable & Start Reception

while(!SSPIF); // Wait Until Completion

SSPIF = 0; // Clear The Interrupt Flag Bit

return SSPBUF; // Return The Received Byte

}

#ifndef I2C2_MASTER_EXAMPLE_H

#define I2C2_MASTER_EXAMPLE_H

#include <stdint.h>

#include <stdio.h>

#include "../i2c2_master.h"

uint8_t  I2C2_Read1ByteRegister(i2c2_address_t address, uint8_t reg);

uint16_t I2C2_Read2ByteRegister(i2c2_address_t address, uint8_t reg);

void I2C2_Write1ByteRegister(i2c2_address_t address, uint8_t reg, uint8_t data);

void I2C2_Write2ByteRegister(i2c2_address_t address, uint8_t reg, uint16_t data);

void I2C2_WriteNBytes(i2c2_address_t address, uint8_t *data, size_t len);

void I2C2_ReadNBytes(i2c2_address_t address, uint8_t *data, size_t len);

void I2C2_ReadDataBlock(i2c2_address_t address, uint8_t reg, uint8_t *data, size_t len);

#endif /* I2C2_MASTER_EXAMPLE_H */

#include <stdint.h>

#if !defined BMP280_I2C

#define  BMP280_I2C2

#endif

#ifdef  BMP280_I2C2

#define BMP280_Start    I2C2_Start

#define BMP280_Write    I2C2_Wr

#define BMP280_Read     I2C2_Rd

#define BMP280_Stop     I2C2_Stop

#endif

#ifndef BMP280_I2C_ADDRESS

  #define BMP280_I2C_ADDRESS  0xEE

#endif

#define BMP280_CHIP_ID        0x58

#define BMP280_REG_DIG_T1     0x88

#define BMP280_REG_DIG_T2     0x8A

#define BMP280_REG_DIG_T3     0x8C

#define BMP280_REG_DIG_P1     0x8E

#define BMP280_REG_DIG_P2     0x90

#define BMP280_REG_DIG_P3     0x92

#define BMP280_REG_DIG_P4     0x94

#define BMP280_REG_DIG_P5     0x96

#define BMP280_REG_DIG_P6     0x98

#define BMP280_REG_DIG_P7     0x9A

#define BMP280_REG_DIG_P8     0x9C

#define BMP280_REG_DIG_P9     0x9E

#define BMP280_REG_CHIPID     0xD0

#define BMP280_REG_SOFTRESET  0xE0

#define BMP280_REG_STATUS     0xF3

#define BMP280_REG_CONTROL    0xF4

#define BMP280_REG_CONFIG     0xF5

#define BMP280_REG_PRESS_MSB  0xF7

int32_t adc_T, adc_P, t_fine;

//

void BMP280_Write8(uint8_t reg_addr, uint8_t _data);

//

// BMP280 sensor modes, register ctrl_meas mode[1:0]

typedef enum

{

  MODE_SLEEP  = 0x00,  // sleep mode

  MODE_FORCED = 0x01,  // forced mode

  MODE_NORMAL = 0x03   // normal mode

} BMP280_mode;

// oversampling setting. osrs_t[2:0], osrs_p[2:0]

typedef enum

{

  SAMPLING_SKIPPED = 0x00,  //skipped, output set to 0x80000

  SAMPLING_X1      = 0x01,  // oversampling x1

  SAMPLING_X2      = 0x02,  // oversampling x2

  SAMPLING_X4      = 0x03,  // oversampling x4

  SAMPLING_X8      = 0x04,  // oversampling x8

  SAMPLING_X16     = 0x05   // oversampling x16

} BMP280_sampling;

// filter setting filter[2:0]

typedef enum

{

  FILTER_OFF = 0x00,  // filter off

  FILTER_2   = 0x01,  // filter coefficient = 2

  FILTER_4   = 0x02,  // filter coefficient = 4

  FILTER_8   = 0x03,  // filter coefficient = 8

  FILTER_16  = 0x04   // filter coefficient = 16

} BMP280_filter;

// standby (inactive) time in ms (used in normal mode), t_sb[2:0]

typedef enum

{

  STANDBY_0_5   =  0x00,  // standby time = 0.5 ms

  STANDBY_62_5  =  0x01,  // standby time = 62.5 ms

  STANDBY_125   =  0x02,  // standby time = 125 ms

  STANDBY_250   =  0x03,  // standby time = 250 ms

  STANDBY_500   =  0x04,  // standby time = 500 ms

  STANDBY_1000  =  0x05,  // standby time = 1000 ms

  STANDBY_2000  =  0x06,  // standby time = 2000 ms

  STANDBY_4000  =  0x07   // standby time = 4000 ms

} standby_time;

struct

{

  uint16_t dig_T1;

  int16_t  dig_T2;

  int16_t  dig_T3;

  uint16_t dig_P1;

  int16_t  dig_P2;

  int16_t  dig_P3;

  int16_t  dig_P4;

  int16_t  dig_P5;

  int16_t  dig_P6;

  int16_t  dig_P7;

  int16_t  dig_P8;

  int16_t  dig_P9;

} BMP280_calib;

void I2C2_Write1ByteRegister(i2c2_address_t address, uint8_t reg, uint8_t data);

uint8_t  I2C2_Read1ByteRegister(i2c2_address_t address, uint8_t reg);

static i2c2_operations_t wr1RegCompleteHandler(void *ptr);

static i2c2_operations_t rd1RegCompleteHandler(void *ptr);

static i2c2_operations_t wr1RegCompleteHandler(void *ptr)

{

    I2C2_SetBuffer(ptr,1);

    I2C2_SetDataCompleteCallback(NULL,NULL);

    return I2C2_CONTINUE;

}

static i2c2_operations_t rd1RegCompleteHandler(void *ptr)

{

    I2C2_SetBuffer(ptr,1);

    I2C2_SetDataCompleteCallback(NULL,NULL);

    return I2C2_RESTART_READ;

}

// writes 1 byte '_data' to register 'reg_addr'

void BMP280_Write8(uint8_t reg_addr, uint8_t _data)

{

  while(!I2C2_Open(BMP280_I2C_ADDRESS)); // sit here until we get the bus..

  I2C2_SetDataCompleteCallback(wr1RegCompleteHandler,&_data);

  I2C2_SetBuffer(&reg_addr,1);

  I2C2_SetAddressNackCallback(NULL,NULL); //NACK polling?

  I2C2_MasterWrite();

  while(I2C2_BUSY == I2C2_Close()); // sit here until finished.

}

// reads 8 bits from register 'reg_addr'

uint8_t BMP280_Read8(uint8_t reg_addr)

{

    uint8_t ret = 0x00;

    while(!I2C2_Open(BMP280_I2C_ADDRESS)); // sit here until we get the bus..

    I2C2_SetDataCompleteCallback(rd1RegCompleteHandler,&ret);

    I2C2_SetBuffer(&reg_addr,1);

    I2C2_SetAddressNackCallback(NULL,NULL); //NACK polling?

    I2C2_MasterWrite();

    while(I2C2_BUSY == I2C2_Close()); // sit here until finished.

    return ret;

  /*uint8_t ret;

  BMP280_Start();

  BMP280_Write(BMP280_I2C_ADDRESS);

  BMP280_Write(reg_addr);

  BMP280_Start();

  BMP280_Write(BMP280_I2C_ADDRESS | 1);

  ret = BMP280_Read(0);

  BMP280_Stop();

  return ret;*/

/**

  I2C2 Generated Driver File

  @Company

    Microchip Technology Inc.

  @File Name

    i2c2_master.c

  @Summary

    This is the generated driver implementation file for the I2C2 driver using PIC10 / PIC12 / PIC16 / PIC18 MCUs

  @Description

    This header file provides implementations for driver APIs for I2C2.

    Generation Information :

       ac Product Revision  :  PIC10 / PIC12 / PIC16 / PIC18 MCUs - 1.81.8

        Device            :  PIC18F45K42

        Driver Version    :  1.0.2

    The generated drivers are tested against the following:

        Compiler          :  XC8 2.36 and above or later

        MPLAB             :  MPLAB X 6.00

*/

/*

    (c) 2018 Microchip Technology Inc. and its subsidiaries. 

    Subject to your compliance with these terms, you may use Microchip software and any 

    derivatives exclusively with Microchip products. It is your responsibility to comply with third party 

    license terms applicable to your use of third party software (including open source software) that 

    may accompany Microchip software.

    THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER 

    EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY 

    IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS 

    FOR A PARTICULAR PURPOSE.

    IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, 

    INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND 

    WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP 

    HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO 

    THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL 

    CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT 

    OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS 

    SOFTWARE.

*/

#include "i2c2_master.h"

#include <xc.h>

// I2C2 STATES

typedef enum {

    I2C2_IDLE = 0,

    I2C2_SEND_ADR_READ,

    I2C2_SEND_ADR_WRITE,

    I2C2_TX,

    I2C2_RX,

    I2C2_TX_EMPTY,

    I2C2_RX_EMPTY,        

    I2C2_SEND_RESTART_READ,

    I2C2_SEND_RESTART_WRITE,

    I2C2_SEND_RESTART,

    I2C2_SEND_STOP,

    I2C2_RX_ACK,

    I2C2_TX_ACK,

    I2C2_RX_NACK_STOP,

    I2C2_RX_NACK_RESTART,

    I2C2_RESET,

    I2C2_ADDRESS_NACK,

    I2C2_BUS_COLLISION,

    I2C2_BUS_ERROR

} i2c2_fsm_states_t;

// I2C2 Event callBack List

typedef enum {

    I2C2_DATA_COMPLETE = 0,

    I2C2_WRITE_COLLISION,

    I2C2_ADDR_NACK,

    I2C2_DATA_NACK,

    I2C2_TIMEOUT,

    I2C2_NULL

} i2c2_callbackIndex_t;

// I2C2 Status Structure

typedef struct

{

    i2c2_callback_t callbackTable[6];

    void *callbackPayload[6];           //  each callBack can have a payload

    uint16_t time_out;                  // I2C2 Timeout Counter between I2C2 Events.

    uint16_t time_out_value;            // Reload value for the timeouts

    i2c2_address_t address;             // The I2C2 Address

    uint8_t *data_ptr;                  // pointer to a data buffer

    size_t data_length;                 // Bytes in the data buffer

    i2c2_fsm_states_t state;            // Driver State

    i2c2_error_t error;

    unsigned addressNackCheck:2;

    unsigned busy:1;

    unsigned inUse:1;

    unsigned bufferFree:1;

} i2c2_status_t;

static void I2C2_SetCallback(i2c2_callbackIndex_t idx, i2c2_callback_t cb, void *ptr);

static void I2C2_Poller(void);

static inline void I2C2_ClearInterruptFlags(void);

static inline void I2C2_MasterFsm(void);

/* I2C2 interfaces */

static inline bool I2C2_MasterOpen(void);

static inline void I2C2_MasterClose(void);    

static inline uint8_t I2C2_MasterGetRxData(void);

static inline void I2C2_MasterSendTxData(uint8_t data);

static inline void I2C2_MasterSetCounter(uint8_t counter);

static inline uint8_t I2C2_MasterGetCounter();

static inline void I2C2_MasterResetBus(void);

static inline void I2C2_MasterEnableRestart(void);

static inline void I2C2_MasterDisableRestart(void);

static inline void I2C2_MasterStop(void);

static inline bool I2C2_MasterIsNack(void);

static inline void I2C2_MasterSendAck(void);

static inline void I2C2_MasterSendNack(void);

static inline void I2C2_MasterClearBusCollision(void);

static inline bool I2C2_MasterIsRxBufFull(void);

static inline bool I2C2_MasterIsTxBufEmpty(void);

static inline bool I2C2_MasterIsStopFlagSet(void);

static inline bool I2C2_MasterIsCountFlagSet(void);

static inline bool I2C2_MasterIsNackFlagSet(void);

static inline void I2C2_MasterClearStopFlag(void);

static inline void I2C2_MasterClearCountFlag(void);

static inline void I2C2_MasterClearNackFlag(void);

/* Interrupt interfaces */

static inline void I2C2_MasterEnableIrq(void);

static inline bool I2C2_MasterIsIrqEnabled(void);

static inline void I2C2_MasterDisableIrq(void);

static inline void I2C2_MasterClearIrq(void);

static inline void I2C2_MasterWaitForEvent(void);

static i2c2_fsm_states_t I2C2_DO_IDLE(void);

static i2c2_fsm_states_t I2C2_DO_SEND_ADR_READ(void);

static i2c2_fsm_states_t I2C2_DO_SEND_ADR_WRITE(void);

static i2c2_fsm_states_t I2C2_DO_TX(void);

static i2c2_fsm_states_t I2C2_DO_RX(void);

static i2c2_fsm_states_t I2C2_DO_TX_EMPTY(void);

static i2c2_fsm_states_t I2C2_DO_RX_EMPTY(void);

static i2c2_fsm_states_t I2C2_DO_SEND_RESTART_READ(void);

static i2c2_fsm_states_t I2C2_DO_SEND_RESTART_WRITE(void);

static i2c2_fsm_states_t I2C2_DO_SEND_RESTART(void);

static i2c2_fsm_states_t I2C2_DO_SEND_STOP(void);

static i2c2_fsm_states_t I2C2_DO_RX_ACK(void);

static i2c2_fsm_states_t I2C2_DO_TX_ACK(void);

static i2c2_fsm_states_t I2C2_DO_RX_NACK_STOP(void);

static i2c2_fsm_states_t I2C2_DO_RX_NACK_RESTART(void);

static i2c2_fsm_states_t I2C2_DO_RESET(void);

static i2c2_fsm_states_t I2C2_DO_ADDRESS_NACK(void);

static i2c2_fsm_states_t I2C2_DO_BUS_COLLISION(void);

static i2c2_fsm_states_t I2C2_DO_BUS_ERROR(void);

typedef i2c2_fsm_states_t (*i2c2FsmHandler)(void);

const i2c2FsmHandler i2c2_fsmStateTable[] = {

    I2C2_DO_IDLE,

    I2C2_DO_SEND_ADR_READ,

    I2C2_DO_SEND_ADR_WRITE,

    I2C2_DO_TX,

    I2C2_DO_RX,

    I2C2_DO_TX_EMPTY,

    I2C2_DO_RX_EMPTY,

    I2C2_DO_SEND_RESTART_READ,

    I2C2_DO_SEND_RESTART_WRITE,

    I2C2_DO_SEND_RESTART,

    I2C2_DO_SEND_STOP,

    I2C2_DO_RX_ACK,

    I2C2_DO_TX_ACK,

    I2C2_DO_RX_NACK_STOP,

    I2C2_DO_RX_NACK_RESTART,

    I2C2_DO_RESET,

    I2C2_DO_ADDRESS_NACK,

    I2C2_DO_BUS_COLLISION,

    I2C2_DO_BUS_ERROR

};

i2c2_status_t I2C2_Status = {0};

void I2C2_Initialize()

{

    //EN disabled; RSEN disabled; S Cleared by hardware after Start; CSTR Enable clocking; MODE 7-bit address; 

    I2C2CON0 = 0x04;

    //ACKCNT Acknowledge; ACKDT Acknowledge; ACKSTAT ACK received; ACKT 0; RXO 0; TXU 0; CSD Clock Stretching enabled; 

    I2C2CON1 = 0x80;

    //ACNT disabled; GCEN disabled; FME disabled; ABD disabled; SDAHT 30 ns hold time; BFRET 8 I2C Clock pulses; 

    I2C2CON2 = 0x18;

    //CLK MFINTOSC; 

    I2C2CLK = 0x03;

    //CNTIF 0; ACKTIF 0; WRIF 0; ADRIF 0; PCIF 0; RSCIF 0; SCIF 0; 

    I2C2PIR = 0x00;

    //CNTIE disabled; ACKTIE disabled; WRIE disabled; ADRIE disabled; PCIE disabled; RSCIE disabled; SCIE disabled; 

    I2C2PIE = 0x00;

    //BTOIF No bus timout; BCLIF No bus collision detected; NACKIF No NACK/Error detected; BTOIE disabled; BCLIE disabled; NACKIE disabled; 

    I2C2ERR = 0x00;

    //Count register 

    I2C2CNT = 0xFF;

    return;

}

i2c2_error_t I2C2_Open(i2c2_address_t address)

{

    i2c2_error_t returnValue = I2C2_BUSY;

    if(!I2C2_Status.inUse)

    {

        I2C2_Status.address = address;

        I2C2_Status.busy = 0;

        I2C2_Status.inUse = 1;

        I2C2_Status.addressNackCheck = 0;

        I2C2_Status.state = I2C2_RESET;

        I2C2_Status.time_out_value = 500; // MCC should determine a reasonable starting value here.

        I2C2_Status.bufferFree = 1;

        // set all the call backs to a default of sending stop

        I2C2_Status.callbackTable[I2C2_DATA_COMPLETE]=I2C2_CallbackReturnStop;

        I2C2_Status.callbackPayload[I2C2_DATA_COMPLETE] = NULL;

        I2C2_Status.callbackTable[I2C2_WRITE_COLLISION]=I2C2_CallbackReturnStop;

        I2C2_Status.callbackPayload[I2C2_WRITE_COLLISION] = NULL;

        I2C2_Status.callbackTable[I2C2_ADDR_NACK]=I2C2_CallbackReturnStop;

        I2C2_Status.callbackPayload[I2C2_ADDR_NACK] = NULL;

        I2C2_Status.callbackTable[I2C2_DATA_NACK]=I2C2_CallbackReturnStop;

        I2C2_Status.callbackPayload[I2C2_DATA_NACK] = NULL;

        I2C2_Status.callbackTable[I2C2_TIMEOUT]=I2C2_CallbackReturnReset;

        I2C2_Status.callbackPayload[I2C2_TIMEOUT] = NULL;

        I2C2_MasterClearIrq();

        I2C2_MasterOpen();

        returnValue = I2C2_NOERR;

    }

    return returnValue;

}

i2c2_error_t I2C2_Close(void)

{

    i2c2_error_t returnValue = I2C2_BUSY;

    if(!I2C2_Status.busy)

    {

        I2C2_Status.inUse = 0;

        I2C2_Status.address = 0xff;

        I2C2_MasterClearIrq();

        I2C2_MasterDisableIrq();

        I2C2_MasterClose();

        returnValue = I2C2_Status.error;

    }

    return returnValue;

}

i2c2_error_t I2C2_MasterOperation(bool read)

{

    i2c2_error_t returnValue = I2C2_BUSY;

    if(!I2C2_Status.busy)

    {

        I2C2_Status.busy = true;

        returnValue = I2C2_NOERR;

        I2C2_MasterSetCounter((uint8_t) I2C2_Status.data_length);

        if(read)

        {

            I2C2_Status.state = I2C2_RX;

            I2C2_DO_SEND_ADR_READ();

        }

        else

        {

            I2C2_Status.state = I2C2_TX;

            I2C2_DO_SEND_ADR_WRITE();

        }

        I2C2_Poller();

    }

    return returnValue;

}

i2c2_error_t I2C2_MasterRead(void)

{

    return I2C2_MasterOperation(true);

}

i2c2_error_t I2C2_MasterWrite(void)

{

    return I2C2_MasterOperation(false);

}

void I2C2_SetTimeOut(uint8_t timeOutValue)

{

    I2C2_MasterDisableIrq();

    I2C2_Status.time_out_value = timeOutValue;

    I2C2_MasterEnableIrq();

}

void I2C2_SetBuffer(void *buffer, size_t bufferSize)

{

    if(I2C2_Status.bufferFree)

    {

        I2C2_Status.data_ptr = buffer;

        I2C2_Status.data_length = bufferSize;

        I2C2_Status.bufferFree = false;

    }

}

void I2C2_SetDataCompleteCallback(i2c2_callback_t cb, void *ptr)

{

    I2C2_SetCallback(I2C2_DATA_COMPLETE, cb, ptr);

}

void I2C2_SetWriteCollisionCallback(i2c2_callback_t cb, void *ptr)

{

    I2C2_SetCallback(I2C2_WRITE_COLLISION, cb, ptr);

}

void I2C2_SetAddressNackCallback(i2c2_callback_t cb, void *ptr)

{

    I2C2_SetCallback(I2C2_ADDR_NACK, cb, ptr);

}

void I2C2_SetDataNackCallback(i2c2_callback_t cb, void *ptr)

{

    I2C2_SetCallback(I2C2_DATA_NACK, cb, ptr);

}

void I2C2_SetTimeoutCallback(i2c2_callback_t cb, void *ptr)

{

    I2C2_SetCallback(I2C2_TIMEOUT, cb, ptr);

}

static void I2C2_SetCallback(i2c2_callbackIndex_t idx, i2c2_callback_t cb, void *ptr)

{

    if(cb)

    {

        I2C2_Status.callbackTable[idx] = cb;

        I2C2_Status.callbackPayload[idx] = ptr;

    }

    else

    {

        I2C2_Status.callbackTable[idx] = I2C2_CallbackReturnStop;

        I2C2_Status.callbackPayload[idx] = NULL;

    }

}

static void I2C2_Poller(void)

{

    while(I2C2_Status.busy)

    {

        I2C2_MasterWaitForEvent();

        I2C2_MasterFsm();

    }

}

static inline void I2C2_MasterFsm(void)

{

    I2C2_ClearInterruptFlags();

    if(I2C2_Status.addressNackCheck && I2C2_MasterIsNack())

    {

        I2C2_Status.state = I2C2_ADDRESS_NACK;

    }

    I2C2_Status.state = i2c2_fsmStateTable[I2C2_Status.state]();

}

static inline void I2C2_ClearInterruptFlags(void)

{

    if(I2C2_MasterIsCountFlagSet())

    {

        I2C2_MasterClearCountFlag();

    }

    else if(I2C2_MasterIsStopFlagSet())

    {

        I2C2_MasterClearStopFlag();

    }

    else if(I2C2_MasterIsNackFlagSet())

    {

        I2C2_MasterClearNackFlag();

    }

}

static i2c2_fsm_states_t I2C2_DO_IDLE(void)

{

    I2C2_Status.busy = false;

    I2C2_Status.error = I2C2_NOERR;

    return I2C2_RESET;

}

static i2c2_fsm_states_t I2C2_DO_SEND_ADR_READ(void)

{

    I2C2_Status.addressNackCheck = 2;

    if(I2C2_Status.data_length ==  1)

    {

        I2C2_DO_RX_EMPTY();

    }

    I2C2_MasterSendTxData((uint8_t) (I2C2_Status.address << 1 | 1));

    return I2C2_RX;

}

static i2c2_fsm_states_t I2C2_DO_SEND_ADR_WRITE(void)

{

    I2C2_Status.addressNackCheck = 2;

    I2C2_MasterSendTxData((uint8_t) (I2C2_Status.address << 1));

    return I2C2_TX;

}

static i2c2_fsm_states_t I2C2_DO_TX(void)

{

    if(I2C2_MasterIsNack())

    {

        switch(I2C2_Status.callbackTable[I2C2_DATA_NACK](I2C2_Status.callbackPayload[I2C2_DATA_NACK]))

        {

            case I2C2_RESTART_READ:

                return I2C2_DO_SEND_RESTART_READ();

            case I2C2_RESTART_WRITE:

                  return I2C2_DO_SEND_RESTART_WRITE();

            default:

            case I2C2_CONTINUE:

            case I2C2_STOP:

                return I2C2_IDLE;

        }

    }

    else if(I2C2_MasterIsTxBufEmpty())

    {

        if(I2C2_Status.addressNackCheck)

        {

            I2C2_Status.addressNackCheck--;

        }

        uint8_t dataTx = *I2C2_Status.data_ptr++;

        i2c2_fsm_states_t retFsmState = (--I2C2_Status.data_length)?I2C2_TX:I2C2_DO_TX_EMPTY();

        I2C2_MasterSendTxData(dataTx);

        return retFsmState;

    }

    else

    {

        return I2C2_TX;

    }

}

static i2c2_fsm_states_t I2C2_DO_RX(void)

{

    if(!I2C2_MasterIsRxBufFull())

    {

        return I2C2_RX;

    }

    if(I2C2_Status.addressNackCheck)

    {

        I2C2_Status.addressNackCheck--;

    }

    if(--I2C2_Status.data_length)

    {

        *I2C2_Status.data_ptr++ = I2C2_MasterGetRxData();

        return I2C2_RX;

    }

    else

    {

        i2c2_fsm_states_t retFsmState = I2C2_DO_RX_EMPTY();

        *I2C2_Status.data_ptr++ = I2C2_MasterGetRxData();

        return retFsmState;

    }

}

static i2c2_fsm_states_t I2C2_DO_TX_EMPTY(void)

{

    I2C2_Status.bufferFree = true;

    switch(I2C2_Status.callbackTable[I2C2_DATA_COMPLETE](I2C2_Status.callbackPayload[I2C2_DATA_COMPLETE]))

    {

        case I2C2_RESTART_READ:

            I2C2_MasterEnableRestart();

            return I2C2_SEND_RESTART_READ;

        case I2C2_CONTINUE:

            // Avoid the counter stop condition , Counter is incremented by 1

            I2C2_MasterSetCounter((uint8_t) I2C2_Status.data_length + 1);

            return I2C2_TX;

        default:

        case I2C2_STOP:

            I2C2_MasterDisableRestart();

            return I2C2_SEND_STOP;

    }

}

static i2c2_fsm_states_t I2C2_DO_RX_EMPTY(void)

{

    I2C2_Status.bufferFree = true;

    switch(I2C2_Status.callbackTable[I2C2_DATA_COMPLETE](I2C2_Status.callbackPayload[I2C2_DATA_COMPLETE]))

    {

        case I2C2_RESTART_WRITE:

            I2C2_MasterEnableRestart();

            return I2C2_SEND_RESTART_WRITE;

        case I2C2_RESTART_READ:

            I2C2_MasterEnableRestart();

            return I2C2_SEND_RESTART_READ;

        case I2C2_CONTINUE:

            // Avoid the counter stop condition , Counter is incremented by 1

            I2C2_MasterSetCounter((uint8_t) (I2C2_Status.data_length + 1));

            return I2C2_RX;

        default:

        case I2C2_STOP:

            if(I2C2_Status.state != I2C2_SEND_RESTART_READ)

            {

                I2C2_MasterDisableRestart();

            }

            return I2C2_RESET;

    }

}

static i2c2_fsm_states_t I2C2_DO_SEND_RESTART_READ(void)

{

    I2C2_MasterSetCounter((uint8_t) I2C2_Status.data_length);

    return I2C2_DO_SEND_ADR_READ();

}

static i2c2_fsm_states_t I2C2_DO_SEND_RESTART_WRITE(void)

{

    return I2C2_SEND_ADR_WRITE;

}

static i2c2_fsm_states_t I2C2_DO_SEND_RESTART(void)

{

    return I2C2_SEND_ADR_READ;

}

static i2c2_fsm_states_t I2C2_DO_SEND_STOP(void)

{

    I2C2_MasterStop();

    if(I2C2_MasterGetCounter())

    {

        I2C2_MasterSetCounter(0);

        I2C2_MasterSendTxData(0);

    }

    return I2C2_IDLE;

}

static i2c2_fsm_states_t I2C2_DO_RX_ACK(void)

{

    I2C2_MasterSendAck();

    return I2C2_RX;

}

static i2c2_fsm_states_t I2C2_DO_TX_ACK(void)

{

    I2C2_MasterSendAck();

    return I2C2_TX;

}

static i2c2_fsm_states_t I2C2_DO_RX_NACK_STOP(void)

{

    I2C2_MasterSendNack();

    I2C2_MasterStop();

    return I2C2_DO_IDLE();

}

static i2c2_fsm_states_t I2C2_DO_RX_NACK_RESTART(void)

{

    I2C2_MasterSendNack();

    return I2C2_SEND_RESTART;

}

static i2c2_fsm_states_t I2C2_DO_RESET(void)

{

    I2C2_MasterResetBus();

    I2C2_Status.busy = false;

    I2C2_Status.error = I2C2_NOERR;

    return I2C2_RESET;

}

static i2c2_fsm_states_t I2C2_DO_ADDRESS_NACK(void)

{

    I2C2_Status.addressNackCheck = 0;

    I2C2_Status.error = I2C2_FAIL;

    I2C2_Status.busy = false;

    switch(I2C2_Status.callbackTable[I2C2_ADDR_NACK](I2C2_Status.callbackPayload[I2C2_ADDR_NACK]))

    {

        case I2C2_RESTART_READ:

        case I2C2_RESTART_WRITE:

            return I2C2_DO_SEND_RESTART();

        default:

            return I2C2_RESET;

    }

}

static i2c2_fsm_states_t I2C2_DO_BUS_COLLISION(void)

{

    // Clear bus collision status flag

    I2C2_MasterClearIrq();

    I2C2_Status.error = I2C2_FAIL;

    switch (I2C2_Status.callbackTable[I2C2_WRITE_COLLISION](I2C2_Status.callbackPayload[I2C2_WRITE_COLLISION])) {

    case I2C2_RESTART_READ:

        return I2C2_DO_SEND_RESTART_READ();

    case I2C2_RESTART_WRITE:

        return I2C2_DO_SEND_RESTART_WRITE();

    default:

        return I2C2_DO_RESET();

    }

}

static i2c2_fsm_states_t I2C2_DO_BUS_ERROR(void)

{

    I2C2_MasterResetBus();

    I2C2_Status.busy  = false;

    I2C2_Status.error = I2C2_FAIL;

    return I2C2_RESET;

}

void I2C2_BusCollisionIsr(void)

{

    I2C2_MasterClearBusCollision();

    I2C2_Status.state = I2C2_RESET;