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STM32_Reference_manual.pdf
Flash module organization (STM32F40x and STM32F41x) Block Name Block base addresses Size Sector 0 0x0800 0000 - 0x0800 3FFF 16 Kbytes Sector 1 0x0800 4000 - 0x0800 7FFF 16 Kbytes Sector 2 0x0800 8000 - 0x0800 BFFF 16 Kbytes Sector 3 0x0800 C000 - 0x0800 FFFF 16 Kbytes Sector 4 0x0801 0000 - 0x0801 FFFF
in „STM32F4 Timer Triggered DMA SPI – NSS Problem“ · Mikrocontroller und Digitale Elektronik ·
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PDF
MCU.pdf
Port D 0x1FFF F80F 0x8000 0000 0x4001 1000 Port C Option Bytes Port B 0x1FFF F800 0x4001 0C00 0x4001 0800 Port A 3 System memory 0x4001 0400 EXTI AFIO 0x4001 0000 0x1FFF F000 0x4000 7C00 reserved 0x6000 0000 0x4000 7800 CEC DAC 0x4000 7400 2 PWR 0x4000 7000 reserved 0x4000 6C00 BKP Peripherals I2C2 0x4000
in „suche die pins für flash speicher“ · Mikrocontroller und Digitale Elektronik ·
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PDF
STM32F107.pdf
0x4001 1000 - 0x4001 13FF Port C block 6 Port B 0x4001 0C00 - 0x4001 0FFF Not used Port A 0x4001 0800 - 0x4001 0BFF EXTI 0x4001 0400 - 0x4001 07FF 0xC000 0000 AFIO 0x4001 0000 - 0x4001 3FFF 0xBFFF FFFF Reserved 0x4000 7800 - 0x4000 FFFF 512-Mbyte block 5 DAC 0x4000 7400 - 0x4000 77FF PWR 0x4000 7000
in „STM32-comStick USB-Bootloader“ · Mikrocontroller und Digitale Elektronik ·
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Datei
main.c
D4) | (1<<D1) | (1<<D0) ; // reserved bits = 1 control_reg |= AD5932_B24 |AD5932_SINE_TRI | AD5932_DAC_ENABLE | AD5932_MSBOUTEN ;// | AD5932_MSBOUTEN; control_reg |= AD5932_SYNCSEL | AD5932_SYNCOUTEN; ad5932_write(AD5932_CONTROL | control_reg); //startfrequenz = 0x11; ad5932_set_frequency(0x11); //ad5932
in „DDS-Singalgenerator mit ATmega88 und DDS AD5932“ · Digitale Signalverarbeitung / DSP / Machine Learning ·
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Datei
main.c
| (1<<D6) | (1<<D4) | (1<<D1) | (1<<D0) ; // reserved bits = 1 control_reg |= AD5932_B24 | AD5932_DAC_ENABLE | AD5932_MSBOUTEN ;// | AD5932_MSBOUTEN; control_reg |= AD5932_TRIG_INC| AD5932_SYNCSEL | AD5932_SYNCOUTEN; ad5932_write(AD5932_CONTROL | control_reg); //ad5932_set_n_inc(n_inc); //ad5932_set_increment_interval
in „DDS-Singalgenerator mit ATmega88 und DDS AD5932“ · Digitale Signalverarbeitung / DSP / Machine Learning ·
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Datei
main.c
| (1<<D6) | (1<<D4) | (1<<D1) | (1<<D0) ; // reserved bits = 1 control_reg |= AD5932_B24 | AD5932_DAC_ENABLE | AD5932_MSBOUTEN ;// | AD5932_MSBOUTEN; control_reg |= AD5932_TRIG_INC| AD5932_SYNCSEL | AD5932_SYNCOUTEN; ad5932_write(AD5932_CONTROL | control_reg); //ad5932_set_n_inc(n_inc); //ad5932_set_increment_interval
in „Projekt: DDS basierter Funktionsgenerator mit AD5930“ · Mikrocontroller und Digitale Elektronik ·
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PDF
MAX1647.PDF
Battery Chargers Table 4. Relationship Between Current DAC Code and the ChargingCurrent( ) Value 8 4 CHARGE_ ALARM_ CURRENT SW REG 6 (NOTE 1) ChargingVoltage( ) SEL ChargingCurrent( ) DAC (NOTE 2) INHIBITED INHIBITED CODE ON? 1 X 0 0 0 0x0010–0xFFFF 0V 0x0001
in „Win98 Diagnose Notebook Akku immer 50%“ · PC Hard- und Software ·
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PDF
MAX1647_1_.PDF
Battery Chargers Table 4. Relationship Between Current DAC Code and the ChargingCurrent( ) Value 8 4 CHARGE_ ALARM_ CURRENT SW REG 6 (NOTE 1) ChargingVoltage( ) SEL ChargingCurrent( ) DAC (NOTE 2) INHIBITED INHIBITED CODE ON? 1 X 0 0 0 0x0010–0xFFFF 0V 0x0001
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stm32l431_reference_manual.pdf
Flash module - 256 KB single bank organization Size Flash area Flash memory addresses (bytes) Name 0x0800 0000 - 0x0800 07FF 2 K Page 0 0x0800 0800 - 0x0800 0FFF 2 K Page 1 0x0800 1000 - 0x0800 17FF 2 K Page 2 0x0800 1800 - 0x0800 1FFF 2 K Page 3 Main memory - - - - - - - - - - - - 0x0803 F800 - 0x0803
in „ADC differential mode“ · Mikrocontroller und Digitale Elektronik ·
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PDF
stm32l431_reference_manual.pdf
Flash module - 256 KB single bank organization Size Flash area Flash memory addresses (bytes) Name 0x0800 0000 - 0x0800 07FF 2 K Page 0 0x0800 0800 - 0x0800 0FFF 2 K Page 1 0x0800 1000 - 0x0800 17FF 2 K Page 2 0x0800 1800 - 0x0800 1FFF 2 K Page 3 Main memory - - - - - - - - - - - - 0x0803 F800 - 0x0803
in „Offset Data alignment“ · Mikrocontroller und Digitale Elektronik ·
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PDF
stm32l431_reference_manual.pdf
Flash module - 256 KB single bank organization Size Flash area Flash memory addresses (bytes) Name 0x0800 0000 - 0x0800 07FF 2 K Page 0 0x0800 0800 - 0x0800 0FFF 2 K Page 1 0x0800 1000 - 0x0800 17FF 2 K Page 2 0x0800 1800 - 0x0800 1FFF 2 K Page 3 Main memory - - - - - - - - - - - - 0x0803 F800 - 0x0803
in „DMA one shot mode“ · Mikrocontroller und Digitale Elektronik ·
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vs1033d.pdf
Y DATA ROM ROM ROM 8000 8000 C000 C000 C100 I/O C100 FFFF FFFF Figure 16: User’s Memory Map. 10.6 DAC Registers DAC registers, prefix DAC Reg Type Reset Abbrev[bits] Description 0xC013 rw 0 FCTLL DAC frequency control, 16 LSbs 0xC014 rw 0 FCTLH DAC frequency control 4MSbs, PLL control 0xC015 rw 0 LEFT DAC left channel PCM value 0xC016 rw 0 RIGHT DAC right channel PCM value Every fourth clock cycle, an internal 26-bit counter is added to by (DAC FCTLH & 15) £ 65536 + DAC FCTLL. Whenever this counter overflows
in „Layout dringend“ · Platinen ·
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AN649_-_Programming_Guide_0.8.pdf
returned. Command Bit D7 D6 D5 D4 D3 D2 D1 D0 CMD 0x00 Response Bit D7 D6 D5 D4 D3 D2 D1 D0 ERR_CM DAC- STATUS0 CTS D QINT DSRVINT RSQINT RDSINT ACFINT STCINT DEVN- STATUS1 X X X X X X X TINT STATUS2 X REPO- CMDO- STATUS3 PUP_STATE[1:0] X DSPERR ARBERR ERRNR FERR FERR RESP4 DATA_0[7:0] RESP5 DATA_N[7
in „DABPi - FM/DAB Empfänger mit Si4688 für Raspberry Pi“ · Projekte & Code ·
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SI4684_Prog.pdf
returned. Command Bit D7 D6 D5 D4 D3 D2 D1 D0 CMD 0x00 Response Bit D7 D6 D5 D4 D3 D2 D1 D0 ERR_CM DAC- STATUS0 CTS D QINT DSRVINT RSQINT RDSINT ACFINT STCINT DEVN- STATUS1 X X X X X X X TINT STATUS2 X REPO- CMDO- STATUS3 PUP_STATE[1:0] X DSPERR ARBERR ERRNR FERR FERR RESP4 DATA_0[7:0] RESP5 DATA_N[7
in „Wie UKW & DAB Empfänger selber machen?“ · Mikrocontroller und Digitale Elektronik ·
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CD00277537.pdf
TIM11 0x8000 0000 0x4001 1000 TIM10 0x4001 0C00 TIM9 0x4001 0800 3 EXTI 0x1FF8 001F 0x4001 0400 Option Bytes 0x4001 0000 SYSCFG 0x1FF8 0000 reserved 0x6000 0000 reserved COMP + RI 0x1FF0 0FFF 0x4000 7C00 reserved reserved 0x4000 7800 2 DAC1 & 2 System memory 0x4000
in „SPI-Schnittstelle Befehl: SPI_I2S_SendData(spi2, data)“ · Mikrocontroller und Digitale Elektronik ·
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Datei
rfid.ino
TestBusReg 0x35 #define AutoTestReg 0x36 #define VersionReg 0x37 #define AnalogTestReg 0x38 #define TestDAC1Reg 0x39 #define TestDAC2Reg 0x3A #define TestADCReg 0x3B #define Reserved31 0x3C #define Reserved32 0x3D #define Reserved33 0x3E #define Reserved34 0x3F //------------------------------------------
in „Arduino leonardo invalid suffix "B9FD4" umgehen“ · Mikrocontroller und Digitale Elektronik ·
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PDF
CM6206_Datasheet_v2.1_en.pdf
: Rear_Sur 8 CODECM R/W 0: USB mode; 1: CODEC mode 7 EN_HPF R/W 1: Enable DAC high pass filter 6 T_SEL_DSDA4 R/W 1: Loopback ADC 1-bit delta-sigma data to RearSurround DAC 5 T_SEL_DSDA3 R/W 1: Loopback ADC 1-bit delta-sigma data to CEN/LFE DAC 4 T_SEL_DSDA2 R/W 1: Loopback ADC 1-bit delta-sigma data to SideSurround DAC 3 T_SEL_DSDA1 R/W 1: Loopback ADC 1-bit delta-sigma data to Front DAC 2-0 T_SEL_DSAD R/W Select delta-sigma 1-bit input source to AD digital filter. 000: normal; 100: Front; 101: SSurround; 110: Cen
in „soundchip mit mehr als stereo“ · Mikrocontroller und Digitale Elektronik ·
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cm6206_2_3.pdf
: Rear_Sur 8 CODECM R/W 0: USB mode; 1: CODEC mode 7 EN_HPF R/W 1: Enable DAC high pass filter 6 T_SEL_DSDA4 R/W 1: Loopback ADC 1-bit delta-sigma data to RearSurround DAC 5 T_SEL_DSDA3 R/W 1: Loopback ADC 1-bit delta-sigma data to CEN/LFE DAC 4 T_SEL_DSDA2 R/W 1: Loopback ADC 1-bit delta-sigma data to SideSurround DAC 3 T_SEL_DSDA1 R/W 1: Loopback ADC 1-bit delta-sigma data to Front DAC 2-0 T_SEL_DSAD R/W Select delta-sigma 1-bit input source to AD digital filter. 000: normal; 100: Front; 101: SSurround; 110: Cen
in „USB Stereo Eingang Mikro oder line-in“ · Mikrocontroller und Digitale Elektronik ·
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PDF
cm6206_2_3.pdf
: Rear_Sur 8 CODECM R/W 0: USB mode; 1: CODEC mode 7 EN_HPF R/W 1: Enable DAC high pass filter 6 T_SEL_DSDA4 R/W 1: Loopback ADC 1-bit delta-sigma data to RearSurround DAC 5 T_SEL_DSDA3 R/W 1: Loopback ADC 1-bit delta-sigma data to CEN/LFE DAC 4 T_SEL_DSDA2 R/W 1: Loopback ADC 1-bit delta-sigma data to SideSurround DAC 3 T_SEL_DSDA1 R/W 1: Loopback ADC 1-bit delta-sigma data to Front DAC 2-0 T_SEL_DSAD R/W Select delta-sigma 1-bit input source to AD digital filter. 000: normal; 100: Front; 101: SSurround; 110: Cen
in „PC Sound-Hardware: CD-Laufwerk“ · PC Hard- und Software ·
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PDF
CM6206_Datasheet__v2.3_1_.pdf
: Rear_Sur 8 CODECM R/W 0: USB mode; 1: CODEC mode 7 EN_HPF R/W 1: Enable DAC high pass filter 6 T_SEL_DSDA4 R/W 1: Loopback ADC 1-bit delta-sigma data to RearSurround DAC 5 T_SEL_DSDA3 R/W 1: Loopback ADC 1-bit delta-sigma data to CEN/LFE DAC 4 T_SEL_DSDA2 R/W 1: Loopback ADC 1-bit delta-sigma data to SideSurround DAC 3 T_SEL_DSDA1 R/W 1: Loopback ADC 1-bit delta-sigma data to Front DAC 2-0 T_SEL_DSAD R/W Select delta-sigma 1-bit input source to AD digital filter. 000: normal; 100: Front; 101: SSurround; 110: Cen
in „USB-Soundkarte zu einem Spannungslogger umbauen, wie die Eingänge schützen?“ · Mikrocontroller und Digitale Elektronik ·
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file1.TXT
10071000036EFF0E046E400EB7EC16F01B0E036E58 :10072000010E046E400EB7EC16F0000E026E220EA3 :10073000016E0BEC18F0FF0AD8B414D0800E036ED3 :10074000000E026E220E016E0BEC18F0046E000E0D :10075000026E230E016E0BEC18F0056E400E27ECB6 :1007600016F00AD0800E036E0C0E046EA30E056EFA :10077000400E27EC16F000D0000E026E240E016E23 :100780000BEC18F0FF0AD8B414D0810E036E000EE3
in „Trying to understand .hex files obtained after compiling a XC8 MPLAB X project.“ · Mikrocontroller und Digitale Elektronik ·
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Datei
tbf5030_c3a_3.c
> 2) err_cnt2 = 0; } else dout_data1 = dout_data1 & 0xfb; //system error(LED) = ON d_out(); //-->> dac2_data = 0; //DAC8043 testing write_dac2_byte(); dac3_data = 0; //DAC8043 testing write_dac3_byte(); dac4_data = 0; //DAC8043 testing write_dac4_byte(); if(system_led == 1) dout_data1 = dout_data1 &
in „Fehler beim Compilieren“ · Mikrocontroller und Digitale Elektronik ·
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Datasheet_DM00039193-490390.pdf
buffer is OFF, the R (1) Impedance output with - - 15 k Minimum resistive load between O buffer OFF DAC_OUT and V SS to have a 1% accuracy is 1.5 M Maximum capacitive load at C (1) Capacitive load - - 50 pF DAC_OUT pin (when the buffer LOAD is ON). DAC_OUT Lower DAC_OUT voltage It gives the maximum output
in „STM32F05 SPI 3 Wire Verbindung mit Accelerometer“ · Mikrocontroller und Digitale Elektronik ·
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Datei
iotn3217.h
bit 0 mask. */ #define VREF_DAC0REFSEL0_bp 0 /* DAC0/AC0 referance select bit 0 position. */ #define VREF_DAC0REFSEL1_bm (1<<1) /* DAC0/AC0 referance select bit 1 mask. */ #define VREF_DAC0REFSEL1_bp 1 /* DAC0/AC0 referance select
in „Neue 8-Bit Tinys vorgestellt: 417/814/816/817“ · Mikrocontroller und Digitale Elektronik ·
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xmega_a1.pdf
. The external reference input is shared with the ADC reference input. Figure 25-1. DAC overview Configuration Reference selection Channel A Register Channel A DAC Channel B Channel B Register Event Trigger Each DAC has one continuous output with high drive capabilities for both resistive
in „Welchen Wert hat der Pull-up-Widerstand dieses XMega?“ · Mikrocontroller und Digitale Elektronik ·
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DM00031020.pdf
Flash module organization (STM32F40x and STM32F41x) Block Name Block base addresses Size Sector 0 0x0800 0000 - 0x0800 3FFF 16 Kbytes Sector 1 0x0800 4000 - 0x0800 7FFF 16 Kbytes Sector 2 0x0800 8000 - 0x0800 BFFF 16 Kbytes Sector 3 0x0800 C000 - 0x0800 FFFF 16 Kbytes Sector 4 0x0801 0000 - 0x0801 FFFF
in „fsmc am stm32f4“ · Mikrocontroller und Digitale Elektronik ·
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PDF
r_manuel.pdf
Flash module organization (STM32F40x and STM32F41x) Block Name Block base addresses Size Sector 0 0x0800 0000 - 0x0800 3FFF 16 Kbytes Sector 1 0x0800 4000 - 0x0800 7FFF 16 Kbytes Sector 2 0x0800 8000 - 0x0800 BFFF 16 Kbytes Sector 3 0x0800 C000 - 0x0800 FFFF 16 Kbytes Sector 4 0x0801 0000 - 0x0801 FFFF
in „Hilfe bei Programmierung STM32F407VG bei TIM1“ · Mikrocontroller und Digitale Elektronik ·
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Datei
tfrec-d-dump.txt
0000 1 0000 0 0001 0 0001 0 0002 0 0004 0 0008 0 0010 0 0020 0 0040 0 0080 0 0100 0 0200 0 0400 0 0800 1 1000 0 0002 0 0004 0 0008 0 0010 0 0020 0 0040 0 0080 0 0100 0 0200 0 0400 1 0800 0 2001 0 1001 0 4002 0 8004 0 0008 0 0010 0 0020 0 0040 0 0080 0 0100 0 0200 0 0400 0 0800 0 1000 0 2000 0 4000 0
in „SDR-Dekoder für TFA KlimaLogg Pro/IT+ Temperatursensoren“ · Projekte & Code ·
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EKG_usw_Informationformedicalapplications_von_TI.pdf
DAC714 R-2R 16 10 1 Serial, SPI ±10 Int 0.0015 16 525 PDIP-16, SOIC-16 12.53 DAC715 R-2R 16 10 1 P16 +10 Int 0.003 16 525 PDIP-28, SOIC-28 12.53 DAC716 R-2R 16 10 1 Serial, SPI +10 Int 0.003 16 525 PDIP
in „EKG Schaltung Neuling“ · Analoge Elektronik und Schaltungstechnik ·
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STM32F405-7x.pdf
SPI2/I2S2 (2) 0.17/0.16 0.13/0.12 SPI3/I2S3 (2) 0.16/0.14 0.12/0.12 CAN1 0.27 0.21 CAN2 0.26 0.20 DAC 0.14 0.10 (3) DAC channel 1 0.91 0.89 (4) DAC channel 2 0.91 0.89 (3)(4) DAC channel 1 and 2 1.69 1.68 WWDG 0.04 0.04 88/180 Doc ID 022152 Rev 3 STM32F405xx, STM32F407xx Electrical characteristics Table
in „STM32 DCMI (Kamera) Pinbelegung“ · Mikrocontroller und Digitale Elektronik ·
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Diplomarbeit_PID.pdf
STD_LOGIC_VECTOR (13 downto 0); -- Output of ADC B; AD_CONV: out STD_LOGIC; -- Trigger Output for ADC Conversion DAC_CLR: out STD_LOGIC; -- Reset DAC DAC_CS: out STD_LOGIC; -- ChipSelect Digital Analog Converter SPI_SS_B:out STD_LOGIC; SF_CE0:out STD_LOGIC; FPGA_INIT_B:out STD_LOGIC); end ADC_OVER_SPI; architecture
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combined_comparison.pdf
7000 Reserved 0x1FFF F000 Reserved Reserved 0x4000 5800 Peripherals 0x4000 5400 I2C 0x0800 4000 0x4000 0000 Reserved CodeFLASH Reserved 0x4000 3400 16KB 0x2000 0800 IWDG 2KB SRAM 0x4000 3000 0x0800 0000 0x2000 0000 WWDG Aliased to Flash or 0x4000 2C00 system memory FLASH depending on Reserved
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Confidential_Programming_guide_FD6818.pdf
multiplexed for transceiver and can be used to set mute, receive AF output and sidetone BEEP output. (18) AF DAC analog gain Register Address(HEX) Description 1=Enable AFOUT DAC afout_en REG_03H[9] dac_vgain[3:0] REG_23H[3:0] DAC maximum output level Whether it is output receiving AF or BEEP sidetone, you need
in „Firmware entschlüsseln, Updateprogramm als Hilfe?“ · Softwareentwicklung ·
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Datei
MRFC522.c
TestBusReg 0x35 #define AutoTestReg 0x36 #define VersionReg 0x37 #define AnalogTestReg 0x38 #define TestDAC1Reg 0x39 #define TestDAC2Reg 0x3A #define TestADCReg 0x3B #define Reserved31 0x3C #define Reserved32 0x3D #define Reserved33 0x3E #define Reserved34 0x3F //------------------------------------------
in „Kommunikation mit dem RFID-Modul MFRC522“ · Mikrocontroller und Digitale Elektronik ·
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PDF
stm32f405rg.pdf
between RO buffer OFF - - 15 kΩ DAC_OUT and V SS to have a 1% accuracy is 1.5 MΩ Maximum capacitive load at (2) C LOAD Capacitive load - - 50 pF DAC_OUT pin (when the buffer is ON). It gives the maximum output DAC_OUT Lower DAC_OUT voltage
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Datei
tn816def.inc
boot section of flash ;************************************************************************* ;** DAC - Digital to Analog Converter ;************************************************************************* ; DAC_CTRLA masks .equ DAC_ENABLE_bm = 0x01 ; DAC Enable bit mask .equ DAC_ENABLE_bp = 0 ; DAC
in „ATtiny816 wo finde ich def.inc“ · Mikrocontroller und Digitale Elektronik ·
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Datei
iotn814.h
) /* Analog to Digital Converter */ #define AC0 (*(AC_t *) 0x0670) /* Analog Comparator */ #define DAC0 (*(DAC_t *) 0x0680) /* Digital to Analog Converter */ #define USART0 (*(USART_t *) 0x0800) /* Universal Synchronous and Asynchronous Receiver and Transmitter */ #define TWI0 (*(TWI_t *) 0x0810) /*
in „Attiny417/814/816/817 und avr-gcc, avr-libc“ · Mikrocontroller und Digitale Elektronik ·
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156346062-STi7105.pdf
CMDR signals. Can be used to force DAC SD O/P. i n C [6] TST_DAC_SD_CMDS: Functions with CMDS signal. Can be used to force DAC SD O/P. o C [5] DAC_HD_HZU: d 1: Disables the DAC HD output current and puts the O/P in high impedance mode, but
in „Motorola Vip19x0 (Big brother of Vip1710)“ · Mikrocontroller und Digitale Elektronik ·
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MC51F7424_V1.2.2.pdf
C1NSEL0 C1PSEL3 C1PSEL2 C1PSEL1 C1PSEL0 00000 C6 器 2 000 SFR0/ CMP1CR3 CMP1 控制寄存 C1PWMTR C1PWMTR C1DAC5 C1DAC4 C1DAC3 C1DAC2 C1DAC1 C1DAC0 0000 晟矽微电 http://www.sinomcu.com/ 115/157 MC51F7424 晟矽微电 C7 器 3 GS1 GS0 0000 14.4.1 CMPn 控制寄存器 0（CMP0CR0,0xA4/SFR0,CMP1CR0,0xC4/SFR0） Bit 7 Bit 6 Bit 5 Bit 4 Bit
in „Lidl kann auch anders (Lötstation)“ · Mechanik, Gehäuse, Werkzeug ·
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PIC16F18344.pdf
V DD 00 VREF+ 01 V SOURCE+ FVR_buffer2 10 DAC1R<4:0> 5 Reserved 11 R DAC1PSS R DAC1EN R R X U DAC1_output 32 M To Peripherals Steps o - 3 R DAC1OUT (1) R DAC1OE R DAC1NSS VREF- 1 VSOURCE- VSS 0 Note 1: The unbuffered DAC1_output is provided on
in „EEPROM Verständnisproblem beim PIC 16F18344“ · Mikrocontroller und Digitale Elektronik ·
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MC9S08MM128RM.pdf
level 1 DAC buffer read pointer top position flag. DACRPT 0 The DAC buffer read pointer is not zero 1 The DAC buffer read pointer is zero 0 DAC buffer read pointer bottom position flag. DACRPB 0 The DAC buffer
in „Freescale s08mm128 und USB“ · Mikrocontroller und Digitale Elektronik ·
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PDF
DM00135183.pdf
(DAC_DHR8RD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 418 14.5.12 DAC channel1 data output register (DAC_DOR1) . . . . . . . . . . . . . . . . 418 14.5.13 DAC channel2
in „STM32F446 FMP I2C kein Open Drain möglich?!“ · Mikrocontroller und Digitale Elektronik ·
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PDF
A20_user_manual_v1.3_20141010.pdf
0x08 DAC FIFO Status Register AC_DAC_TXDATA 0x0C DAC TX Data Register AC_DAC_ACTL 0x10 DAC Analog Control Register AC_DAC_TUNE 0x14 DAC/ ADC Performance Tuning Register AC_ADC_FIFOC 0x1C ADC FIFO Control Register
in „DDR3 RAM Datenleitung beliebig anschliessen“ · Mikrocontroller und Digitale Elektronik ·
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PDF
atmel_32uc.pdf
Ethernet MAC MACB 17 0 USB 2.0 OTG Interface USBB 18 0 SDRAM Controller SDRAMC 19 0 Audio Bitstream DAC DAC 10.4 Clock Connections 10.4.1 Timer/Counters Each Timer/Counter channel can independently select an internal or external clock source for its counter: Table 10-4. Timer/Counter clock connections
in „V: ATMEL 32UC3A0512-U“ · Markt ·
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PDF
kicad_8450_dcm_liste_neu_v3.pdf
ADC (32 Mhz), SSOP-28 AD9283 ADC 50MHz 8 bits, SSOP-20 AD9708AR Video DAC (32 MHz), SOIC/TSSOP-28 ADC0800 Analog to Digital 8 bits converter, DIP-18 (Hermetic) ADC08060 Fast ADC (20 .. 60 Mhz), TSSOP-24 ADC0832 2 inputs AD Converter (serial output), ADC1173 Fast ADC (15 Mhz
in „KiCAD Eeschema, Bibliotheksdokumentation *.dcm als PDF-Datei“ · Platinen ·
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MT6223C.pdf
DAC STEREO_L STEREO_R External Flash Boot MCU/DSP DMA Memory SRAM TRX_I ADC ROM Interface Controller Interface Melody TRX_Q ADC Baseband Path DAC DAC Bridge On-Chip MPU SRAM Aux Aux LCD ADC ADC ADC ARM7EJ-S
in „GSM-Modul (SIM908) nur analoge Ausgänge für Anruf?“ · HF, Funk und Felder ·
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PDF
bq24725.pdf
SRP SRN 3973 4096 4219 mA ChargeCurrent() = 0x1000H –3% 3% 1946 2048 2150 mA ChargeCurrent() = 0x0800H –5% 5% Charge Current Regulation Accuracy 410 512 614 mA CHRG_REG_ACC ChargeCurrent() = 0x0200H 10mΩ current sensing resistor –20% 20% 172 256 340 mA ChargeCurrent() = 0x0100H –33% 33% 64 128 192 mA
in „[V] 3St TI LiIon Lade/ Batterie-Management Chips: BQ24725RG und BQ24072RG“ · Markt ·
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Datei
disaess.txt
0x07800000 07f0 .word 0x00000045 07f4 .word 0x00000246 07f8 .word 0x00000447 07fc .word 0x00000648 0800 .word 0x00000849 0804 .word 0x9c03b460 0808 .word 0x9c03bd70 080c .word 0x9c03c680 0810 .word 0x9c03ca90 0814 .word 0x00000a40 0818 .word 0x00000c41 081c .word 0x00000e42 0820 .word 0x40001043 0824
in „Vermutliches TMS320C6xx-Binary disassemblieren“ · Digitale Signalverarbeitung / DSP / Machine Learning ·
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Datei
platformio.ini
/closedloop.cpp> -<src/feature/controllerfan.cpp> -<src/gcode/feature/controllerfan> -<src/feature/dac> -<src/feature/digipot> -<src/feature/direct_stepping.cpp> -<src/gcode/motion/G6.cpp> -<src/feature/e_parser.cpp> -<src/feature/encoder_i2c.cpp> -<src/feature/ethernet.cpp> -<src/feature/fanmux.cpp>
in „Ender3 Z-Achse fährt mit Marlin nur nach oben“ · Mechanik, Gehäuse, Werkzeug ·
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Datei
objdump.txt
8007f9c: eafffeac b 8007a54 <__kernel_rem_pio2+0x614> 8007fa0: 2aaaaaab .word 0x2aaaaaab 8007fa4: 0800af44 .word 0x0800af44 8007fa8: 3e700000 .word 0x3e700000 8007fac: 41700000 .word 0x41700000 8007fb0: 40200000 .word 0x40200000 8007fb4: 3ff00000 .word 0x3ff00000 8007fb8: 0800af58 .word 0x0800af58 8007fbc
in „STM32F4 HardFault Interrupt bei stdlib Funktionen“ · Mikrocontroller und Digitale Elektronik ·