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Datei
MD_NMRA_DCC.h
cv13_init = 3, cv14_init = 0, cv15_init = DCC_DecoderKey, cv16_init = DCC_DecoderLock, cv17_init = 192, cv18_init = 128, cv19_init = 3, cv20_init = 0, cv21_init = 0, cv22_init = 0, cv23_init = 0, cv24_init = 0, cv25_init = 0, cv26_init = 0, cv27_init = 0, cv28_init = 0, cv29_init = CV29_init_by_dec_type
in „FULL NMRA DCC Library, Encoder, Generator, Bremsmodul“ · Projekte & Code ·
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Datei
All.txt
DOPPELDIODE.LBR SAL41B 3 VD01 DOPPELDIODE DOPPELDIODE DOPPELDIODE.LBR SAL41B 3 U$9 2.5"HDD 2.5"HDD 2.5"HDD 3 U$8 MAX3000 MAX3000 TSSOP20 3 U$7 MAX3000 MAX3000 TSSOP20 3 U$6 MAX3000 MAX3000 TSSOP20 3 U$5 MAX3000 MAX3000 TSSOP20 3 U4 XBEE XBEE XBEE XBee (TM) /XBee-PRO(TM) OEM RF Modules 3 U$4 MAX3000 MAX3000 TSSOP20
in „[KiCad] Bibliotheksaufbau - Konzeptideen gesucht“ · Platinen ·
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PDF
FSP_SHB_D.pdf
. Juni 2002 Seriennummer: Prüfer: Datum: Unterschrift: Eigenschaft enthalten in Min.-Wert Ist-Wert Max. -Wert Einheit Meßtoleranz RF Trigger-Pegel bei Seite 1.21 128 MHz: - 5 dBm -7.5 ________ -2.5 dBm –10 dBm –12.5 ________ –7.5 dBm –15 dBm –17.5 ________ –12.5 dBm –20 dBm –22.5 ________ –17.5 dBm –
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PDF
ATmega48PA-ATmega88PA-ATmega168PA_Datasheet.pdf
. There are two cases that give a transition without compare match. ● OCRnx changes its value from MAX, like in Figure 15-7. When the OCR0A value is MAX the OCn pin value is the same as the result of a down-counting compare match. To ensure symmetry around BOTTOM the OCnx value at MAX must correspond
in „Probleme mit Int Capt ISR ATmega48PA“ · Mikrocontroller und Digitale Elektronik ·
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PDF
asus-p701-unlocked.pdf
ACOK# 3 1 Vcls=3.413V GND K U 2 2 G1 N D1 7 2 1 1 MAX8724_REF MAX8724_LDO 5 0 2 T PR9 MAX8724_LDO PL1 PR8 /X S G PR12 7 1 S BAT_LX_20mil 3 S2 D2 6 1 2 1 2 BAT 2 PQ7 10KOhm _ 2 1 0 2N7002 GND 1 A 2 4 G2 N D2 5 2 S 6.2UH 2 25mOHM E 5 /X GND B 33Ohm 1 Irat
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PDF
Ritto_System_Handbuch_2011_online.pdf
Vb 1 7867 o t a l t ED ED ED s n I a b ED ED Va Vb a b ED ED Va Vb a b ED ED Va Vb 1 7867 ED ED ED max. 30 max. 30 max. 30 L N Va Vb L N Va Vb L N Va Vb 1 6481 L N 1 2 3 4 11 21 a1 b a2 b a3 b 1 7573 Va Vb Va Vb + E+ Va Vb Va Vb 1 4813 1 8783/ Va Vb 80 1 2 1 8789 LT 1 2 3 4 1 8759/ 1 8760 1 8753 S0251
in „Ritto Twinbus“ · Haus & Smart Home ·
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PDF
ATtiny26.pdf
(L) 1477K–AVR–08/10 ATtiny26(L) Table 16. Reset Characteristics Symbol Parameter Condition Min Typ Max Units Power-on Reset Threshold 1.4 2.3 V Voltage (rising) VPOT Power-on Reset Threshold Voltage (falling) 1.3 2.3 V VRST RESET Pin Threshold Voltage 0.2 0.9 V CC Minimum pulse width on tRST RESET Pin
in „ATtiny26(L) Analog-Digital-Wandler ( ADC ) Datenblattübersetzung“ · Mikrocontroller und Digitale Elektronik ·
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PDF
Spartan-3A_FPGA_Family.pdf
Single-Ended Standards (2) IOSTANDARD V CCO for Drivers V REF V IL V IH Attribute Min (V) Nom (V) Max (V) Min (V) Nom (V) Max (V) Max (V) Min (V) LVTTL 3.0 3.3 3.6 0.8 2.0 LVCMOS33 (4) 3.0 3.3 3.6 0.8 2.0 LVCMOS25 (4,5) 2.3 2.5 2.7 0.7 1.7 LVCMOS18 1.65 1.8 1.95 V REF is not used for 0.4 0.8 these I
in „Ultraschallgerät(Medizin) HMI Touch Vertikale Streifen“ · FPGA, VHDL & Co. ·
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PDF
digitalSTROM.pdf
zwei USB-Schnittstellen und ei- 16A 230V AC LS ne RJ45-Schnittstelle, über die der dSS per 230V AC LS max. 62dSM 230V AC TCP/IP-Protokoll die Verbindung zum Inter- 16A net herstellt. 230V AC LS AB AB A B + – +– + – Netzwerkanbindungen 1 23 1 23 1 2 3 Mit einem dSS und dessen RJ45-Schnitt- 120Ω 120Ω A B
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PDF
Agilent_6000_Userguide.pdf
cable tray) Pomona 4119-50 50-Ohm Feedthrough (not available from Agilent Technologies) 1130A InfiniiMax 1.5 GHz InfiniiMax differential probe amplifier 1141A InfiniiMax 200 MHz differential probe (with 1142A power supply) 1144A 800 MHz active probe (with 1142A power supply) 1145A 750 MHz 2-channel active
in „Wittig(welec) DSO W20xxA Open Source Firmware (Teil2)“ · Mikrocontroller und Digitale Elektronik ·
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PDF
ST20450.pdf
address formultiplexed-addressed memory during RAStime.It is irrelevant at all other times. 7 BusRelMax0 Thisis a 2-bit value(BusRelMax1 is bit 7 ofConfigDataField1 forbank 3, refer Table 8.14) which encodes a pointer to the EMI bank with the greatest BusRelease time. This BusReleasetime will beinserted
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PDF
T83C5121.PDF
20 nA.s Max. duration 400 ns CV CC Spikes on CVcc 4.6 5.4 V Max. variation CIcc 100 mA (1) CIcc = 0 TVHLl CVcc to 0 750 μs CVcc = 5V to 0.4V (1) Note: 1. Capacitor = 10 µF, X7R type. Maximum ESR value is 250 mohm
in „[V] 1 Stange ältere (ca. 56St) Atmel AT89C5121 mit Interface für Chipkarten/ SIM (9€)“ · Markt ·
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PDF
T83C5121.PDF
20 nA.s Max. duration 400 ns CV CC Spikes on CVcc 4.6 5.4 V Max. variation CIcc 100 mA (1) CIcc = 0 TVHLl CVcc to 0 750 μs CVcc = 5V to 0.4V (1) Note: 1. Capacitor = 10 µF, X7R type. Maximum ESR value is 250 mohm
in „[V] noch 1 Stange ältere (60St) Atmel AT89C5121 mit Interface für Chipkarten/ SIM (9€)“ · Markt ·
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PDF
Datasheet_ATmega1281_doc2549.pdf
TOM. There are two cases that give a transition without Compare Match. OCR0A changes its value from MAX, like in Figure 16-7. When the OCR0A value is MAX the OCn pin value is the same as the result of a down-counting Compare Match. To ensure symmetry around BOTTOM the OCn value at MAX must correspond
in „LM73 über TWI/I2C mit Atmega1281 auslesen“ · Mikrocontroller und Digitale Elektronik ·
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PDF
IS2100EV1.61.pdf
displays z Singular power supply combined with the IS2200 (2.5V - 3.1V) z 176RGB x 240-dot displays max. z 18/16/8 bit parallel bus interface and 9/8-bit serial interface z Incorporates an 8-color display mode z Window access mode of the internal Display Data RAM z Gamma correction function z Internal
in „LCD-Modul OPTREX 351570AG“ · Mikrocontroller und Digitale Elektronik ·
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PDF
AVR_ATmega_328PB.pdf
set. The first figure below illustrates timing data for basic Timer/Counter operation close to the MAX value in all modes other than Phase Correct PWM mode. Figure 19-8 Timer/Counter Timing Diagram, no Prescaling clkI/O clkTn (clI/O1) TCNTn MAX - 1 MAX BOTTOM BOTTOM + 1 TOVn The next figure shows the
in „ATmega328PB: UART(MC) empfängt falsche Daten“ · Mikrocontroller und Digitale Elektronik ·
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PDF
tl16c752b.pdf
Note 9) 5 MHz, 3.6 V 6 mA Sleep mode, 3.6 V 1.2 NOTES: 3. Meets TTL levels, V IO(min)= 2 V and IH(max) = 0.8 V on nonhysteresis inputs. 4. Applies for external output buffers. 5. These junction temperatures reflect simulated conditions. Absolute maximum junction temperature is 150⋅C. The customer is
in „tl16c752b - externe Schnittstelle“ · Mikrocontroller und Digitale Elektronik ·
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PDF
Si4430-31-32.pdf
Sensitivity = –121 dBm Antenna diversity and TR switch control Output power range +20 dBm Max (Si4432) Configurable packet handler +13 dBm Max (Si4430/31) Preamble detector Low Power Consumption TX and RX 64 byte FIFOs Low battery detector 18.5 mA receive Temperature sensor
in „Leistungsanpassung bei bipolar Transistoren?“ · Analoge Elektronik und Schaltungstechnik ·
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PDF
HX8340-B_T__DS_preliminary_v01_080313.pdf
is determined by BT3-0 bits. Connect to a capacitor stabilizing capacitor between GND and VGH. VGH=max 15.3V A negative power output from the step-up circuit 2 for the gate line drive circuit. VGL O 1 Stabilizing The step-up rate is determined by BT(3-0)its. Connect to a capacitor stabilizing capacitor
in „SAMMELBESTELLUNG: 2"2 TFT Display mit 16bit digital interface“ · Markt ·
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PDF
ATtiny841_Datasheet.pdf
Flag Mode WGM02 WGM01 WGM00 Mode of Operation TOP OCRx at Set on(1) 0 0 0 0 Normal 0xFF Immediate MAX 1 0 0 1 PWM, Phase Correct 0xFF TOP BOTTOM 2 0 1 0 CTC OCRA Immediate MAX 3 0 1 1 Fast PWM 0xFF BOTTOM MAX 4 1 0 0 Reserved – – – 5 1 0 1 PWM, Phase Correct OCRA TOP BOTTOM 6 1 1 0 Reserved – – – 7
in „TOCPMSA1 und TOCPMCOE Verhalten beim Attiny 841“ · Mikrocontroller und Digitale Elektronik ·
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PDF
ATtiny441_841.pdf
Flag Mode WGM02 WGM01 WGM00 Mode of Operation TOP OCRx at Set on(1) 0 0 0 0 Normal 0xFF Immediate MAX 1 0 0 1 PWM, Phase Correct 0xFF TOP BOTTOM 2 0 1 0 CTC OCRA Immediate MAX 3 0 1 1 Fast PWM 0xFF BOTTOM MAX 4 1 0 0 Reserved – – – 5 1 0 1 PWM, Phase Correct OCRA TOP BOTTOM 6 1 1 0 Reserved – – – 7
in „Suche nach ATtiny mit ADC und Gain > 20x“ · Mikrocontroller und Digitale Elektronik ·
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PDF
ATtiny841_Datasheet.pdf
Flag Mode WGM02 WGM01 WGM00 Mode of Operation TOP OCRx at Set on(1) 0 0 0 0 Normal 0xFF Immediate MAX 1 0 0 1 PWM, Phase Correct 0xFF TOP BOTTOM 2 0 1 0 CTC OCRA Immediate MAX 3 0 1 1 Fast PWM 0xFF BOTTOM MAX 4 1 0 0 Reserved – – – 5 1 0 1 PWM, Phase Correct OCRA TOP BOTTOM 6 1 1 0 Reserved – – – 7
in „sleep und Interrupt“ · Mikrocontroller und Digitale Elektronik ·
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PDF
ATtiny841_Datasheet.pdf
Flag Mode WGM02 WGM01 WGM00 Mode of Operation TOP OCRx at Set on(1) 0 0 0 0 Normal 0xFF Immediate MAX 1 0 0 1 PWM, Phase Correct 0xFF TOP BOTTOM 2 0 1 0 CTC OCRA Immediate MAX 3 0 1 1 Fast PWM 0xFF BOTTOM MAX 4 1 0 0 Reserved – – – 5 1 0 1 PWM, Phase Correct OCRA TOP BOTTOM 6 1 1 0 Reserved – – – 7
in „Takt-Vorskalierungsregister beim Attiny841“ · Mikrocontroller und Digitale Elektronik ·
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PDF
MT6223C.pdf
– 0.4 EA6 ▯ max 16, min 2 ▯ 0.4 ▯ ▯ EA7 ▯ max 16, min 2 ▯ 0.4 VMEM – 0.4 ▯ ▯ VMEM – 0.4 EA8 ▯ max 16, min 2 ▯ 0.4 ▯ ▯ EA9 ▯ max 16, min 2 ▯ 0.4 VMEM – 0.4 ▯ ▯ VMEM – 0.4 EA10 ▯ max 16, min 2 ▯ 0.4 ▯ ▯ EA11 ▯ max 16
in „GSM-Modul (SIM908) nur analoge Ausgänge für Anruf?“ · HF, Funk und Felder ·
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PDF
802.3-2008_section2.pdf
IEEE. All rights reserved. 253 IEEE Std 802.3-2008 REVISION OF IEEE Std 802.3: Table 28–9—Timer min./max. value summary Parameter Min. Typ. Max. Units autoneg_wait_timer 500 1000 ms break_link_timer 1200 1500 ms data_detect_min_timer 15 47 µs data_detect_max_timer 78 100 µs flp_test_min_timer 5 25 µs flp_test_max_timer
in „Kommunikation uC mit PHY“ · Analoge Elektronik und Schaltungstechnik ·
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PDF
Telit_Easy_GPRS_User__Guide_r9.pdf
speed with a GPRS class 10 multislot device is asymmetrical; 3 time slots in reception (43200 bps max) and 2 time slots in sending Reproduction forbidden without Telit Communications S.p.A. written authorization - All Rpage 13 of 90d Easy GPRS User Guide 80000ST10028 r9, 2010-10-04 (28800 bps max) or 4 time slots in reception (57600 bps max) and 1 time slot in sending (14400 bps max). • The controlling application of the module must have a TCP/IP - PPP software stack to interface with the GPRS modems. • The controlling application must
in „Probleme mit AT-Befehlen für GPRS Datenübertragung TELIT 864“ · Mikrocontroller und Digitale Elektronik ·
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PDF
Sager_D87P_Service_Manual_Part4.pdf
[25,26,27,28,29,30,PME# PDA2 AC19 W21 SDA2 R243 [22] PDA2 PDA1 AD19 PDA2 SDA2 W23 SDA1 T149 IRQ14 R192 10K DBR# 2 1 [22] PDA1 PDA0 AA19 PDA1 SDA1 W22 SDA0 T334 [3] DBR# [22] PDA0 PDA0 SDA0 T328 VCC3S 150 PDCS3# Y18 V20 SDCS3# VCC3 [22] PDCS3# PDCS1# AB19 PDCS3# SDCS3# V22 SDCS1# T166 CLK_ICHPCI PIORDY
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PDF
mikrobeginner_gesamt.pdf
256 250 (150) 150 (250) 1024 256 250 240 200 192 160 150 128 1 (18750) (19200) (20000) (24000) (25000) (30000) (32000) (37500) 250 240 200 192 160 150 8 (2400) (2500) (3000) (3125) (3750) (4000) 4.800.000 64 250 (300) 200 (375) 150 (500) 256 250 (
in „Attiny26 PortD“ · Mikrocontroller und Digitale Elektronik ·
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PDF
Datenblatt_Epson_S1D15G10_vom_Display_Controller.pdf
11487.0 133 V DDI 4966.0 190 NC 11607.0 134 GND 5071.0 191 NC 11661.0 1175.5 30 137 135 GND 5176.0 192 NC 11605.0 136 GND 5281.0 193 NC 11549.0 137 GND 5386.0 194 NC 11493.0 138 GND4 5491.0 195 NC 11445.0 139 GND4 5596.0 196 COM1 11397.0 140 GND4 5701.0 197 COM2 11349.0 141 GND4 5806.0 198 COM3 11301.0
in „The Siemens S65 132x176, 65536 color display with AVR“ · Projekte & Code ·
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PDF
S1D15G10.pdf
11487.0 133 V DDI 4966.0 190 NC 11607.0 134 GND 5071.0 191 NC 11661.0 1175.5 30 137 135 GND 5176.0 192 NC 11605.0 136 GND 5281.0 193 NC 11549.0 137 GND 5386.0 194 NC 11493.0 138 GND4 5491.0 195 NC 11445.0 139 GND4 5596.0 196 COM1 11397.0 140 GND4 5701.0 197 COM2 11349.0 141 GND4 5806.0 198 COM3 11301.0
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PDF
DD19FCD3d01.pdf
BOTTOM. There are two cases that give a transition without Compare Match. OCR0A changes its value from MAX, like in Figure 11-7 on page 66. When the OCR0A value is MAX the OCn pin value is the same as the result of a down-counting Compare Match. To ensure symmetry around BOTTOM the OCn value at MAX must
in „HV-Prog für ATtiny13“ · Mikrocontroller und Digitale Elektronik ·
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PDF
tiny13_doc2535.pdf
BOTTOM. There are two cases that give a transition without Compare Match. OCR0A changes its value from MAX, like in Figure 32. When the OCR0A value is MAX the OCn pin value is the same as the result of a down-counting Compare Match. To ensure symmetry around BOTTOM the OCn value at MAX must correspond to
in „Atmel AVRs: SRAM so unwichtig?“ · Mikrocontroller und Digitale Elektronik ·
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PDF
doc2535.pdf
. There are two cases that give a transition without Compare Match. • OCR0A changes its value from MAX, like in Figure 11-7 on page 66. When the OCR0A value is MAX the OCn pin value is the same as the result of a down-counting Compare Match. To ensure symmetry around BOTTOM the OCn value at MAX must
in „RGB PWM mit Attiny13“ · Mikrocontroller und Digitale Elektronik ·
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PDF
doc2535.pdf
. There are two cases that give a transition without Compare Match. • OCR0A changes its value from MAX, like in Figure 11-7 on page 66. When the OCR0A value is MAX the OCn pin value is the same as the result of a down-counting Compare Match. To ensure symmetry around BOTTOM the OCn value at MAX must
in „ATtiny13 mit 20MHz“ · Mikrocontroller und Digitale Elektronik ·
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PDF
LG4573A_DS_V1.1.5__1_.pdf
capacitor to each capacitor connection pin. Set the following voltages within the limits: DDVDH = max 6V, VCL = min -3V, VGH = max 18V, VGL = min -18V. 3. BT[2:0]=3’h4 mode is not recommended in auto power generation mode. If this mode is needed, manual power setting should be used. VBS[2:0] – Sets
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PDF
700185_wiesmeier_christoph_2016.pdf
Implementierung Currently Not Used Inputs D 5 6 k k k G 5 5 0 0 0 A R R 1 1 1 2 4 6 I I A A 1 3 5 9 8 7 MAX14920 1 2 3 CV0=1u 62 CV0 T T T /CS 64 BAL_MAX_/CS SCLK 1 BAL_SPI_CLK C67 61 CT1 SDI 2 BAL_SPI_MOSI BAL1 u 4 60 BA1 SDO 3 BAL_SPI_MISO CV1 1 C 59 CV1 <=1u 63 BAL_MAX_EN 58 EN C66 57 CB2 4 BAL_MAX_SAMPLE
in „2A 1s Li-ion Lader + Protection“ · Analoge Elektronik und Schaltungstechnik ·
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PDF
ml280epson_tcm3-37706.pdf
240 Punkte/Zoll Zeichenmatrix Breite x Höhe HSD UTL NLQ 9x7 9x9 17x17 A-1 Anhang A: Technische Daten max. Papiertransport- geschwindigkeit 2 Zoll/Sekunde max. Zeilenvorschub- 100 msec (bei 6 Zeilen pro Zoll) Geschwindigkeit 080 msec (bei 8 Zeilen pro Zoll) Papierzufuhr von oben manuelle Zufuhr von oben
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PDF
STM32Cube-MX-HAL-MOOC-presentation-16-9.pdf
Timer A 32KHz + 8~25MHz • Other IPs DMA Int. RC oscillators 16 Channels APB1 32KHz + 16MHz Bridge (max 42MHz) Clock Control AHB1 PLL (max 84MHz) 36/82 I/Os 2x 16-bit Timer RTC / AWU Bridge 2x 32-bit Timer 1x6x 16-bit PWM 2x SPI/I2S 2x Watchdog (Advanced Motor control) (independent & window) 1x USART/
in „STM32 HAL Tutorial“ · Mikrocontroller und Digitale Elektronik ·
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PDF
Atmega128_doc2467.pdf
fixed to 8 bits. In phase correct PWM mode the counter is incremented until the counter value matches Max When the counter reaches MAX, it changes the count direction. The TCNT0 value will be equal to MAX for one timer clock cycle. The timing diagram for the phase correct PWM mode is shown on Figure 40.
in „ATMEGA128 Timer“ · Mikrocontroller und Digitale Elektronik ·
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PDF
tiny13.pdf
BOTTOM. There are two cases that give a transition without Compare Match. OCR0A changes its value from MAX, like in Figure 32. When the OCR0A value is MAX the OCn pin value is the same as the result of a down-counting Compare Match. To ensure symmetry around BOTTOM the OCn value at MAX must correspond to
in „ATtiny13 Datenblatt External Clock Source on T0-Pin“ · Mikrocontroller und Digitale Elektronik ·
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PDF
adxl380.pdf
I2C_HSM_EN=0 I2C_HSM_EN=1 (FastMode) (HighSpeedMode) TestConditions/ Parameter Symbol Comments Min Max Min Max Unit DCINPUTLEVELS InputVoltage LowLevel V 0.3×V 0.3×V V IL DDIO DDIO HighLevel VIH 0.7×VDDIO 0.7×V DDIO V HysteresisofSchmittTriggerV 0.05×V 0.1×V V HYS DDIO DDIO Inputs InputCurrent IL 0.1
in „ADXL380 mit SPI auslesen“ · Mikrocontroller und Digitale Elektronik ·
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PDF
ATmega32.pdf
to eight bits. In phase correct PWM mode the counter is incremented until the counter value matches MAX. When the counter reaches MAX, it changes the count direction. The TCNT0 value will be equal to MAX for one timer clock cycle. The timing diagram for the phase correct PWM mode is shown on Figure 33
in „STK500 als ISP“ · Mikrocontroller und Digitale Elektronik ·
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PDF
ATM16_doc2466.pdf
to eight bits. In phase correct PWM mode the counter is incremented until the counter value matches MAX. When the counter reaches MAX, it changes the count direction. The TCNT0 value will be equal to MAX for one timer clock cycle. The timing diagram for the phase correct PWM mode is shown on Figure 33
in „ISP - Pinbelegung“ · Mikrocontroller und Digitale Elektronik ·
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Datei
flashlog.txt
flash ############### (total 450 bytes transferred in 0.68 s (661 bytes/s) Polling: count = 8, min/avg/max = 13.62/14.06/14.65 ms Verifying: flash #flash error at address 0x0: file=0x12, mem=0x00 flash error at address 0x1: file=0xc0, mem=0x00 flash error at address 0x2: file=0x2b, mem=0x01 flash error at
in „ATMega8 nur bei geringer Taktfrequenz flashbar“ · Mikrocontroller und Digitale Elektronik ·
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PDF
SAM9_EVAL-01.pdf
C185 m _+3V3 4u7 4u7 100n 1n 4u7 100n +5V +3V3 N N e IC120 G6 4 5 3 3 8 0 G0 L120 1 2 3 5 1 2 1 s MAX1951_SO8 1 2 8 7 2u2 s IN LX 1 VCC for current measurement a R120 5 COMP FB 4 DGND 10R 6 R122 C123 3 PGND 2 10n R121 GND REF +3V3 A_3V3 C126 C127 C128 +3V3 +3V3_HEADER C120 C121 C122 4u7 4u7 100n 100n
in „AT91RM9200 Bootstrap loader“ · Mikrocontroller und Digitale Elektronik ·
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Datei
dw_programming_dragon.txt
Size #Pages MinW MaxW ReadBack ----------- ---- ----- ----- ---- ------ ------ ---- ------ ----- ----- --------- hfuse 0 0 0 0 no 1 0 0 4500 4500 0x00 0x00 Block Poll Page Polled Memory Type Mode Delay Size Indx Paged Size
in „avrdude fuses aus debugwire schreiben“ · Mikrocontroller und Digitale Elektronik ·
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Datei
CoolTerm_Capture__FritzAVM_1V8.CoolTermSettings__2026-06-27_08-52-21-633.txt
0.080841][ T1] [rte_ipi] Available IPIs 6 [ 0.081271][ T1] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns [ 0.081326][ T1] futex hash table entries: 1024 (order: 4, 65536 bytes) [ 0.081883][ T1] pinctrl core: initialized pinctrl subsystem [ 0.083847][
in „FRITZ!Box 7490 Bootloop“ · Mikrocontroller und Digitale Elektronik ·
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PDF
Ateme16.pdf
to eight bits. In phase correct PWM mode the counter is incremented until the counter value matches MAX. When the counter reaches MAX, it changes the count direction. The TCNT0 value will be equal to MAX for one timer clock cycle. The timing diagram for the phase correct PWM mode is shown on Figure 33
in „Atmega16 und spi bus“ · Mikrocontroller und Digitale Elektronik ·
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PDF
Ateme16.pdf
to eight bits. In phase correct PWM mode the counter is incremented until the counter value matches MAX. When the counter reaches MAX, it changes the count direction. The TCNT0 value will be equal to MAX for one timer clock cycle. The timing diagram for the phase correct PWM mode is shown on Figure 33
in „Atmega16 und spi bus“ · Mikrocontroller und Digitale Elektronik ·
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PDF
311_Schaltungen.pdf
-Treiber-Elektronik die Sende-Stufe mit einer Art Tristate-Modus abschalten können. Beim bekannten MAX232 geht das leider nicht, dafür aber bei den Typen ICL3321 und MAX242. Tx: cmd arg0 arg1 ... argX/n Rx: cmd arg0 arg1 ... argX/n Beide verfügen über Low-Power-Shut- replyline1/n down-Modi, die sogar
in „[S] Sammlung von elektr. Schaltungen“ · Mikrocontroller und Digitale Elektronik ·