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PDF
attiny84.pdf
in Table 8-3. Table 8-3. Watchdog Timer Prescale Select Number of WDT Oscillator Typical Time-out at WDP3 WDP2 WDP1 WDP0 Cycles VCC= 5.0V 0 0 0 0 2K cycles 16 ms 0 0 0 1 4K cycles 32 ms 0 0 1 0 8K cycles 64 ms 0 0 1 1 16K cycles 0.125 s 0 1 0 0 32K cycles 0.25 s 0 1 0 1 64K cycles 0.5 s 0 1 1 0 128K
in „Attiny 84 ISP?!“ · Mikrocontroller und Digitale Elektronik ·
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PDF
ec0e6f47-c1bb-4675-a7a3-18d434f2b127.pdf
of the „Overheated Alarm battery. Switch“ fjeld. • - Settings You can illuminate You will fjnd the at the battery’s charge the top right after you level indicator using have selected the bat- the „Battery identifj- tery. 48 GB MT Press the icon again The battery can also and you can assign a be removed
in „Makita 18V Akku Kapazitätsmessung“ · Mechanik, Gehäuse, Werkzeug ·
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PDF
TLV2462.pdf
thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF TLV2460, TLV2460A
in „frage zu einfachem uC Ohmmeter“ · Mikrocontroller und Digitale Elektronik ·
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PDF
E3634ser.pdf
ioog<gs>gawgS2A-g0wcgAf- g;.Mwtag- f3lAgn3ga AgHgwva2va tAfogovAgawgtwfog-vccA3ag- f3lAS7 @wfogMwtaflA 5vkacf-agMwtaflAgocw2gn3gtwfogtAfoSg0cwsgS2A-n0nAogwva2vag MwtaflAgcfan3l7g 1m)(mcyb%cms&lm**fCfmpb4ss89:sl*sl
in „0-30V 25A Netzteil“ · Analoge Elektronik und Schaltungstechnik ·
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Datei
CRTIR.asm
Updated every 64us inc inttemp brne TIM_EXIT inc timerH ; if 256th int inc timer TIM_EXIT: out sreg,S ; Restore SREG reti LINE_CAL: mov C_LineL,S_Line out sreg,S ; Restore SREG reti ;Bildzeile 0-199 Ausgeben .ORG 0x100-3 BLine: clr r17 dec C_LineL out sreg,S ; Restore SREG reti TIM1_COMPB: in S,sreg
in „BW-CRT-Controller aus Mega8 bauen“ · Mikrocontroller und Digitale Elektronik ·
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Datei
nibble_data.vhd
-------- -- Calutate the TCP checksum using logic -- This should all colapse down to a constant -- at build-time (example #s found on the web) ---------------------------------------------- --- Step 1) 4500 + 0030 + 4422 + 4000 + 8006 + 0000 + (0410 + 8A0C + FFFF + FFFF) = 0002BBCF (32-bit sum) ip_checksum1
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PDF
bluenrg-2.pdf
capture IO for Timer/Counter 1 and Timer/Counter 2 of both MFT1 and MFT2, depending on which timer(s) are configured in capture mode. In PWM mode, the signal is output on PWM0 IO for MFT1 and PWM1 for MFT2. Those IOs are available at different GPIOs thanks to alternate option. So to output the chosen
in „DC/DC-Wandler im ST BlueNRG-2 - Wofür?“ · Mikrocontroller und Digitale Elektronik ·
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Datei
CT0889_Mini-DOS.asm
; MINI-DOS EMULATION ; Mit MASM ab Vers. 4.0 ; c't Podien,A.S 8/89 DSIBM segment at 40h ORG 0A2h MODE21 dw ? DAT1 dw ? DAT2 dw ? HOURS DB ? MIN DB ? SECS DB ? DSIBM ends EXTRN PARSE:FAR ; zum eigenen Monitor code segment public 'CODE' assume cs:code, ds:dsibm,
in „[S] 8086 oder 8088“ · Markt ·
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PDF
Stromausfall-2006.pdf
passieren können, so lange noch 31ne der beiden Leitungen angeschaltet ist. UCTE-Abschlussbericht, S. 48 f.. Auch der ERGEG-Abschlussbericht, S. 12, befasst sich mit der Angabe von E.ON Netz, dass es eine plötzliche und unvorhersehbare Lastflussänderung gegeben habe. ERGEG sieht diese Angabe als nicht schlüssig belegt an. 32UCTE-Abschlussbericht, S. 19 33Die Zitate entstammen dem Untersuchungsbericht von E.ON Netz vom 14. November 2006, S. 19 f. 21 des 4. November 2006 Fehlentscheidungen getroffen wurden. Generell kann nicht außer Acht gelassen
in „Kraftwerk einschalten“ · Analoge Elektronik und Schaltungstechnik ·
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PDF
SlavemodeSPEC_eng.pdf
/1/24 2.2 Sophia Add STREAM_GetProgrameInfo command Add one more status (Sorting_Change status) to S 2011/2/11 2.3 Sophia TREAM_GetPlayStatus command KeyStone Semiconductor Confidential & Proprietary, no copy allowed without written authorization. P.2/20 File name：Command Specification of Slave Mode
in „DAB+ Modul KeyStone 8650“ · Mikrocontroller und Digitale Elektronik ·
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PDF
onkyo_tx_nr_616_service_manual.pdf.pdf
Routing, QoS Serial Console UART1 USB 1.1 NET_BCLK RJ-45 RMII 0 NET_LRCK Tx+/- Tx+/- S NET_ADAT0 3 Rx+/- Rx+/- MDIO McASP1 AXR1_5 -0 McASP1 AXR1_6 -11 c NETMCK 50MHz M PHY 0 1 2 3 4 5 t t t t at t K K L K K t t at
in „Onkyo verstärker“ · Analoge Elektronik und Schaltungstechnik ·
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PDF
IDE11.PDF
des Assemblers ................... 82 Anhang E: Tastaturkommandos des integrierten Editors ........ 89 Anhang F: Motorola S-Record Format .......................... 92 Anhang G: Format der Symboldatei ............................. 95 Anhang H: Liste der HC11 Assembleranweisungen ............ 97 IDE11
in „Programm zum MC68HC11 auslesen und programmieren“ · Mikrocontroller und Digitale Elektronik ·
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PDF
AN332-1_Programming_Guide.pdf
(default). 1 = Sample on DCLK falling edge. Digital Mode. 0000 = default 2 6:3 IMODE[3:0] 0001 = I S Mode. 0111 = Left-justified mode. 1101 = MSB at 1 DCLK rising edge after DFS Pulse. 1001 = MSB at 2ndDCLK rising edge after DFS Pulse. Mono Audio Mode. 2 IMONO 0 = Stereo audio mode (default). 1 = Mono
in „Si4705 und C8051F321 kommunizieren nicht“ · Mikrocontroller und Digitale Elektronik ·
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Datei
cpu_z_log.txt
53f56307-b6bf-11d0-94f2-00a0c91efb8b} Name WDC WD10EZEX-60WN4A0 Revision 01.01A01 Serial WD-WCC6Y3FLL3AT Capacity 931.5 GB Type Fixed Bus Type SATA (11) Rotation speed 7200 RPM Features SMART Controller Serial ATA Controller - AHCI at bus 1, device 0, function 1 Link Speed PCI-E 4x @ 8.0 GT/s Volume h:\
in „Frage zu neues Mainboard anschaffen“ · PC Hard- und Software ·
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PDF
slod006b.pdf
noise alone, by only 0.0001 dB (9.000 dBm – 8.999 dB) when the signal is at reference sensitiv- ity level. At f = 52 MSPS, the converter SNR required to fit the GSM–900 signal is s adc (46 – 24.15) dB = 22 dB. The effective number of bits (ENOB) required for fitting the GSM–
in „Einfache Verstaerkerschaltung mit OP“ · Analoge Elektronik und Schaltungstechnik ·
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PDF
OP_Amps_for_slod006b.pdf
noise alone, by only 0.0001 dB (9.000 dBm – 8.999 dB) when the signal is at reference sensitiv- ity level. At f = 52 MSPS, the converter SNR required to fit the GSM–900 signal is s adc (46 – 24.15) dB = 22 dB. The effective number of bits (ENOB) required for fitting the GSM–
in „Vor- und Nachteile: Unipolare vs. Bipolare Spannungsversorgung bei OpAmps“ · Analoge Elektronik und Schaltungstechnik ·
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PDF
manual_maestro.pdf
numbers are listed below: • Serial Signal Error (bit 0) A hardware-level error that occurs when a byte’s stop bit is not detected at the expected place. This can occur if you are communicating at a baud rate that differs from the Maestro’s baud rate. • Serial Overrun Error (bit 1) A hardware-level error
in „Pegelwandler 3.3v -> 5v“ · Mikrocontroller und Digitale Elektronik ·
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PDF
XC866_ds_v12.pdf
T12 channel1 1 time channel control control control channel2 1 clock control start l t l t r a a a s p s p T13 channel3 p m m m t l t p c c c c o H o t compare interrupt 1 3 2 2 2 3 1 control input / output control 6 6 6 6 S S S 2 H H T T 0 T 1 T 2 O O O A 2 3 U U 6 U 6 U 6 P P P R T T C C C C C C C
in „Wie schnell ist der Counter eines 8-Bir µC's“ · Mikrocontroller und Digitale Elektronik ·
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PDF
90000897.pdf
CAUTION! This Part 15 radio device operates on a non-interference basis with other devices operating at this frequency when using the antennae listedin the Antenna Specification table. Any changes or modification to the product not expressly approved by Digi Internationalcouldvoidthe user’s authority to
in „[V] WEITERE gebrauchte DIGI-Connect-ME LAN-Seriell Module (10€/St.)“ · Markt ·
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PDF
MCP4261-DigitalPot-2Fach-50kDATASHEET.pdf
Resistance is defined as the resistance between terminal A to terminal B. 2: INL and DNL are measured at W with A = VDD and VB= V SS. 3: MCP4XX1 only. 4: MCP4XX2 only, includes WZSE and VWFSE. 5: Resistor terminals A, W and B’s polarity with respect to each other is not restricted. 6: This specification
in „Step Down Regler zu heiss & Fragen zur Umsetzbarkeit einer Schaltung“ · Analoge Elektronik und Schaltungstechnik ·
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Datei
Wie_archiviert_ihr_Websites__-_Mikrocontroller.net.htm
data-user-id="9502"> <script type="text/javascript"> have_newpost_anchor = false; topic_last_read_at = getLastReadAt(478096); </script> <script type="text/javascript"> if (!have_newpost_anchor && (!topic_last_read_at || topic_last_read_at < 1563981745000)) { document.write('<a name="new" id="new"></
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PDF
MCP4151.pdf
Resistance is defined as the resistance between terminal A to terminal B. 2: INL and DNL are measured at W with A = VDD and VB= V SS. 3: MCP4XX1 only. 4: MCP4XX2 only, includes WZSE and VWFSE. 5: Resistor terminals A, W and B’s polarity with respect to each other is not restricted. 6: This specification
in „Frage zum MCP4151 SPI Digital Poti?“ · Mikrocontroller und Digitale Elektronik ·
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PDF
T6963C.pdf
instruments, transportation instruments, traffic signal instruments, combustion control shall be made at the customer’s own risk.es of safety devices, etc.. Unintended Usage of TOSHIBA products listed in this document ▯The products described in this document are subject to the foreign exchange and foreign
in „[V] Grafikdisplay 240x128“ · Markt ·
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Datei
Shruthi2_102.txt
; //xy=1351,498 AudioMixer4 mixer21; //xy=1351,942 AudioMixer4 mixer22; //xy=1560,730 AudioOutputI2S i2s1; //xy=1745,728 AudioAnalyzePeak peak1; //xy=1722,1106 AudioConnection patchCord1(dc6, envelope6_1); AudioConnection patchCord2(dc5, envelope5_1); AudioConnection patchCord3(dc4, envelope4_1); AudioConnection
in „Teensy Synth "Shruthi 2"“ · Mikrocontroller und Digitale Elektronik ·
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PDF
slau144i.pdf
otherwise reset Mode Bits OSCOFF, CPUOFF, and GIE are not affected. Example Content of R5 is negated (2s complement). MOV #00AEh,R5 ; R5 = 000AEh INV R5 ; Invert R5, R5 = 0FF51h INC R5 ; R5 is now negated, R5 = 0FF52h Example Content of memory byte LEO is negated. MOV.B #0AEh,LEO ; MEM(LEO) = 0AEh INV.B
in „Anfängerprogramm TimerA MSP430“ · Mikrocontroller und Digitale Elektronik ·
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PDF
MC9S12DG128.pdf
PAD06/AN06 IOC0/PT0 5 56 PAD05/AN05 IOC1/PT1 6 55 PAD04/AN04 IOC2/PT2 7 54 PAD03/AN03 IOC3/PT3 8 MC9S12DG128E, MC9S12DG128, 53 PAD02/AN02 VDD1 9 MC9S12DJ128E, MC9S12DJ128, 52 PAD01/AN01 VSS1 10 MC9S12A128, SC515847, 51 PAD00/AN00 IOC4/PT4 11 SC515848, SC101161DG, 50 VSS2 IOC5/PT5 12 SC101161DJ, SC102203
in „HCS12 CPU Disassembler“ · Mikrocontroller und Digitale Elektronik ·
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PDF
SDA5273-3C.pdf
Semiconductor Group 20 1999-01-27 SDA 5273-3C Delta Specification MCI0_4 / COORDINATE_ROW_START 0 0 0 S_ROW_4 S_ROW_3 S_ROW_2 S_ROW_1 S_ROW_0 MCI0_3 / COORDINATE_COLUMN_START 0 0 S_COL_5 S_COL_4 S_COL_3 S_COL_2 S_COL_1 S_COL_0 MCI0_2 / COORDINATE_ROW_END 0 0 0 E_ROW_4 E_ROW_3 E_ROW_2 E_ROW_1 E_ROW_0 MCI0
in „Vollständiges Datenblatt über SDA 5273 gesucht“ · Mikrocontroller und Digitale Elektronik ·
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PDF
NMEA_manual_for_Fastrax_IT500_Series_GPS_receivers_V1_8.pdf
,N,02458.3270,E,0.01,0.00,121009,,,A*69 Format: $GPRMC,hhmmss.dd,S,xxmm.dddd,<N|S>,yyymm.dddd,<E|W>,s.s,h.h,ddmmyy,d.d, <E|W>,M*hh<CR><LF> UTC time of the fix. hh = hours hhmmss.dd mm = minutes ss = seconds dd = decimal part of seconds S Status indicator 2011-08-31
in „GPS - Shield von Antrax mit 10hz betreiben [Arduino Mega]“ · Mikrocontroller und Digitale Elektronik ·
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Datei
ff.c
e_cyl >> 2) & 0xC0) | 63); /* End sector */ p[7] = (BYTE)e_cyl; /* End cylinder */ st_dword(p + 8, s_part); /* Start sector in LBA */ st_dword(p + 12, sz_part); /* Number of sectors */ /* Next partition */ b_cyl += p_cyl; } st_word(p, 0xAA55); /* MBR signature (always at offset 510) */ /* Write it to
in „Arduino Sloeber - C Code einbinden“ · Mikrocontroller und Digitale Elektronik ·
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PDF
PIC_32_MX_110_F_016_-_I-SO__11-2-3___SO_28_.pdf
in hexadecimal. Note 1: All registers in this table have corresponding CLR, SET and INV registers at its virtual address, plus an offset of 0x4, 0x8 and 0xC, respectively. See Section 11.2 “CLR, SET and INV Registers” for more information. TABLE 4-26: CTMU REGISTER MAP s Bits r# r1 g t d0 s(e a s lF
in „pic32 flash und i/o speed“ · Mikrocontroller und Digitale Elektronik ·
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PDF
PIC_32M_X_220_F_032_B-50I-SP_____DIP_28_.pdf
in hexadecimal. Note 1: All registers in this table have corresponding CLR, SET and INV registers at its virtual address, plus an offset of 0x4, 0x8 and 0xC, respectively. See Section 11.2 “CLR, SET and INV Registers” for more information. TABLE 4-26: CTMU REGISTER MAP s Bits r# r1 g t d0 s(e a s lF
in „PIC32MX flash access time“ · Mikrocontroller und Digitale Elektronik ·
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PDF
Haier_LT26M1CA__LT26M1C_LCD_TV.pdf
11mm C954 067G215A4712KT EC 470uF 10V 8*12.5mm F901 084G 55 7 B FUSE 3.15A 250V BUSSMANN D901 093G 52 1552T DIODE 1N4007-E3/54 1A/1000V DO-41 74 26”LCD TV Haier LT26M1CA<26M1C D931 093G 5250S52T DIODE AU02Z-V1 SANKEN D930 093T1080 252T diode sarso1-v1 sanken D940 093T1080 252T diode sarso1-v1 sanken
in „Philips LCD TV kein Bild aber Ton [46PFL7655K/02]“ · Haus & Smart Home ·
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PDF
ulp_de.pdf
Suche an dieser Position. Negative Werte werden vom Ende des Strings her gezählt. Beispiel string s1 = "This is a string", s2 = "is a"; int pos = strrstr(s1, s2); if printf("The substring starts at %d\n", pos); else printf("The substring was not found\n"); strsplit() Funktion Teilt einen String in
in „EAGLE 7.7 Problem Export SVG mit eagle2svg-1_4_1.ulp“ · Platinen ·
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PDF
Si4330.pdf
150 kHz — –35 — dB (BER < 0.1%) 3-Ch Offset SelectivitC/I — –40 — dB 3-CH (BER < 0.1%) Blocking at 1 MHz 1M BLOCK Desired Ref Signal 3 dB above sensitiv—ty. –52 — dB 2 Interferer and desired modulated with Blocking at 4 MHz 4M BLOCK — –56 — dB Blocking at 8 MHz 8M 40 kbps F = 20 kHz GFSK with BT
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PDF
CPU08RM.pdf
value in two consecutive memory locations. The higher-order (most significant) eight bits are located at the address of M, and the lower-order (least significant) eight bits are located at the next higher sequential address. rel = The relative offset, which is the two’s complement number stored in the last
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Datei
rawsource.asm
reg_a,r16 rjmp emu_or emu_code_ef: ldi r16,0x28 rjmp emu_rst ;goto loop emu_code_f0: bst reg_f,aflag_s ;copy S flag rjmp emu_retc ;return if not set emu_code_f1: movw YL,SP_L adiw YL,2 movw SP_L,YL andi YH,STACKA subi YH,0xfe ld reg_a,-Y ld reg_f,-Y rjmp emu_loop emu_code_f2: bst reg_f,aflag_s ;copy S
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PDF
USB_Type-C_Spec_R2.1_-_May_2021.pdf
VBUS is at vSafe0V and the SRC.Rd state is on the Host-side port’s CC pin for at least tCCDebounce. If the port supports Audio Adapter Accessory Mode, it shall transition to AudioAccessory when the SRC.Ra state
in „USB-C Dual-Role-Device DRD mit integriertem OTG FS PHY“ · Mikrocontroller und Digitale Elektronik ·
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PDF
en.DM00091010.pdf
27 26 25 24 23 22 21 20 19 18 17 16 Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. C5S [3:0] rw rw rw rw 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 C4S [3:0] C3S [3:0] C2S [3:0] C1S [3:0] rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw Bits 31:20 Reserved, must be kept at reset value. Bits
in „EFM32F030 und Standby“ · Mikrocontroller und Digitale Elektronik ·
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PDF
2.transceiver_si4468.pdf
frequency. RF = 915 MHz With image rejection calibration i40 52 — dB Si446x. Rejection at the image fre- quency. RF = 915 MHz No image rejection calibration. Reje35 45 — dB tion at the image frequency. RF = 169 MHz With image rejection calibration i45 60 — dB Si446x
in „Transceiver Si4467 SPI Transfer PIC24“ · Mikrocontroller und Digitale Elektronik ·
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PDF
man_gcc.pdf
at this level even though it has undefined behavior according to the C++ standard because it writes past the end of the one-element array. struct S { int n, a[1]; }; S *s = (S *)malloc (sizeof *s + 31 *
in „avr-g++: external linkage von const/PROGMEM Symbol.“ · Mikrocontroller und Digitale Elektronik ·
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PDF
Atiny2313.pdf
TOP - 1 TOP - 2 TOVn (FPWM) and ICFn (if used as TOP) OCRnx Old OCRnx Value New OCRnx Value (Update at TOP) Figure 52 shows the same timing data, but with the prescaler enabled. Figure 52. Timer/Counter Timing Diagram, with Prescaler (f clk_I/O) clI/O clTn (clk /8) I/O TCNTn TOP - 1 TOP BOTTOM BOTTOM
in „Suche tutorial“ · Mikrocontroller und Digitale Elektronik ·
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PDF
BM77SPP_and_BM79BLETR__Command_Set_v0_96.pdf
..................................................................22 3.6.3 Leave_Configure_Mode (0x52) ........................................................................................22 4. Event Op Code Definition................................................................................
in „BM77 API für Blauzahn - Modul - Microchip“ · Mikrocontroller und Digitale Elektronik ·
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PDF
TQM167-Modul.pdf
70ms, max. 140ms). If the external watchdog is used, it must therefore be ensured that the interval at which the module software accesses port P7.6 is less than 70ms. • The first timeout period directly after a reset is typically 1.6s (min. 1s, max. 2.25s) • To deactivate the external watchdog, port P7.6
in „C167-Controller-Modul“ · Markt ·
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PDF
S7200SH.pdf
Die SIMATIC S7- 200 Produkte erfüllen die Anforderungen und Schutzrichtlinien der folgenden EU- Direktiven. - EG- Direktive 73/23/EEC ”Niederspannungsrichtlinie” - EG- Direktive 89/336/EEC ”EMV- Richtlinie” - EG-
in „SPS Step 7-Micro/win v4.0“ · Mikrocontroller und Digitale Elektronik ·
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PDF
cyc_c5v1-1299412.pdf
warrants performance of its semiconductor products to current specifications in accordance with Altera's standard warranty, but reserves the right to make changes to any products and services at any time without notice. Altera assumes no responsibility or liability arising out of the ap- plication or use
in „BMW Nightvision (FLIR PathfindIR) "Wärmebildkamera"“ · Mikrocontroller und Digitale Elektronik ·
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PDF
Assembler_Manual.pdf
PC + 1 16-bit Opcode: 1001 0100 1010 1000 42.2 Status Register (SREG) and Boolean Formula I T H S V N Z C – – – – – 0 – – N: 0 Negative Flag cleared. Example: add r2,r3 ; Add r3 to r2 cln ; Clear Negative Flag Words: 1 (2 bytes) Cycles: 1 52 Instruction Set Manual 0856J-AVR-07/2014 43. CLR – Clear
in „Zero Flag und Conditional Branches“ · Mikrocontroller und Digitale Elektronik ·
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PDF
MSP430FR59xx.pdf
SVSHIFG or none of the PMMIFGs is set. Any exit from LPMx.5 causes a BOR. The program execution starts at the address the reset vector points to. PMMLPM5IFG=1 indicates a wakeup from LPMx.5 or the System Reset Vector Word register SYSRSTIV can be used to decode the reset condition (refer to the device's
in „Probleme mit Konfiguration der SPI-Schnittstelle am MSP430“ · Mikrocontroller und Digitale Elektronik ·
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PDF
MSP430FR59xx.pdf
SVSHIFG or none of the PMMIFGs is set. Any exit from LPMx.5 causes a BOR. The program execution starts at the address the reset vector points to. PMMLPM5IFG=1 indicates a wakeup from LPMx.5 or the System Reset Vector Word register SYSRSTIV can be used to decode the reset condition (refer to the device's
in „Schaltung für Vibrationsmessung mit Piezo“ · Analoge Elektronik und Schaltungstechnik ·
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PDF
godsdebris.pdf
necessary?” he asked. “Look,” I said, “I’m holding the package and I’m walking 9 God’s Debris with it. That’s delivering. I’m delivering the package. That’s what I do. I’m a package-delivery guy.” “That’s one way to look at it. Another way is that both you and the package got here at the
in „Scott Adams ist tot“ · Offtopic ·
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PDF
Modbus_over_serial_line_V1_02.pdf
Turnaround delay should be shorter than the Response time-out. Typically the Response time-out is from 1s to several second at 9600 bps; and the Turnaround delay is from 100 ms to 200ms. Frame error consists of : 1) Parity checking applied to each character; 2) Redundancy checking applied to the entire frame
in „Modbus RTU Terminal, Freeware Programm“ · Mikrocontroller und Digitale Elektronik ·