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Datei
io430x16x.h
*/ unsigned short DAC12SREF0 : 1; /* DAC12 reference bit 0 */ unsigned short DAC12SREF1 : 1; /* DAC12 reference bit 1 */ } DAC12_0CTL_bit; } @ 0x01C0; enum { DAC12GRP = 0x0001, DAC12ENC = 0x0002, DAC12IFG = 0x0004, DAC12IE = 0x0008, DAC12DF = 0x0010, DAC12AMP0 = 0x0020, DAC12AMP1 = 0x0040, DAC12AMP2 = 0x0080, DAC12IR = 0x0100, DAC12CALON = 0x0200, DAC12LSEL0 = 0x0400, DAC12LSEL1 = 0x0800, DAC12RES = 0x1000, DAC12SREF0 = 0x2000, DAC12SREF1
in „Pins ein und ausschalten“ · Mikrocontroller und Digitale Elektronik ·
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PDF
MP600_DataSheet.pdf
AIU Registers 0x0801_2000 ~ 0x0801_3FFF UARTH Registers 0x0801_0000 ~ 0x0801_1FFF SIO Registers 0x0800_E000 ~ 0x0800_FFFF Timer Registers 0x0800_C000 ~ 0x0800_DFFF DMA Control Registers 0x0800_B000 ~ 0x0800_BFFF Interrupt Handler Control Registers 0x0800_A000 ~ 0x0800_AFFF Clock Generator Registers 0x0800_8000 ~ 0x0800_9FFF BIU/System Control Registers 0x0800_4000 ~ 0x0800_4FFF IPU SRAM Registers 0x0800_0000 ~ 0x0800_1FFF IPU Registers 4.6 DMA Controller The DMA Controller manages all the SDRAM access requests from
in „Datenblatt von Magic Pixel MP600BUCG“ · Mikrocontroller und Digitale Elektronik ·
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Datei
stm32f10x.h
0x00001000) /*!<DAC channel1 DMA enable */ #define DAC_CR_EN2 ((uint32_t)0x00010000) /*!<DAC channel2 enable */ #define DAC_CR_BOFF2 ((uint32_t)0x00020000) /*!<DAC channel2 output buffer disable */ #define DAC_CR_TEN2
in „COIDE 2.7.0 und STMF103C8T6 (china board), startprobleme“ · Mikrocontroller und Digitale Elektronik ·
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Datei
nm-mit-f_mount.txt
0800a9a4 t $d 0800a9b0 t $t 0800a9b1 000000a4 t tcpip_thread 0800aa38 t $d 0800aa54 t $t 0800aa55 00000068 T tcpip_inpkt 0800aaac t $d 0800aabc t $t 0800aabd 00000024 T tcpip_input 0800aad8 t $d 0800aae0
in „stm32 FatFS stranges Problem“ · Mikrocontroller und Digitale Elektronik ·
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PDF
MemoryMapping.pdf
1400 TIM11 0x8000 0000 0x4001 1000 TIM10 0x4001 0C00 TIM9 0x4001 0800 EXTI 3 0x1FF8 001F 0x4001 0400 Option Bytes SYSCFG 0x1FF8 0000 0x4001 0000 reserved 0x6000 0000 reserved 0x4001 00 0 COMP + RI 0x1FF0 0FFF 0x4000 7C00 reserved reserved 0x4000 7800 2 DAC1 & 2 System
in „Pointer auf Hardwareadresse in Mikrocontroller“ · Mikrocontroller und Digitale Elektronik ·
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PDF
MP650_datasheet.pdf
UARTH Registers 0x0801_0080 ~ 0x0801_01FF I2C Registers 0x0801_0000 ~ 0x0801_007F IR Registers 0x0800_E000 ~ 0x0800_FFFF Timer Registers 0x0800_C000 ~ 0x0800_DFFF DMA Control Registers 0x0800_B000 ~ 0x0800_BFFF Interrupt Handler Control Registers 0x0800_A000 ~ 0x0800_AFFF Clock Generator Registers 0x0800_8000 ~ 0x0800_9FFF BIU/System Control Registers 0x0800_0000 ~ 0x0800_7FFF IPU Registers Table 5-1 Register File Mapping 5.1.2 Boot-up Configuration MP650UCG supports 2 boot-up configurations, either from the embedded
in „Handydummy (Attrappe)mit richtigem Display 10Zoll - u.a.Motorola Xoom“ · Mikrocontroller und Digitale Elektronik ·
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Datei
stm32f10x.h
_t)0x00000800) /*!< Bit 3 */ #define DAC_CR_DMAEN1 ((uint32_t)0x00001000) /*!< DAC channel1 DMA enable */ #define DAC_CR_EN2 ((uint32_t)0x00010000) /*!< DAC channel2 enable */ #define DAC_CR_BOFF2 ((uint32_t)0x00020000) /*!< DAC channel2 output
in „STM32 - Eclipse, ARM GCC - Funktionsaufruf geht nicht :-(“ · Mikrocontroller und Digitale Elektronik ·
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Datei
stm32f10x.h
_t)0x00000800) /*!< Bit 3 */ #define DAC_CR_DMAEN1 ((uint32_t)0x00001000) /*!< DAC channel1 DMA enable */ #define DAC_CR_EN2 ((uint32_t)0x00010000) /*!< DAC channel2 enable */ #define DAC_CR_BOFF2 ((uint32_t)0x00020000) /*!< DAC channel2 output
in „C-Libs for USB and OLED-Display“ · Mikrocontroller und Digitale Elektronik ·
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PDF
reference_manual.pdf
. Flash module organization (low-density devices) Block Name Base addresses Size (bytes) Page 0 0x0800 0000 - 0x0800 03FF 1 Kbyte Page 1 0x0800 0400 - 0x0800 07FF 1 Kbyte Page 2 0x0800 0800 - 0x0800 0BFF 1 Kbyte Page 3 0x0800 0C00 - 0x0800 0FFF 1 Kbyte Main memory Page 4 0x0800 1000 - 0x0800 13FF 1 Kbyte
in „I2S zwischen STM32F103RET6 und PCM3168A möglich?“ · Mikrocontroller und Digitale Elektronik ·
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Datei
stm32f4xx.h
0x00001000) /*!<DAC channel1 DMA enable */ #define DAC_CR_EN2 ((uint32_t)0x00010000) /*!<DAC channel2 enable */ #define DAC_CR_BOFF2 ((uint32_t)0x00020000) /*!<DAC channel2 output buffer disable */ #define DAC_CR_TEN2
in „STM32F0 Discovery und UART1“ · Mikrocontroller und Digitale Elektronik ·
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Datei
stm32f4xx.h
0x00001000) /*!<DAC channel1 DMA enable */ #define DAC_CR_EN2 ((uint32_t)0x00010000) /*!<DAC channel2 enable */ #define DAC_CR_BOFF2 ((uint32_t)0x00020000) /*!<DAC channel2 output buffer disable */ #define DAC_CR_TEN2
in „STM32F4 SPI Problem“ · Mikrocontroller und Digitale Elektronik ·
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Datei
nm-ohne-f_mount.txt
0800b868 t $t 0800b869 000000d4 T pbuf_free 0800b924 t $d 0800b93c t $t 0800b93d 000001d0 T pbuf_alloc 0800b94c t $d 0800b951 t $d 0800b952 t $t 0800b980 t $d 0800b984 t $t 0800baf0 t $d 0800bb0c t $t 0800bb0d
in „stm32 FatFS stranges Problem“ · Mikrocontroller und Digitale Elektronik ·
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PDF
GD32F3x0_RM_v1.0.pdf
following table shows details. Table 1-2. Flash module organization Block Name Address Size Page 0 0x0800 0000 - 0x0800 03FF 1 Kbytes Page 1 0x0800 0400 - 0x0800 07FF 1 Kbytes Page 2 0x0800 0800 - 0x0800 0BFF 1 Kbytes Main Flash Block · · · · · · Page 127 0x0801 FC00 - 0x0801 FFFF 1 Kbytes System memory
in „"NUCLEO"-Borads von GigaDevice“ · Mikrocontroller und Digitale Elektronik ·
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PDF
GD32F3x0_RM_v1.0.pdf
following table shows details. Table 1-2. Flash module organization Block Name Address Size Page 0 0x0800 0000 - 0x0800 03FF 1 Kbytes Page 1 0x0800 0400 - 0x0800 07FF 1 Kbytes Page 2 0x0800 0800 - 0x0800 0BFF 1 Kbytes Main Flash Block · · · · · · Page 127 0x0801 FC00 - 0x0801 FFFF 1 Kbytes System memory
in „"NUCLEO"-Borads von GigaDevice“ · Mikrocontroller und Digitale Elektronik ·
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Datei
robot-mit-cplusplus-anteilen-noheap-trotzdem-grosz.objdump.txt
, r7, #13 800617e: f04f 0900 mov.w r9, #0 8006182: e01e b.n 80061c2 <d_print_comp+0x50a> 8006184: 0800e5e3 .word 0x0800e5e3 8006188: 0800e60f .word 0x0800e60f 800618c: 0800e5b7 .word 0x0800e5b7 8006190: 0800e5f7 .word 0x0800e5f7 8006194: 0800e5d3 .word 0x0800e5d3 8006198: 0800e5a3 .word 0x0800e5a3 800619c
in „ROM-Auslastung von C++-Programm reduzieren“ · Mikrocontroller und Digitale Elektronik ·
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PDF
TK499______20190910.pdf
功能概述 TK499 1.13 电源方案 ⚫ VDD=2.5 至 3.6V：I/O 和内部调压器(若启用)的外部电源，通过 VDD 引脚 外部提供。 ⚫ VSSA、VDDA=2.5 至 3.6V：ADC、DAC、复位模块、RC、PLL 的外部模拟 电源。 VDDA 和 VSSA 必须分别连至 VDD 和 VSS。 ⚫ VBAT.65 到 3.6V：当 VDD 不存在时，作为 RTC、32kHz 外部时钟振荡器 和备份寄存器的电源 (通过电源开关供电)。 1.14 电源监控器 该器件具有一个集成的上电复位(POR)电路耦合。当上电时，POR 一直激活， 确保从 V POR始正常工作。当 VDD 低于指定阈值
in „TKM32F499 Board mit Display“ · Mikrocontroller und Digitale Elektronik ·
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PDF
GD32F350xx_DS_v1.1.pdf
is used to convert the sensor output voltage in a digital value. 3.7 Digital to analog converter (DAC) 12-bit DAC converter of independent output channel 8-bit or 12-bit mode in conjunction with the DMA controller The 12-bit buffered DAC channel is used to generate variable analog outputs. The DAC
in „"NUCLEO"-Borads von GigaDevice“ · Mikrocontroller und Digitale Elektronik ·
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PDF
GD32F350xx_DS_v1.1.pdf
is used to convert the sensor output voltage in a digital value. 3.7 Digital to analog converter (DAC) 12-bit DAC converter of independent output channel 8-bit or 12-bit mode in conjunction with the DMA controller The 12-bit buffered DAC channel is used to generate variable analog outputs. The DAC
in „"NUCLEO"-Borads von GigaDevice“ · Mikrocontroller und Digitale Elektronik ·
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PDF
ADIS16250.pdf
calibration process. reset commands. The GYRO_OFF provides a calibration range of ±37.5°/sec, and The DAC latch command loads the contents of AUX_DAC into its contents are nonvolatile. The GYRO_SCALE register the DAC latches. Since the AUX_DAC contents must be updated one byte at a time, this command ensures
in „ADIS16250 Gyro Code von Hersteller?“ · Mikrocontroller und Digitale Elektronik ·
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PDF
ADIS16250.pdf
calibration process. reset commands. The GYRO_OFF provides a calibration range of ±37.5°/sec, and The DAC latch command loads the contents of AUX_DAC into its contents are nonvolatile. The GYRO_SCALE register the DAC latches. Since the AUX_DAC contents must be updated one byte at a time, this command ensures
in „Probleme mit Code für Gyro ADIS16250“ · Mikrocontroller und Digitale Elektronik ·
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PDF
ADIS16250.pdf
calibration process. reset commands. The GYRO_OFF provides a calibration range of ±37.5°/sec, and The DAC latch command loads the contents of AUX_DAC into its contents are nonvolatile. The GYRO_SCALE register the DAC latches. Since the AUX_DAC contents must be updated one byte at a time, this command ensures
in „Drift bei Gyro ADIS16250“ · Mikrocontroller und Digitale Elektronik ·
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Datei
robot-mit-cplusplus-anteilen-noheap-trotzdem-grosz.map.txt
aeabi_dsub 0x0800a670 __subdf3 0x0800a674 __aeabi_dadd 0x0800a674 __adddf3 0x0800a8ec __floatunsidf 0x0800a8ec __aeabi_ui2d 0x0800a90c __floatsidf 0x0800a90c __aeabi_i2d 0x0800a930 __aeabi_f2d 0x0800a930 __extendsfdf2
in „ROM-Auslastung von C++-Programm reduzieren“ · Mikrocontroller und Digitale Elektronik ·
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PDF
ADIS16250_16255.pdf
auto-null and factory reset commands. provides a calibration range of 0 to 1.9995, and its contents The DAC latch command loads the contents of AUX_DAC into the are also nonvolatile. DAC latches. Since the AUX_DACcontentsmustbeupdated one byte at a time, this command ensures a stable DAC output voltage Table
in „Bias bei Gyro“ · Mikrocontroller und Digitale Elektronik ·
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Datei
robot-mit-cplusplus-anteilen.map.txt
aeabi_dsub 0x0800a64c __subdf3 0x0800a650 __aeabi_dadd 0x0800a650 __adddf3 0x0800a8c8 __floatunsidf 0x0800a8c8 __aeabi_ui2d 0x0800a8e8 __floatsidf 0x0800a8e8 __aeabi_i2d 0x0800a90c __aeabi_f2d 0x0800a90c __extendsfdf2
in „ROM-Auslastung von C++-Programm reduzieren“ · Mikrocontroller und Digitale Elektronik ·
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PDF
GD32VF103_Datasheet_Rev1.0.pdf
with Ro buffer OFF — — — 15 kΩ No pin/pad capacitance CLOAD(2) Load capacitance — — 50 pF included DAC_OUT Lower DAC_OUT voltage (2) — 0.2 — — V min with buffer ON DAC_OUT Higher DAC_OUT voltage VDDA- max(2) with buffer ON — — — 0.2 V DAC_OUT Lower DAC_OUT voltage — — 0.5 — mV min(2) with buffer OFF DAC_OUT Higher DAC_OUT voltage VDDA- (2) — — — V max with buffer OFF 1LSB With no load, middle code(0x800) on the inpuREF+ — 470 — μA DAC current consumption = 3.6 V DDA(1) in quiescent mode With no load
in „RISC-V: Wird das was?“ · Mikrocontroller und Digitale Elektronik ·
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PDF
GD32VF103_Datasheet_Rev1.0.pdf
with Ro buffer OFF — — — 15 kΩ No pin/pad capacitance CLOAD(2) Load capacitance — — 50 pF included DAC_OUT Lower DAC_OUT voltage (2) — 0.2 — — V min with buffer ON DAC_OUT Higher DAC_OUT voltage VDDA- max(2) with buffer ON — — — 0.2 V DAC_OUT Lower DAC_OUT voltage — — 0.5 — mV min(2) with buffer OFF DAC_OUT Higher DAC_OUT voltage VDDA- (2) — — — V max with buffer OFF 1LSB With no load, middle code(0x800) on the inpuREF+ — 470 — μA DAC current consumption = 3.6 V DDA(1) in quiescent mode With no load
in „STM32F103C8T6 => GD32VF103C8T6“ · Mikrocontroller und Digitale Elektronik ·
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PDF
rm0444-stm32g0x1-advanced-armbased-32bit-mcus-stmicroelectronics.pdf
devices 0x0801 F800 - 0x0801 FFFF 2 K Page 63 ... ... ... 0x0801 0000 - 0x0801 07FF 2 K Page 32 - 0x0800 F800 - 0x0800 FFFF 2 K Page 31 ... ... ... 0x0800 8000 - 0x0800 87FF 2 K Page 16 0x0800 7800 - 0x0800 7FFF 2 K Page 15 Page 15 Main memory ... ... ... ... 0x0800 4000 - 0x0800 47FF 2 K Page 8 Page 8 0x0800 3800 - 0x0800 3FFF 2 K Page 7 Page 7 ... ... ... ... 0x0800 1000 - 0x0800 17FF 2 K Page 2 Page 2 0x0800 0800 - 0x0800 0FFF 2 K Page 1 Page 1 0x0800 0000 - 0x0800 07FF 2 K Page 0 Page 0 Table 10. Flash
in „Problem mit Clock Configuration beim STM32G031“ · Mikrocontroller und Digitale Elektronik ·
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Datei
stm32f1xx_hal_conf.h
*/ #define USE_HAL_CEC_REGISTER_CALLBACKS 0U /* CEC register callback disabled */ #define USE_HAL_DAC_REGISTER_CALLBACKS 0U /* DAC register callback disabled */ #define USE_HAL_ETH_REGISTER_CALLBACKS 0U /* ETH register callback disabled */ #define USE_HAL_HCD_REGISTER_CALLBACKS 0U /* HCD register callback
in „[Pollin] Grafik Display Anschluss Verständnisfragen“ · Mikrocontroller und Digitale Elektronik ·
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PDF
EN_UM_N32G45x_Series_User_Manual_V3.pdf
0x9FFF_FFFF GPIOB QSPI Bank 0x4001_0C00 – 0x4001_0FFF 0x6000_0000 – 0x8FFF_FFFF Reserved GPIOA 0x4001_0800 – 0x4001_0BFF EXTI 0x4001_0400 – 0x4001_07FF AFIO 0x4001_0000 – 0x4001_03FF Extended Device 1GB Reserved 0x4000_7800 – 0x4000_FFFF 0x4400_0000 – 0x5FFF_FFFF Reserved DAC 0x4000_7400 – 0x4000_77FF 0x4254
in „ALLPOWERS S2000 PRO Reparaturhilfe“ · Mikrocontroller und Digitale Elektronik ·
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PDF
TMS320DM270_.pdf
Hardware pixel pre-processor for and on-chip program/data memory Two UARTs (32 Kbytes) Channel 10-bit DAC for NTSC/PAL DSC system TM Real-time AF, AWB, AE statistics for On-chip 90-MHz TI TMS320C54X composite video output DSC system DSP core with on-chip program/data Channel serial audio codec interface
in „TMS320DM270 Processor: Digital Still Cameras“ · Mikrocontroller und Digitale Elektronik ·
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PDF
DM00043574.pdf
ADC1,2,3&4 ADC1,2,3&4 ADC1,2,3&4 ADC1,2,3&4 ADC1&2 ADC1&2 converters (ADC) Section 16: Digital-to- analog DAC1 Ch.1&2 DAC1 Ch.1&2 converter DAC1 Ch.1&2 DAC1 Ch.1&2 DAC1 Ch.1&2 DAC1 Ch.1&2 + DAC2 Ch.1 + DAC2 Ch.1 (DAC1 and DAC2) Section 17: Comp1,2,3,4,5, Comp1,2,3,4,5, Comp1,2,3,4,5 Comp1,2,3,4, Comparator
in „STM32F3 Discovery als USB Keyboard“ · Mikrocontroller und Digitale Elektronik ·
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PDF
GD32VF103_User_Manual_EN_V1.0.pdf
1: DAC1 output buffer turn off 16 DEN1 DAC1 enable 0: DAC1 disabled 1: DAC1 enabled 15:13 Reserved Must be kept at reset value 12 DDMAEN0 DAC0 DMA enable 0: DAC0 DMA mode disabled 1: DAC0 DMA mode enabled
in „STM32F103C8T6 => GD32VF103C8T6“ · Mikrocontroller und Digitale Elektronik ·
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PDF
Reference_Manual.pdf
usable only dual mode ADC5 usable only ADC5 usable only in single mode in single mode in single mode 7 DAC ch: 7 DAC ch: DAC1_CH1/ DAC1_CH1/ 4 DAC ch: DAC1_CH2/ DAC1_CH2/ DAC1_CH1/ 4 DAC ch: DAC2_CH1: DAC2_CH1: DAC1_CH2: DAC1_CH1/ external external DAC DAC3_CH1/ DAC3_CH1/ external DAC1_CH2: external DAC3
in „STM32G474RE UART“ · Mikrocontroller und Digitale Elektronik ·
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Datei
hardware_t.cpp
= DAC_MIDSCALE + DAC_Correction[CalSet][0][2]; CH2_DAC_Offset = DAC_MIDSCALE + DAC_Correction[CalSet][1][2]; CH3_DAC_Offset = DAC_MIDSCALE + DAC_Correction[CalSet][2][2]; CH4_DAC_Offset = DAC_MIDSCALE + DAC_Correction
in „Wittig(welec) DSO W20xxA Open Source Firmware (Teil4)“ · Mikrocontroller und Digitale Elektronik ·
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Datei
ad5932.h
FSTART_LOW 0xC000 #define AD5932_FSTART_HIGH 0xD000 // Control register bits #define AD5932_B24 0x0800 #define AD5932_DAC_ENABLE 0x0400 #define AD5932_SINE_TRI 0x0200 #define AD5932_MSBOUTEN 0x0100 #define AD5932_TRIG_INC 0x0020 #define AD5932_SYNCSEL 0x0008 #define AD5932_SYNCOUTEN 0x0004 //#define
in „DDS-Singalgenerator mit ATmega88 und DDS AD5932“ · Digitale Signalverarbeitung / DSP / Machine Learning ·
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Datei
ad5932.h
FSTART_LOW 0xC000 #define AD5932_FSTART_HIGH 0xD000 // Control register bits #define AD5932_B24 0x0800 #define AD5932_DAC_ENABLE 0x0400 #define AD5932_SINE_TRI 0x0200 #define AD5932_MSBOUTEN 0x0100 #define AD5932_TRIG_INC 0x0020 #define AD5932_SYNCSEL 0x0008 #define AD5932_SYNCOUTEN 0x0004 //#define
in „DDS-Singalgenerator mit ATmega88 und DDS AD5932“ · Digitale Signalverarbeitung / DSP / Machine Learning ·
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Datei
ad5932.h
FSTART_LOW 0xC000 #define AD5932_FSTART_HIGH 0xD000 // Control register bits #define AD5932_B24 0x0800 #define AD5932_DAC_ENABLE 0x0400 #define AD5932_SINE_TRI 0x0200 #define AD5932_MSBOUTEN 0x0100 #define AD5932_TRIG_INC 0x0020 #define AD5932_SYNCSEL 0x0008 #define AD5932_SYNCOUTEN 0x0004 //#define
in „DDS-Singalgenerator mit ATmega88 und DDS AD5932“ · Digitale Signalverarbeitung / DSP / Machine Learning ·
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Datei
ad5932.h
FSTART_LOW 0xC000 #define AD5932_FSTART_HIGH 0xD000 // Control register bits #define AD5932_B24 0x0800 #define AD5932_DAC_ENABLE 0x0400 #define AD5932_SINE_TRI 0x0200 #define AD5932_MSBOUTEN 0x0100 #define AD5932_TRIG_INC 0x0020 #define AD5932_SYNCSEL 0x0008 #define AD5932_SYNCOUTEN 0x0004 //#define
in „Projekt: DDS basierter Funktionsgenerator mit AD5930“ · Mikrocontroller und Digitale Elektronik ·
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Datei
ad5932.h
FSTART_LOW 0xC000 #define AD5932_FSTART_HIGH 0xD000 // Control register bits #define AD5932_B24 0x0800 #define AD5932_DAC_ENABLE 0x0400 #define AD5932_SINE_TRI 0x0200 #define AD5932_MSBOUTEN 0x0100 #define AD5932_TRIG_INC 0x0020 #define AD5932_SYNCSEL 0x0008 #define AD5932_SYNCOUTEN 0x0004 #define AD5932
in „Probleme bei der Stueuerung über Taster!“ · Mikrocontroller und Digitale Elektronik ·
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PDF
GD32F103xx_Datasheet_V2.5.pdf
can be triggered by the timer or EXTI with DMA support. In dual DAC channel operation, conversions could be done independently or simultaneously. The maximum output value of the DAC is VREF+. 3.8. DMA 7 channel DMA0 controller and 5 channel DMA1 controller Peripherals
in „Unterschiede CS32F103C8T6 und STM32F103C8T6“ · Mikrocontroller und Digitale Elektronik ·
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PDF
vs1011.pdf
rw 0 LEFT DAC left channel PCM value. 0xC016 rw 0 RIGHT DAC right channel PCM value. Everyfourthclockcycle, aninternal26-bitcounterisaddedtobyDAC FCTLH[3:0]£65536+DAC FCTLL. Whenever this counter overflows, values from DAC LEFT and DAC RIGHT are read and a DAC inter- rupt is generated. If DAC FCTL[4] is 1, the internal clock doubler is activated. 10.7 GPIO Registers GPIO registers, prefix GPIO Reg Type Reset Abbrev[bits
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Datei
hardware_t.cpp
3; CH2_DAC_Correction_1_bak = CH2_DAC_Correction_1; CH2_DAC_Correction_2_bak = CH2_DAC_Correction_2; CH2_DAC_Correction_3_bak = CH2_DAC_Correction_3; CH3_DAC_Correction_1_bak = CH3_DAC_Correction_1; CH3_DAC_Correction
in „Wittig(welec) DSO W20xxA Open Source Firmware“ · Mikrocontroller und Digitale Elektronik ·
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PDF
ADIS16209-246154.pdf
output, 0 = input 9 Not used 8 Self-test enable (temporary, bit is volatile): 1 = enabled, AuxiliaryDAC 0 = disabled 7:3 Not used The auxiliary DAC provides a 12-bit level adjustment function. 2 Data-ready enable: 1 = enabled, 0 = disabled The AUX_DAC register controls the operation of the auxiliary DAC
in „Neigungswinkelinkelmessung beweglicher Teile“ · Analoge Elektronik und Schaltungstechnik ·
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PDF
ADUC7019_7020_7021_7022_7024_7025_7026_7027_7028.pdf
optical networking Software-triggeredin-circuitreprogrammability FUNCTIONAL BLOCK DIAGRAM ADC0 12-BIT DAC0 DAC MUX 1MSPS 12-BIT ADC 12-BIT ADC11 DAC DAC1 SENSOR ADuC7026 1DACIT DAC2 CMP0 CMP1 BANDGAP 12-BIT DAC3 CMP OUT REF DAC VREF PWM0 H OSC THREE- PWM0 L XCLKI AND PLL ARM7TDMI-BASED MCU WITH PHASE PWM1
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Datei
hardware_t.cpp
_2_bak = CH2_DAC_Correction_2; CH2_DAC_Correction_3_bak = CH2_DAC_Correction_3; CH3_DAC_Correction_1_bak = CH3_DAC_Correction_1; CH3_DAC_Correction_2_bak = CH3_DAC_Correction_2; CH3_DAC_Correction_3_bak = CH3_DAC_Correction
in „Wittig(welec) DSO W20xxA Open Source Firmware (Teil3)“ · Mikrocontroller und Digitale Elektronik ·
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Datei
main.c
| (1<<D6) | (1<<D4) | (1<<D1) | (1<<D0) ; // reserved bits = 1 control_reg |= AD5932_B24 | AD5932_DAC_ENABLE | AD5932_MSBOUTEN ;// | AD5932_MSBOUTEN; control_reg |= AD5932_TRIG_INC| AD5932_SYNCSEL | AD5932_SYNCOUTEN; ad5932_write(AD5932_CONTROL | control_reg); //startfrequenz = 0x11; ad5932_set_frequency
in „DDS-Singalgenerator mit ATmega88 und DDS AD5932“ · Digitale Signalverarbeitung / DSP / Machine Learning ·
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Datei
spi.h
Setzten der Controlbits control_reg |= AD5932_RESERVED; // reserved bits = 1 control_reg |= AD5932_DAC_ENABLE | AD5932_MSBOUTEN ; control_reg &= ~AD5932_B24; control_reg |= AD5932_TRIG_INC| AD5932_SYNCSEL | AD5932_SYNCOUTEN; ad5932_write(AD5932_CONTROL | control_reg); //ad5932_set_n_inc(n_inc); //ad5932
in „Probleme bei der Stueuerung über Taster!“ · Mikrocontroller und Digitale Elektronik ·
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PDF
STM32F407VGT6.pdf
Flash module organization (STM32F40x and STM32F41x) Block Name Block base addresses Size Sector 0 0x0800 0000 - 0x0800 3FFF 16 Kbytes Sector 1 0x0800 4000 - 0x0800 7FFF 16 Kbytes Sector 2 0x0800 8000 - 0x0800 BFFF 16 Kbytes Sector 3 0x0800 C000 - 0x0800 FFFF 16 Kbytes Sector 4 0x0801 0000 - 0x0801 FFFF
in „ARM Controller "richtig" programmieren“ · Mikrocontroller und Digitale Elektronik ·
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PDF
STM32F407VGT6.pdf
Flash module organization (STM32F40x and STM32F41x) Block Name Block base addresses Size Sector 0 0x0800 0000 - 0x0800 3FFF 16 Kbytes Sector 1 0x0800 4000 - 0x0800 7FFF 16 Kbytes Sector 2 0x0800 8000 - 0x0800 BFFF 16 Kbytes Sector 3 0x0800 C000 - 0x0800 FFFF 16 Kbytes Sector 4 0x0801 0000 - 0x0801 FFFF
in „STM32F4 pointer Frage“ · Mikrocontroller und Digitale Elektronik ·
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PDF
STM32F429_Reference_Manual.pdf
Flash module organization (STM32F40x and STM32F41x) Block Name Block base addresses Size Sector 0 0x0800 0000 - 0x0800 3FFF 16 Kbytes Sector 1 0x0800 4000 - 0x0800 7FFF 16 Kbytes Sector 2 0x0800 8000 - 0x0800 BFFF 16 Kbytes Sector 3 0x0800 C000 - 0x0800 FFFF 16 Kbytes Sector 4 0x0801 0000 - 0x0801 FFFF
in „USB-C Dual-Role-Device DRD mit integriertem OTG FS PHY“ · Mikrocontroller und Digitale Elektronik ·