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Braune Lederhülle mit Aufkleber und Prägung
OMRON_10SR_-_Klettverschluss.jpg
in „[V] OMRON 10SR“ · Markt · · Fotos
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PDF
SR0604100MSB.PDF
10.0 820.0 0.60 0.65 SR0602820KS ¡… 82.0 10% 12 2.520M 9.5 1100.0 0.52 0.60 SR0602101KS ¡… 100.0 10% 22 796K 8.5 1250.0 0.46 0.55 SR0602121KS ¡… 120.0 10% 22 796K 8.0 1350.0 0.40 0.52 SR0602151KS ¡… ¡Ó
in „Pollin SMD-Induktivitäten identifizieren“ · Analoge Elektronik und Schaltungstechnik ·
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PDF
schematic4.pdf
[8] sr_out[9]_i_1 sr_out_reg[9] sr_out[10]_i_1 sr_out_reg[10] sr_out[11]_i_1 sr_out_reg[11] sr_out[12]_i_1 sr_out_reg[12] sr_out[13]_i_1 sr_out_reg[13] sr_out[14]_i_1 sr_out_reg[14] sr_out[15]_i_1 sr_out_reg
in „Genesys 2 (Xilinx Kintex 7): Audio-Codec Implementierung und Filteranbindung“ · FPGA, VHDL & Co. ·
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PDF
schematic5.pdf
0] Q R R D sr_out[41]_i_1 sr_out_reg[41] sr_out[42]_i_1 sr_out_reg[42] sr_out[43]_i_1 sr_out_reg[43] sr_out[44]_i_1 sr_out_reg[44] sr_out[8]_i_1 sr_out_reg[8] sr_out[9]_i_1 sr_out_reg[9] sr_out[10]_i_1 sr_out_reg[10] sr_out[11]_i_1 sr_out_reg[11] sr_out[12]_i_1 sr_out_reg[12] sr_out[13]_i_1 sr_out_reg[13] sr_out[14]_i_1 sr_out_reg[14] sr_out[15]_i_1 sr_out_reg[15] sr_out[16]_i_1 sr_out_reg[16] sr_out[17]_i_1 sr_out_reg
in „Genesys 2 (Xilinx Kintex 7): Audio-Codec Implementierung und Filteranbindung“ · FPGA, VHDL & Co. ·
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Datei
shiftreg_demo.c
Schieberegister an den Mikrocontroller, bei // Bedarf abaendern // Dataanschluss nach PA2 #define sr_datport A #define sr_datbitnr 2 // Clockanschluss nach PA1 #define sr_clkport A #define sr_clkbitnr 1 // Strobeanschluss nach PA3 #define sr_strport A #define sr_strbitnr 3 // -----------------------
in „Schieberegister (HEF4094B) Programmieren“ · Mikrocontroller und Digitale Elektronik ·
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PDF
dms-78xxsr_363265-67_dat_e.pdf
Step 7803SR 10% to 100% Load Step 7805SR 10% to 100% Load Step 7812SR 10% to 100% Load Step Vin = 9V Vin = 9V Vin = 18V 7803SR 100% to 10% Load Step 7805SR 100% to 10% Load Step 7812SR 100% to 10% Load Step Vin
in „Speisung für mein Projekt“ · Mikrocontroller und Digitale Elektronik ·
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PDF
Eye_Safety_of_IREDs_used_in_Lamp_Applications.pdf
size 1 x 1 data sheet 2 I x w [mm ] α < α min effrad] 0.005 acc. (5) α min efft ≥ 10 s) [rad] 0.011 acc. Table 1 λ [nm] 850 data sheet R(λ) ~ 0.5 acc. (7) L [mW/mm /sr] ~ 280 1 acc. (9) IR L IR[mW/mm /sr] 280 2 acc. (10) Exposure limit for L IR 545.5 acc. (9) 2 [mW/mm /sr] calculated
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Datei
main.c
_10 << 4); // Port B - Bit 9 //MODIFY_REG(GPIOB->CRH, 15<< 8, OUT_PP_10 << 8); // Port B - Bit 10 //MODIFY_REG(GPIOB->CRH, 15<<12, OUT_PP_10 << 12); // Port B - Bit 11 MODIFY_REG(GPIOB->CRH, 15<<16, OUT_PP
in „Frage: STM32F103 beide SPI benutzen“ · Mikrocontroller und Digitale Elektronik ·
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Datei
tst_bench_top.vhd
clk,ack,adr,dat_o,cyc,stb,we); --/ //set command (write) report "status: write slave memory address 10"; --// check tip bit wb_read(1,'0' & SR,check_SR,clk,ack,dat_i,adr,dat_o,cyc,stb,we); while(check_SR(1)='1') loop wb_read(1,'0' & SR,check_SR,clk,ack,dat_i,adr,dat_o,cyc,stb,we); --// poll it until it
in „Probleme bei Lattice I2C EFB mit Wishbone Interface“ · FPGA, VHDL & Co. ·
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Datei
stm32f10x_it.c
I2C_DIRECTION_TX); I2C_DMAConfig (I2C1, Buffer_Rx1, 0xFFFF, I2C_DIRECTION_RX); /* Clear ADDR by reading SR2 register */ SR2Register = I2C1->SR2; } #else /* Read the I2C1 SR1 and SR2 status registers */ SR1Register = I2C1->SR1; SR2Register = I2C1->SR2; /* If I2C1 is slave (MSL flag = 0) */ if ((SR2Register
in „stm32 Cortex I2C : Master zieht SCL auf Masse“ · Mikrocontroller und Digitale Elektronik ·
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PDF
defekt_ausgebaut_SR260.pdf
a distance of 9.5mm from the case. 2. Measured at 1.0 MHz and applied reverse voltage of 4.0V D.C. SR220 – SR260 1 of 3 © 2002 Won-Top Electronics 20 A ) T SR220 - SR240 ( N 10 T E E 2.0 R R U R C C R SR250 - SR260 D A R W A O W F O S 1.0 F 1.0 O E E G A R T E A A T Tj= 25°C ) N I , F Pulse Width = 300
in „Laie repariert billiges Schaltnetzteil: Richtig so ?“ · Analoge Elektronik und Schaltungstechnik ·
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PDF
1_AMD_BKDG_Family__15h_Mod_00h-0Fh_BKDG.pdf
000b 10b 3 1066 1.5 SR NP, SR DR DR 1 000b 10b 3 1066 1.5, 1.35 SR SR SR SR 0 101b 10b 3 1066 1.5 SR SR DR SR, DR 0 101b 10b 3 1066 1.5 SR DR SR, DR SR, DR 0 101b 10b 3 1066 1.5 SR DR SR, DR DR 1 000b 10b 3
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Datei
DecodeUART_External_FT2232H_Module_8MBaud_Right_new.py
[3] & 1 == 0) and (sr[4] & 1 == 0) and (sr[5] & 1 == 0) and (sr[6] & 1 == 0) and (sr[7] & 1 == 0) and (sr[8] & 1 == 0) and (sr[9] & 1 == 0) and (sr[10] & 1 == 0) and (sr[11] & 1 == 0) and (sr[12] & 1 == 0) and (sr[13] & 1
in „Genesys 2 (Xilinx Kintex 7): Audio-Codec Implementierung und Filteranbindung“ · FPGA, VHDL & Co. ·
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Datei
DecodeUART_External_FT2232H_Module_8MBaud_Left_new.py
[3] & 1 == 0) and (sr[4] & 1 == 0) and (sr[5] & 1 == 0) and (sr[6] & 1 == 0) and (sr[7] & 1 == 0) and (sr[8] & 1 == 0) and (sr[9] & 1 == 0) and (sr[10] & 1 == 0) and (sr[11] & 1 == 0) and (sr[12] & 1 == 0) and (sr[13] & 1
in „Genesys 2 (Xilinx Kintex 7): Audio-Codec Implementierung und Filteranbindung“ · FPGA, VHDL & Co. ·
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Datei
audio_decode_14.py
= 0) and (sr[10] & 1 == 0) and (sr[11] & 1 == 0) and (sr[12] & 1 == 0) and (sr[13] & 1 == 0): A_sign = int((sr[0] & 64)/64) A_bits = (sr[0] & 62)*2**17 + (sr[1] >> 1)*2**11 + (sr[2] >> 1)*2**4 + (sr[3] >> 4) B_sign
in „Genesys 2 (Xilinx Kintex 7): Audio-Codec Implementierung und Filteranbindung“ · FPGA, VHDL & Co. ·
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Datei
audio_UART_decode.py
= 0) and (sr[10] & 1 == 0) and (sr[11] & 1 == 0) and (sr[12] & 1 == 0) and (sr[13] & 1 == 0): A_sign = int((sr[0] & 64)/64) A_bits = (sr[0] & 62)*2**17 + (sr[1] >> 1)*2**11 + (sr[2] >> 1)*2**4 + (sr[3] >> 4) B_sign
in „Genesys 2 (Xilinx Kintex 7): Audio-Codec Implementierung und Filteranbindung“ · FPGA, VHDL & Co. ·
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PDF
Integra-SR4L049-PS-1.0-1367590.pdf
Applications Product Specification Integra-SR4L049-PS-Page 10 Integra Part No. SR4L049 Bottom Side SR4L049-L Bottom Side SR4L049-R - All Dimensions in (mm) - View from bottom side of each antenna Antennas for Wireless M2M Applications Product Specification
in „Antennenanpassung LTE und GNSS bei SIM7000“ · HF, Funk und Felder ·
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PDF
RC28F256J3C-125.pdf
should be held atPENH until determination of block erase, program, or lock-bit configuration success (SR[1,3,4:5] = 0). 26 Datasheet 256-Mbit J3 (x8/x16) 7.3 Block Erase, Program, and Lock-Bit Configuration Performance Table 10. Configuration Performance (8) # Sym Parameter Typ Max Unit Notes W16 Write
in „Passender Ersatz für Intel RC28F256J3C-125“ · Mikrocontroller und Digitale Elektronik ·
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Datei
W5500_SPI.c
register ***********************************************/ { #define OPMODE_SINGLE_WRITE (0x04 | OM10_FDM1) // BSB = %00000, RW=1(write), OM =%00 W5500_CS_LOW; // CS=0, SPI start while ((SPI1->SR & LL_SPI_SR_TXE) == 0) { /* wait */ }; SPI1->DR = (uint8_t)(addr >> 16); while ((SPI1->SR & LL_SPI_SR_TXE
in „Wiznet W5500 Datenübertragung via Ethernet“ · Mikrocontroller und Digitale Elektronik ·
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PDF
Intel_RC28fxxxj3_StrataFlash.pdf
should be held atPENH until determination of block erase, program, or lock-bit configuration success (SR[1,3,4:5] = 0). Datasheet 25 28F256J3, 28F128J3, 28F640J3, 28F320J3 7.3 Block Erase, Program, and Lock-Bit Configuration Performance Table 10. Configuration Performance (8) # Sym Parameter Typ Max Unit
in „Geschwindigkeit Flash Memory“ · Mikrocontroller und Digitale Elektronik ·
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Datei
MyFunctions.c
, ASCII_LoNibbleOut ); while ((USART3->SR & USART_SR_TXE) == 0){} USART_SendData( USART3, '|' ); } } else { while ((USART3->SR & USART_SR_TXE) == 0){} USART_SendData( USART3, 'X' ); while ((USART3->SR & USART_SR_TXE) == 0){} USART_SendData(
in „UART Problem beim senden“ · Mikrocontroller und Digitale Elektronik ·
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Datei
usart.h
, FramingError = USART_SR_FE, ParityError = USART_SR_PE }; protected: static const unsigned ErrorMask = USART_SR_ORE | USART_SR_NE | USART_SR_FE | USART_SR_PE; static const unsigned InterruptMask = USART_SR_ORE | USART_SR_CTS | USART_SR_PE | USART_SR_TXE | USART_SR_TC | USART_SR_RXNE | USART_SR_IDLE | USART_SR_LBD | USART_SR_FE | USART_SR_NE; static const unsigned CR1ModeMask = USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_
in „STM32 / C++: Initialisierung von Memberobjekten einer Klasse“ · Mikrocontroller und Digitale Elektronik ·
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Datei
supc.h
#define SUPC_SR_OSCSEL (1 << 7) #define SUPC_SR_FWUPIS (1 << 12) #define SUPC_SR_WKUPIS0 (1 << 16) #define SUPC_SR_WKUPIS1 (1 << 17) #define SUPC_SR_WKUPIS2 (1 << 18) #define SUPC_SR_WKUPIS3 (1 << 19) #define SUPC_SR_WKUPIS4 (1 << 20) #define SUPC_SR_WKUPIS5 (1 << 21) #define SUPC_SR_WKUPIS6 (1 << 22) #define SUPC_SR_WKUPIS7 (1 << 23) #define SUPC_SR_WKUPIS8 (1 << 24) #define SUPC_SR_WKUPIS9 (1 << 25) #define SUPC_SR_WKUPIS10 (1 << 26) #define SUPC_SR_WKUPIS11
in „SAM3X: HardFault bei Wechsel der Taktquelle“ · Mikrocontroller und Digitale Elektronik ·
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Datei
tfa2.cpp
if ((sr&0xffff)==0x2dd4) { // Sync start //printf("SYNC\n"); sr_cnt=0; rdata[0]=(sr>>8)&0xff; byte_cnt=1; invert=0; } // Tolerate inverted sync (maybe useful later...) if (((~sr)&0xffff)==0x2dd4) { printf("Inverted SYNC\n"); sr_cnt=0; rdata[0]=~((sr>>8)&0xff); byte_cnt=1; invert=1; } if (sr_cnt==0) { if (byte_cnt<(int)sizeof(rdata)) { if (invert) rdata[byte_cnt]=~(sr&0xff); else rdata[byte_cnt]=sr&0xff; } //printf(" %i %02x
in „SDR-Dekoder für TFA KlimaLogg Pro/IT+ Temperatursensoren“ · Projekte & Code ·
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Datei
i2c.c
, GPIO_CRL_CNF7_0 + GPIO_CRL_CNF7_1 + GPIO_CRL_MODE7_1); } } else if (registerStruct==I2C2) { // PB10=SCL, PB11=SDA MODIFY_REG(GPIOB->CRH, GPIO_CRH_CNF10 + GPIO_CRH_MODE10, GPIO_CRH_CNF10_0 + GPIO_CRH_CNF10_1 + GPIO_CRH_MODE10_1); MODIFY_REG(GPIOB->CRH, GPIO_CRH_CNF11 + GPIO_CRH_MODE11, GPIO_CRH_CNF11
in „STM32F1 Probleme mit Frings I2C-Bus Routine“ · Mikrocontroller und Digitale Elektronik ·
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Datei
tfa2.cpp
if ((sr&0xffff)==0x2dd4) { // Sync start //printf("SYNC\n"); sr_cnt=0; rdata[0]=(sr>>8)&0xff; byte_cnt=1; invert=0; } // Tolerate inverted sync (maybe useful later...) if (((~sr)&0xffff)==0x2dd4) { printf("Inverted SYNC\n"); sr_cnt=0; rdata[0]=~((sr>>8)&0xff); byte_cnt=1; invert=1; } if (sr_cnt==0) { if (byte_cnt<(int)sizeof(rdata)) { if (invert) rdata[byte_cnt]=~(sr&0xff); else rdata[byte_cnt]=sr&0xff; } //printf(" %i %02x
in „SDR-Dekoder für TFA KlimaLogg Pro/IT+ Temperatursensoren“ · Projekte & Code ·
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PDF
ISD1700_Design_Guide.pdf
Opcode 0x81 0x00 Interrupt Yes Byte Sequence: MOSI 0x81 0x00 <S7:S0> <00000 <E7:E0> <00000 0x00 S10:S8> E10:E8> MISO SR0 SR0 SR0 SR0 Description: Start a record operation from start address <S10:S0> to end address <E10:E0> inclusive. State before Execution Idle State after Execution Idle Registers
in „Verständnisfrage ISD1700 Statusbits“ · Mikrocontroller und Digitale Elektronik ·
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PDF
SR-87_Engine_Board_Manual_V1.2.pdf
Message for ASCII 13, Note 0: external antenna normal Reserved Reserved Reserved specified user ASCII 10 1: external antenna open/short Example $ZANTAX 0 0 0 0 *xx For SR-87-S (ZANTA) $ZANTA,0,0,0,0*xx Message Field Message ID Antenna Port Reserved Reserved Reserved Checksum terminator Format $ZANTA int
in „GPS-Daten entschlüsseln“ · Mikrocontroller und Digitale Elektronik ·
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Datei
H750_AS6501.c
& (SPI_SR_RXWNE | SPI_SR_RXPLVL))) SPI1->RXDR; } // WERT holen uint8_t TDC_read(void) { uint8_t data; *(__IO uint8_t *)&SPI1->TXDR = 0; while(!(SPI1->SR & (SPI_SR_RXWNE | SPI_SR_RXPLVL))); data = *(__IO uint8_
in „TDC(AS6501) als Phasenvergleicher“ · Mikrocontroller und Digitale Elektronik ·
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Datei
stm8s.h
(Slave mode) */ #define I2C_SR1_ADD10 ((uint8_t)0x08) /*!< 10-bit header sent (Master mode) */ #define I2C_SR1_BTF ((uint8_t)0x04) /*!< Byte Transfer Finished */ #define I2C_SR1_ADDR ((uint8_t)0x02) /*!< Address sent (master mode)
in „sdcc source code in mehrere Dateien aufteilen“ · Mikrocontroller und Digitale Elektronik ·
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PDF
ddr-buch-simson-s51-s70-1-sr50-sr80.pdf
Ku'pp- Kupp- Los- Fest- Los- triebs- Jungs- Jungs- . rad rad rad ritze! zahn- :welle rad M532 20/65 I 10/44 17/38 s 51/1 M542 20/65 10/44 16/40 I s 70/1 M 742 21/62 10/44 16/40J - - - - - SR 50/1 M532 20/65 10/44 17/38 M542 20/65 10/44 16/40 I SR 80/1 M 742 I 21/62 10/44 16/40 3. Gang 4. Gang SckundärUbersetzung
in „Spannungsbegrenzer für Simson S50 Rücklicht“ · Analoge Elektronik und Schaltungstechnik ·
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Datei
adc.c
########################################## */ void ADC1_2_IRQHandler(void) { /* if (READ_BIT(ADC1->SR, ADC_SR_EOC)) { CLEAR_BIT(ADC1->SR, ADC_SR_EOC); } if (READ_BIT(ADC1->SR, ADC_SR_JEOC)) { CLEAR_BIT(ADC1->SR, ADC_SR_JEOC); } if (READ_BIT(ADC1->SR, ADC_SR_AWD)) { CLEAR_BIT(ADC1->SR, ADC_SR_AWD); } if (READ_BIT(ADC2->SR, ADC_SR_EOC)) { CLEAR_BIT(ADC2->SR, ADC_SR_EOC); } if (READ_BIT(ADC2->SR, ADC_SR_JEOC)) { CLEAR_BIT(ADC2->SR, ADC_SR_JEOC); } if (READ_BIT(ADC2->SR, ADC_SR_AWD)) { CLEAR_BIT(ADC2->SR, ADC_SR_AWD); }
in „STM32F103 und ADC DMA mehrere Kanäle“ · Mikrocontroller und Digitale Elektronik ·
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Datei
stm32f10x_it.c
I2C_DIRECTION_TX); I2C_DMAConfig (I2C1, Buffer_Rx1, 0xFFFF, I2C_DIRECTION_RX); /* Clear ADDR by reading SR2 register */ SR2Register = I2C1->SR2; } #else /* Read the I2C1 SR1 and SR2 status registers */ SR1Register = I2C1->SR1; SR2Register = I2C1->SR2; /* If I2C1 is slave (MSL flag = 0) */ if ((SR2Register
in „stm32 Cortex I2C : Master zieht SCL auf Masse“ · Mikrocontroller und Digitale Elektronik ·
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Datei
stm32f10x_it.c
I2C_DIRECTION_TX); I2C_DMAConfig (I2C1, Buffer_Rx1, 0xFFFF, I2C_DIRECTION_RX); /* Clear ADDR by reading SR2 register */ SR2Register = I2C1->SR2; } #else /* Read the I2C1 SR1 and SR2 status registers */ SR1Register = I2C1->SR1; SR2Register = I2C1->SR2; /* If I2C1 is slave (MSL flag = 0) */ if ((SR2Register
in „Cortex I2C zu kurze Impulsdauer“ · Mikrocontroller und Digitale Elektronik ·
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PDF
SAK-C167CR-LM_HA.pdf
. min. max. 1) 1) Oscillator period tOSC SR 30 – 15 – 45 500 ns High time2) t SR 15 3) – 5 – 10 – ns 1 Low time 2) t SR 15 3) – 5 – 10 – ns 2 Rise time2) t3 SR – 8 – 5 – 10 ns 2) Fall time t4 SR – 8 – 5 – 10 ns 1) The minimum and maximum oscillator
in „Problem mit Infinion C167CR mit AM29F200B-70SE“ · Mikrocontroller und Digitale Elektronik ·
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Datei
tfa2.cpp
store_bit(int bit) { //printf("%i %04x\n",bit,sr&0xffff); sr=(sr<<1)|(bit); if ((sr&0xffff)==0x2dd4) { // Sync start printf("SYNC\n"); sr_cnt=0; rdata[0]=(sr>>8)&0xff; byte_cnt=1; invert=0; } // Tolerate inverted sync (maybe useful later...) if (((~sr)&0xffff)==0x2dd4) { printf("Inverted SYNC\n"); sr_cnt=0; rdata[0]=~((sr>>8)&0xff); byte_cnt=1; invert=1; } if (sr_cnt==0) { if (byte_cnt<(int)sizeof(rdata)) { if (invert) rdata[byte_cnt]=~(sr&0xff);
in „SDR-Dekoder für TFA KlimaLogg Pro/IT+ Temperatursensoren“ · Projekte & Code ·
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PDF
MSP430F2xxx_ppt.pdf
Interrupt Driven © 2005 Texas Instruments Inc, Slide 26 USI Reduces CPU Load //Shift16_inout_Software SR = DATA; // Shift16_inout_USI for (CNT=0x10;CNT>0;CNT--) USISR |= DATA; { USICNT |= 0x10; P2OUT &= ~SDO; if (SR & 0x8000) 10 Cycles P2OUT |= SDO; SR = SR << 1; if (P2IN & SDIN) SR |= 0x01; P2OUT |= SCLK
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Datei
UART.vhd
signal txsr : std_logic_vector (9 downto 0):= (others=>'1'); signal txbitcnt : integer range 0 to 10 := 10; signal txcnt : integer range 0 to (Quarz_Taktfrequenz/Baudrate)-1; signal txd_tmp :std_logic := '0'; --signal rxd_sr : std_logic_vector (3 downto 0) := "1111"; -- Flankenerkennung und Eintakten
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Datei
Lcdtreiber1.a51
ACC push PSW push 7 mov A,7 push ACC swap A anl A,#0fh ; High-Nibble ausmaskieren clr C ; subb A,#10 ; jc M_Pr_BCD_ok1 ; add A,#7 M_Pr_BCD_ok1: add A,#('0'+10) mov 7,A lcall _printchar ;high-Nibble fertig. ; pop ACC ; anl A,#0fh ; low-Nibble ausmaskieren clr C ; subb A,#10 ; jc M_Pr_BCD_ok2 add A,#7
in „Ausgabe von signed char auf Display (negative Zahlen)“ · Mikrocontroller und Digitale Elektronik ·
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Datei
i2c_stm32f10x.c
Hardware-Adressen direkt hinterlegt werden. * * Erzeugt: 31.03.2014 * Author: Nicolas */ #ifndef STM32F10x #error "only STM32F10x supported" #endif #include "stm32f10x_gpio.h" #include "stm32f10x_rcc.h" #include "stm32f10x_i2c.h" #include "../src_misc/clock.h" // glu_millis #include "../../main.h" #include
in „STM32F10x : Fehler bei I2C“ · Mikrocontroller und Digitale Elektronik ·
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PDF
TE28F128J3D75.pdf
Status Register Command - Address = any device address - Data = 0x70 Data Cycle - Read Status Register SR[7:0] SR7 = '1' No Yes - Set/Reset Yes Erase Suspend by WSM SR6 = '1' See Suspend/Resume Flowchart No Yes SR2 = '1' Program Suspend See Suspend/Resume Flowchart No Yes Yes Error SR5 = '1' SR4 = '1' Command
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PDF
SM08B-SRSS-TB.pdf
(.157) 3,000 B 2.45(.096) 4 04SR-3S 3.0(.118) 5.0(.197) 3,000 5 05SR-3S 4.0(.157) 6.0(.236) 2,000 6 06SR-3S 5.0(.197) 7.0(.276) 2,000 7 07SR-3S 6.0(.236) 8.0(.315) 2,000 4 ( 8 08SR-3S 7.0(.276) 9.0(.354) 2,000 . 3 9 09SR-3S 8.0(.315) 10.0(.394) 2,000 10 10SR-3S 9.0(.354) 11.0(.433) 2,000 11 11SR-3S 10.0(.394) 12.0(.472) 2,000 (.039) 12 12SR-3S 11.0(.433) 13.0(.512) 2,000 A 13 13SR-3S 12.0(.472) 14.0(.551) 2,000 2.1(.083) 14 14SR-3S
in „[V] EB85-A GPS-Empfaenger“ · Markt ·
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Datei
bascom-sr.txt
to DS (SR pin 14) mr_sr_out alias portb.6 ' connect to MR_N (SR pin 10) sclk_sr_out alias portb.7 ' connect to SHCP (SR pin 11) config portb = output reset mr_sr_out reset lclk_sr_out reset data_sr_out reset sclk_sr_out
in „Abfrage von ca. 130 Tasten“ · Mikrocontroller und Digitale Elektronik ·
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Datei
Schieberegister.txt
to DS (SR pin 14) mr_sr_out alias portb.6 ' connect to MR_N (SR pin 10) sclk_sr_out alias portb.7 ' connect to SHCP (SR pin 11) config portb = output reset mr_sr_out reset lclk_sr_out reset data_sr_out reset sclk_sr_out
in „Abfrage von ca. 130 Tasten“ · Mikrocontroller und Digitale Elektronik ·
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Datei
Schieberegister.txt
to DS (SR pin 14) mr_sr_out alias portb.6 ' connect to MR_N (SR pin 10) sclk_sr_out alias portb.7 ' connect to SHCP (SR pin 11) config portb = output reset mr_sr_out reset lclk_sr_out reset data_sr_out reset sclk_sr_out
in „Abfrage von ca. 130 Tasten“ · Mikrocontroller und Digitale Elektronik ·
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Datei
Gal_a.c
Datenport */ #define CPORT *(char *)CENTPORT+1 /* Controlport: Bit 7 = BUSY-Leitung */ #endif #define SR_STROBE 0x01 /* Bits von Centronics-port */ #define SR_CLOCK 0x02 #define SR_DATEN 0x04 #define GAL_STROBE 0x08 /* Programmierimpuls und Aulesen */ #define GAL_SDIN 0x10 #define GAL_CLOCK 0x20 #define
in „GAL Programmierung“ · Mikrocontroller und Digitale Elektronik ·
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Datei
SPI_Test.c
(!(SPSR & (1<<SPIF))) {;} SR_enable(); } int main(void) { init_avr(); //init_keys(); while(1) { SR_Out(0x0100); SR_Out(0x0101); SR_Out(0x0102); SR_Out(0x0104); SR_Out(0x0108); SR_Out(0x0110); SR_Out(0x0120); SR_Out(0x0200); SR_Out(0x0201); SR_Out(0x0202); SR_Out(0x0204); SR_Out(0x0208); SR_Out(0x0210); SR_Out(0x0220); SR_Out(0x0400); SR_Out(0x0401); SR_Out(0x0402); SR_Out(0x0404); SR_Out(0x0408); SR_Out(0x0410); SR_Out(0x0420); } }
in „Problem mit SPI (Mega16)“ · Mikrocontroller und Digitale Elektronik ·
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STM32F100RB_Reference_Card_Ausschnitt_I2C.pdf
, NA = Non-acknowledge, EVx = Event (with interrupt if ITEVFEN = 1) EV5: SB=1, cleared by reading SR1 register followed by writing the DR register. EV6: ADDR1, cleared by reading SR1 register followed by reading SR2. In 10-bit master receiver mode, this sequence should be followed by writing CR2 with
in „I2C an STM32F100RB konfigurieren“ · Mikrocontroller und Digitale Elektronik ·
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Sinica-GNSS-SR4G008-PS-1.1-838507.pdf
required. 7.0mm 5.8mm Clearance area Antennas for Wireless M2M Applications Product Specification Page 10 Antennas for Wireless M2M Applications Sinica Part No. SR4G008 13.0 Host PCB Size The minimum recommended host PCB size to be used is 40 x 20 (mm). Below is the antenna performance vs PCB length. 40mm
in „Antennenanpassung LTE und GNSS bei SIM7000“ · HF, Funk und Felder ·
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BPW_34.pdf
V R), E = 0 C = f (V R), f = 1 MHz, E = 0 IR = f (T A), V R = 10 V, E = 0 OHF00080 OHF00081 3 OHF00082 4000 100 10 Ι nA R pA C pF R 80 2 3000 10 70 60 2000 50 101 40 30 1000 100 20 10 0 -1 0 5 10 15 V 20 0 -2 -1 0 1 2 10 0 20 40 60 80 ˚C 100 V 10 10 10 10 V 10 R VR TA Directional Characteristics S rel f (ϕ) 40 30 20 10 0 OHF01402 ϕ 1.0 50 0.8 60 0.6 70 0.4 80 0.2 90 0 100 1.0 0.8 0.6 0.4 0 20 40 60 80 100 120 2007-05-23 4 BPW 34, BPW 34 S, BPW 34 SR Maßzeichnung Package Outlines BPW 34 5.4(0.213) Cathodemarking 4.9
in „Photodiode messen“ · Analoge Elektronik und Schaltungstechnik ·
