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LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.std_logic_arith.all;
USE ieee.std_logic_textio.all; --
Bibliotheken für TextIO / FileIO
USE std.textio.all;
ENTITY FileIO IS
PORT(
CLK : IN std_logic; -- Clock
STEP : OUT std_logic; -- RW_CMD
OP_A : OUT std_logic;
OP_B : OUT std_logic;
CARRY_IN : OUT std_logic; -- RW_CMD
SUMME : IN std_logic; -- RW_CMD
CARRY_OUT : IN std_logic -- RW_CMD
);
END ENTITY;
ARCHITECTURE behaviour OF FileIO IS
BEGIN
main: PROCESS
PROCEDURE read_file IS
VARIABLE lin_in : line; -- Zeile von Datei
VARIABLE lin_out : line; -- Zeile in Datei
FILE input_file : text; -- Input
FILE output_file : text; -- Output
BEGIN
file_open(input_file, "Input.piece.log", read_mode); -- Open a
file for reading the file.
file_open(output_file, "Output.piece.log", write_mode); -- Open a
file for reading the file.
print(out_file, "## Output piece for all signals\n");
print(out_file, "#\tStep\tsumme\tcarry_out");
WHILE(endfile(input_file) = false) LOOP
readline(input_file, lin); -- Read the line and save it in lin
ASSERT break REPORT "Error reading input file!";
IF(nr(1 to 2) /= "#") THEN -- If the line opens with # or ##,
than skip the line!
read(lin, piece); -- HIGH or LOW
STEP <= to_std_logic(piece);
read(lin, piece); -- Tab between left and step
OP_A <= to_std_logic(piece);
read(lin, piece); -- Tab between step and val
OP_B <= to_std_logic(piece);
read(lin, piece); -- Tab between step and val
CARRY_IN <= to_std_logic(piece);
write(lin_out, piece & "\t");
SUMME <= chr(piece);
write(lin_out, piece & "\n");
CARRY_OUT <= chr(piece);
write(lin_out, piece & "\n");
ELSE NULL;
END IF;
writeline(output_file, lin_out);
END LOOP;
file_close(input_file);
file_close(output_file);
END PROCEDURE;
begin
end process;
END ARCHITECTURE;
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