1 | //! SDRAM initialization delay in number of CLKper2 cycles (100 us)
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2 | #define BOARD_EBI_SDRAM_INITDLY \
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3 | (100 * 2 * sysclk_get_per2_hz() / 1000000)
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4 | //! SDRAM refresh interval in number of CLKper2 cycles (16 us)
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5 | #define BOARD_EBI_SDRAM_REFRESH \
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6 | (16 * 2 * sysclk_get_per2_hz() / 1000000)
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7 | /* \brief EBI chip select configuration
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8 | *
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9 | * This struct holds the configuration for the chip select used to set up the
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10 | * SDRAM. The example code will use the EBI helper function to setup the
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11 | * contents before writing the configuration using ebi_cs_write_config().
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12 | */
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13 | static struct ebi_cs_config cs_config;
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14 | /*
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15 | * \brief EBI SDRAM configuration
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16 | *
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17 | * This struct holds the configuration for the SDRAM. The example code will
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18 | * use the EBI helper function to setup the contents before writing the
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19 | * configuration using ebi_sdram_write_config().
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20 | */
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21 | static void InitSDRAM(void) {
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22 | /*
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23 | * Configure the EBI port with 12 address lines, no address latches or
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24 | * low pin count, and set it in SDRAM mode with 3-port EBI port.
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25 | */
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26 | ebi_setup_port(12, 0, 0, EBI_PORT_3PORT | EBI_PORT_SDRAM);
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27 | /*
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28 | * Configure the EBI chip select for an 8 MB SDRAM located at
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29 | * \ref BOARD_EBI_SDRAM_BASE.
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30 | */
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31 | ebi_cs_set_mode(&cs_config, EBI_CS_MODE_SDRAM_gc);
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32 | ebi_cs_set_address_size(&cs_config, EBI_CS_ASIZE_8MB_gc);
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33 | ebi_cs_set_base_address(&cs_config, BOARD_EBI_SDRAM_BASE);
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34 |
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35 | /* Configure the EBI chip select to be in SDRAM mode. */
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36 | ebi_sdram_set_mode(&cs_config, EBI_CS_SDMODE_NORMAL_gc);
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37 |
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38 | /* Setup the number of SDRAM rows and columns. */
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39 | ebi_sdram_set_row_bits(&sdram_config, 12);
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40 | ebi_sdram_set_col_bits(&sdram_config, 10);
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41 | /* Further, setup the SDRAM timing. */
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42 | ebi_sdram_set_cas_latency(&sdram_config, 3);
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43 | ebi_sdram_set_mode_delay(&sdram_config, EBI_MRDLY_2CLK_gc);
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44 | ebi_sdram_set_row_cycle_delay(&sdram_config, EBI_ROWCYCDLY_7CLK_gc);
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45 | ebi_sdram_set_row_to_precharge_delay(&sdram_config, EBI_RPDLY_7CLK_gc);
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46 | ebi_sdram_set_write_recovery_delay(&sdram_config, EBI_WRDLY_1CLK_gc);
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47 | ebi_sdram_set_self_refresh_to_active_delay(&sdram_config,
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48 | EBI_ESRDLY_7CLK_gc);
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49 | ebi_sdram_set_row_to_col_delay(&sdram_config, EBI_ROWCOLDLY_7CLK_gc);
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50 | ebi_sdram_set_refresh_period(&sdram_config, BOARD_EBI_SDRAM_REFRESH);
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51 | ebi_sdram_set_initialization_delay(&sdram_config,
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52 | BOARD_EBI_SDRAM_INITDLY);
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53 |
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54 | /* Write SDRAM configuration into the EBI registers. */
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55 | ebi_sdram_write_config(&sdram_config);
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56 | /* Write the chip select configuration into the EBI registers. */
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57 | ebi_cs_write_config(EBI_SDRAM_CS, &cs_config);
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58 |
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59 | ebi_enable_cs(EBI_SDRAM_CS, &cs_config);
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60 | do {
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61 | // Wait for SDRAM to initialize.
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62 | } while (!ebi_sdram_is_ready());
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63 | }
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64 | {/c]
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65 | Lesen und schreiben tust du am besten mit den Hugemem routinen:
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66 | [c]// write something
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67 | hugemem_write32(writeptr ,time);
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68 | writeptr +=4;
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69 | hugemem_write16(writeptr ,x);
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70 | writeptr +=2;
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71 | //Read something
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72 | hugemem_read32(readptr ,time);
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73 | readptr +=4;
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74 | hugemem_read16(readptr ,x);
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75 | readptr +=2;
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