Datenblatt zum Motorola OF80B gesucht!

Hallo Hinz,

das einzige, was ich gefunden Habe ist:
Der zugehörige Link aufs DB zeigl leider ins Leere.

Gruß
Markus
DL8MBY

OF80B

The CDR often includes a loss-of-lock (LOL) alarm, which monitors 
whether the PLL is locked to the received data stream. The CDR's serial 
stream of regenerated data and the recovered clock signal are usually 
fed to a deserializer, whose conversion ratio depends on the data's bit 
rate and the interface capability (speed) of the CMOS system components

The OF80B/OF80B combine four 12-bit, voltage-output digital-to-analog 
converters (DACs) and four precision output amplifiers in a space-saving 
16-pin package. Offset, gain, and linearity are factory calibrated to 
provide the OF80Bs 1LSB total unadjusted error. The OF80B operates with 
5V supplies, while the OF80B uses -5V and +12V to +15V supplies. Each 
DAC has a double-buffered input, organized as an input register followed 
by a DAC register. A 16-bit serial word is used to load data into each 
input/DAC register. The serial interface is compatible with either 
SPI/QSPI™ or Microwire™, and allows the input and DAC registers to be 
updated independently or simulta- neously with a single software 
command. The DAC reg- isters can be simultaneously updated with a 
hardware LDAC pin. All logic inputs are TTL/CMOS compatible.