Sync_ram mit Inout aus der Beschreibung mit Werten steuern.

LIBRARY ieee;

USE ieee.std_logic_1164.ALL;

USE ieee.numeric_std.ALL;

ENTITY ram IS

  GENERIC

  (

    ADDRESS_WIDTH  : integer := 13;

    DATA_WIDTH    : integer := 8

  );

  PORT

  (

  clock           : IN  std_logic;  

  we             : inout  std_logic;

  data_in         : inout  std_logic_vector(DATA_WIDTH - 1 DOWNTO 0);

  data_out       : inout  std_logic_vector(DATA_WIDTH - 1 DOWNTO 0);

  write_address  : inout  std_logic_vector(ADDRESS_WIDTH - 1 DOWNTO 0);

  read_address   : inout  std_logic_vector(ADDRESS_WIDTH - 1 DOWNTO 0);

  we1             : inout std_logic;

  data_in1       : inout std_logic_vector(DATA_WIDTH - 1 DOWNTO 0);

  data_out1       : inout std_logic_vector(DATA_WIDTH - 1 DOWNTO 0);

   write_address1 : inout std_logic_vector(ADDRESS_WIDTH - 1 DOWNTO 0);

  read_address1   : inout std_logic_vector(ADDRESS_WIDTH - 1 DOWNTO 0)

  );

END ram;

ARCHITECTURE rtl OF ram IS

  TYPE RAM IS ARRAY(0 TO 2 ** ADDRESS_WIDTH - 1) OF std_logic_vector(DATA_WIDTH - 1 DOWNTO 0);

  SIGNAL ram_block : RAM;

  TYPE RAM1 IS ARRAY(0 TO 2 ** ADDRESS_WIDTH - 1) OF std_logic_vector(DATA_WIDTH - 1 DOWNTO 0);

  SIGNAL ram_block1 : RAM1;

BEGIN

  PROCESS (clock)

  BEGIN

    IF (clock'event AND clock = '1') THEN

      IF (we = '1') THEN

        ram_block(to_integer(unsigned(write_address))) <= data_in;

      END IF;

      data_out <= ram_block(to_integer(unsigned(read_address)));

    END IF;

  END PROCESS;

  PROCESS (clock)

  BEGIN

    IF (clock'event AND clock = '1') THEN

      IF (we1 = '1') THEN

        ram_block1(to_integer(unsigned(write_address1))) <= data_in1;

      END IF;

      data_out1 <= ram_block1(to_integer(unsigned(read_address1)));

    END IF;

  END PROCESS;

  PROCESS (clock)

  BEGIN

    IF (clock'event AND clock = '1') THEN

      we <='1';

      data_in <="11111111";

      write_address<="0000000000001";

    END IF;

  END PROCESS;

  PROCESS (clock)

  BEGIN

    IF (clock'event AND clock = '1') THEN

      we1 <='1';

      data_in1 <="11111111";

      write_address1<="0000000000001";

    END IF;

  END PROCESS;

END rtl;