Alexxx schrieb:
> Vieleicht weis jemand bescheid?
Ja, der Datenblatt weiss Bescheid.
Auszug aus einem ATxMega Datenblatt:
-----------------------------------------------------------------
* Bit 7 – IF: Interrupt Flag
This flag is set when a serial transfer is complete and one byte
is completely shifted in/out of the DATA register. If SS is
configured as input and is driven low when the SPI is in master
mode, this will also set this flag. IF is cleared by hardware
when executing the corresponding interrupt vector. Alternatively,
the IF flag can be cleared by first reading the STATUS
register when IF is set, and then accessing the DATA register.
-----------------------------------------------------------------