1 | // Sollte vorne zu den anderen includes
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2 | #include <ebi.h>
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3 | #include <ebi_port.h>
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4 | #include <hugemem.h>
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5 | // constants for refresh and init
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6 | //! SDRAM initialization delay in number of CLKper2 cycles (100 us)
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7 | #define BOARD_EBI_SDRAM_INITDLY \
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8 | (100 * 2 * sysclk_get_per2_hz() / 1000000)
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9 |
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10 | //! SDRAM refresh interval in number of CLKper2 cycles (16 us)
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11 | #define BOARD_EBI_SDRAM_REFRESH \
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12 | (16 * 2 * sysclk_get_per2_hz() / 1000000)
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13 |
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14 | /**
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15 | * \brief EBI chip select configuration
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16 | *
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17 | * This struct holds the configuration for the chip select used to set up the
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18 | * SDRAM. The example code will use the EBI helper function to setup the
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19 | * contents before writing the configuration using ebi_cs_write_config().
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20 | */
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21 | static struct ebi_cs_config cs_config;
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22 |
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23 | /**
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24 | * \brief EBI SDRAM configuration
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25 | *
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26 | * This struct holds the configuration for the SDRAM. The example code will
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27 | * use the EBI helper function to setup the contents before writing the
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28 | * configuration using ebi_sdram_write_config().
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29 | */
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30 | static struct ebi_sdram_config sdram_config;
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31 | // Init the EBI and the RAM. Note that the RAM will not be cleared here.
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32 | static void InitSDRAM(void) {
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33 | /*
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34 | * Configure the EBI port with 12 address lines, no address latches or
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35 | * low pin count, and set it in SDRAM mode with 3-port EBI port.
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36 | */
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37 | ebi_setup_port(12, 0, 0, EBI_PORT_3PORT | EBI_PORT_SDRAM);
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38 |
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39 | /*
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40 | * Configure the EBI chip select for an 8 MB SDRAM located at
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41 | * \ref BOARD_EBI_SDRAM_BASE.
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42 | */
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43 | ebi_cs_set_mode(&cs_config, EBI_CS_MODE_SDRAM_gc);
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44 | ebi_cs_set_address_size(&cs_config, EBI_CS_ASIZE_8MB_gc);
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45 | ebi_cs_set_base_address(&cs_config, BOARD_EBI_SDRAM_BASE);
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46 |
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47 | /* Configure the EBI chip select to be in SDRAM mode. */
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48 | ebi_sdram_set_mode(&cs_config, EBI_CS_SDMODE_NORMAL_gc);
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49 |
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50 | /* Setup the number of SDRAM rows and columns. */
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51 | ebi_sdram_set_row_bits(&sdram_config, 12);
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52 | ebi_sdram_set_col_bits(&sdram_config, 10);
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53 |
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54 | /* Further, setup the SDRAM timing. */
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55 | ebi_sdram_set_cas_latency(&sdram_config, 3);
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56 | ebi_sdram_set_mode_delay(&sdram_config, EBI_MRDLY_2CLK_gc);
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57 | ebi_sdram_set_row_cycle_delay(&sdram_config, EBI_ROWCYCDLY_7CLK_gc);
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58 | ebi_sdram_set_row_to_precharge_delay(&sdram_config, EBI_RPDLY_7CLK_gc);
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59 | ebi_sdram_set_write_recovery_delay(&sdram_config, EBI_WRDLY_1CLK_gc);
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60 | ebi_sdram_set_self_refresh_to_active_delay(&sdram_config,
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61 | EBI_ESRDLY_7CLK_gc);
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62 | ebi_sdram_set_row_to_col_delay(&sdram_config, EBI_ROWCOLDLY_7CLK_gc);
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63 | ebi_sdram_set_refresh_period(&sdram_config, BOARD_EBI_SDRAM_REFRESH);
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64 | ebi_sdram_set_initialization_delay(&sdram_config,
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65 | BOARD_EBI_SDRAM_INITDLY);
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66 |
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67 | /* Write SDRAM configuration into the EBI registers. */
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68 | ebi_sdram_write_config(&sdram_config);
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69 | /* Write the chip select configuration into the EBI registers. */
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70 | ebi_cs_write_config(EBI_SDRAM_CS, &cs_config);
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71 |
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72 | ebi_enable_cs(EBI_SDRAM_CS, &cs_config);
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73 | do {
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74 | // Wait for SDRAM to initialize.
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75 | } while (!ebi_sdram_is_ready());
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76 |
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77 | /* Debug: Enable LED1: SDRAM is ready. */
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78 | LED_PORT.OUTCLR = OLED1;
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79 | _delay_ms(100);
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80 | LED_PORT.OUTSET = OLED1;
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81 | }
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82 | // Clear and Write SDRam
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83 | static void ClearSDRAM(void) {
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84 | hugemem_ptr_t n;
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85 | for (n = BOARD_EBI_SDRAM_BASE; n < (BOARD_EBI_SDRAM_SIZE + BOARD_EBI_SDRAM_BASE);n+=4) {
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86 | hugemem_write32(n,0);
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87 | }
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88 | }
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89 | // My application specific write routine, writeptr is a global , as is the time variables 'days, hours, minutes, seconds'
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90 | static void WriteSet(uint16_t x, uint16_t y , uint16_t z){
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91 | uint32_t time = ((days * 16777216) + (hours * 65536) + (minutes * 256) + seconds);
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92 | // Wrap around pointer if its beyond the RAM Range
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93 | if (writeptr > (BOARD_EBI_SDRAM_SIZE + BOARD_EBI_SDRAM_BASE)) writeptr = BOARD_EBI_SDRAM_BASE;
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94 | hugemem_write32(writeptr ,time);
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95 | writeptr +=4;
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96 | hugemem_write16(writeptr ,x);
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97 | writeptr +=2;
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98 | hugemem_write16(writeptr ,y);
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99 | writeptr +=2;
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100 | hugemem_write16(writeptr ,z);
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101 | writeptr +=2;
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102 | }
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