Feelin XR Pro Vape Podsystem Teardown

Reset: Core did not halt after reset, trying to disable WDT.

Reset: Halt core after reset via DEMCR.VC_CORERESET.

Reset: Reset device via reset pin

Reset: VC_CORERESET did not halt CPU. (Debug logic also reset by reset pin?).

Reset: Reconnecting and manually halting CPU.

Found SW-DP with ID 0x0BC11477

DPv0 detected

CoreSight SoC-400 or earlier

AP map detection skipped. Manually configured AP map found.

AP[0]: AHB-AP (IDR: Not set, ADDR: 0x00000000)

AP[0]: Core found

AP[0]: AHB-AP ROM base: 0xE00FF000

CPUID register: 0x410CC601. Implementer code: 0x41 (ARM)

Found Cortex-M0 r0p1, Little endian.

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WARNING: CPU could not be halted

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void display_init(void) {

    // === 1. HARDWARE RESET ===

    // Basis: DAT_40040000 = 0x40040000 (GPIO-Port-Basisadresse)

    // Bit 3 (0x08) = RESET-Pin

    GPIO[0x07] |= 0x08;          // RESET → HIGH

    delay_ms(1);                 // FUN_00004df8(1)

    GPIO[0x07] &= 0xF7;          // RESET → LOW  (AND mit ~0x08)

    delay_ms(1);                 // FUN_00004df8(1)

    GPIO[0x07] |= 0x08;          // RESET → HIGH

    delay_ms_with_check(10);     // FUN_00004e34(10)

    // Zusätzlich: CS-Pin setzen (DAT_40040001, Bit 5 cleared via AND 0xDF)

    GPIO[0x01] &= 0xDF;          // CS → LOW (Chip Select aktiv)

    // === 2. REGISTER UNLOCK (GC9A01-spezifisch) ===

    spi_write_byte(CMD, 0xFE);   // Inter-register command unlock 1

    spi_write_byte(CMD, 0xEF);   // Inter-register command unlock 2

    // === 3. DISPLAY KONFIGURATION ===

    spi_write_byte(CMD,  0xB0);

    spi_write_byte(DATA, 0xC0);  // Interface mode

    spi_write_byte(CMD,  0xB2);  // FRMCTR2 - Frame rate normal mode

    spi_write_byte(DATA, 0x24);

    spi_write_byte(CMD,  0xB3);  // FRMCTR3 - Frame rate partial mode

    spi_write_byte(DATA, 0x03);

    spi_write_byte(CMD,  0xB7);  // ETMOD - Entry mode

    spi_write_byte(DATA, 0x01);

    spi_write_byte(CMD,  0xB6);  // DISSET5 - Display function control

    spi_write_byte(DATA, 0x19);

    spi_write_byte(CMD,  0xAC);

    spi_write_byte(DATA, 0xDB);

    spi_write_byte(CMD,  0xAB);

    spi_write_byte(DATA, 0x0F);

    spi_write_byte(CMD,  0x3A);  // COLMOD - Pixel format

    spi_write_byte(DATA, 0x05);  // 16-bit RGB565

    spi_write_byte(CMD,  0xB4);  // INVCTR - Display inversion control

    spi_write_byte(DATA, 0x04);

    spi_write_byte(CMD,  0xA8);

    spi_write_byte(DATA, 0x0C);

    spi_write_byte(CMD,  0xB8);  // Power control sequence

    spi_write_byte(DATA, 0x08);

    spi_write_byte(CMD,  0xED);

    spi_write_byte(DATA, 0x03);

    spi_write_byte(CMD,  0xEA);

    spi_write_byte(DATA, 0x9F);

    spi_write_byte(CMD,  0xC6);  // FRCTRL2

    spi_write_byte(DATA, 0x2A);

    spi_write_byte(CMD,  0xC7);

    spi_write_byte(DATA, 0x10);

    // === 4. GAMMA POSITIV (0xF0) — 13 Bytes ===

    spi_write_byte(CMD,  0xF0);

    spi_write_byte(DATA, 0x09);

    spi_write_byte(DATA, 0x35);

    spi_write_byte(DATA, 0x2A);

    spi_write_byte(DATA, 0x4A);

    spi_write_byte(DATA, 0xA9);

    spi_write_byte(DATA, 0x39);

    spi_write_byte(DATA, 0x35);

    spi_write_byte(DATA, 0x60);

    spi_write_byte(DATA, 0x00);  // ← Sonderfall: mov r0,r1 bei 0x364A

    spi_write_byte(DATA, 0x14);

    spi_write_byte(DATA, 0x0A);

    spi_write_byte(DATA, 0x16);

    spi_write_byte(DATA, 0x10);

    spi_write_byte(DATA, 0x1F);

    // === 5. GAMMA NEGATIV (0xF1) — 14 Bytes ===

    spi_write_byte(CMD,  0xF1);

    spi_write_byte(DATA, 0x13);

    spi_write_byte(DATA, 0x24);

    spi_write_byte(DATA, 0x55);

    spi_write_byte(DATA, 0x3C);

    spi_write_byte(DATA, 0xC6);

    spi_write_byte(DATA, 0x16);

    spi_write_byte(DATA, 0x3F);

    spi_write_byte(DATA, 0x60);

    spi_write_byte(DATA, 0x08);

    spi_write_byte(DATA, 0x06);

    spi_write_byte(DATA, 0x0D);

    spi_write_byte(DATA, 0x1F);

    spi_write_byte(DATA, 0x1C);

    spi_write_byte(DATA, 0x10);

    // === 6. SLEEP OUT + DISPLAY ON ===

    spi_write_byte(CMD, 0x11);   // SLPOUT - Exit sleep mode

    delay_ms_with_check(100);    // Pflicht-Delay nach SLPOUT (r0=0x64)

    spi_write_byte(CMD, 0x29);   // DISPON - Display on

    delay_ms_with_check(10);

    // === 7. BACKLIGHT EINSCHALTEN ===

    GPIO[0x01] |= 0x20;          // BL-Pin → HIGH (Bit 5 setzen)

    set_pwm_backlight(0);        // FUN_00005666(0) → PWM init mit Standardhelligkeit

}