Gast
#3571880
Hallo an alle, nach meinen ersten Designs möchte ich die nun dauerhaft im SPI-Flash des Nexus-4 Board speichern. Dazu habe ich in iMPACT mittels des PROM Formatters eine Vorlage für ein 128 Mbit SPI Flashs samt MCS File erzeugt. Beim Programmieren kommet es jedoch zur Fehlermeldung: <pre> INFO:iMPACT - Current time: 3/12/14 9:02 AM // *** BATCH CMD : Program -p 1 -dataWidth 1 -spionly -e -v -loadfpga PROGRESS_START - Starting Operation. Maximum TCK operating frequency for this device chain: 66000000. Validating chain... Boundary-scan chain validated successfully. 1: Device Temperature: Current Reading: 41.52 C, Min. Reading: 37.09 C, Max. Reading: 42.01 C 1: VCCINT Supply: Current Reading: 0.999 V, Min. Reading: 0.987 V, Max. Reading: 1.008 V 1: VCCAUX Supply: Current Reading: 1.784 V, Min. Reading: 1.781 V, Max. Reading: 1.784 V Unprotect sectors: FALSE SPI SLAVE TYPE in Cse_Operate.c is 99 Core is not loaded. INFO:iMPACT - Downloading /opt/Xilinx/14.7/ISE_DS/ISE/data/cse/cseflash/artix7/xc7a100t_xsdbspi.co r core file. INFO:iMPACT - Creating XC7A100T device. PROGRESS_START - Starting Operation. '1': Programming device... Match_cycle = NoWait. Match cycle: NoWait LCK_cycle = NoWait. LCK cycle: NoWait done. INFO:Cse - Status register values: INFO:Cse - 0011 1111 1001 1110 0000 1000 0000 0010 INFO:Cse - '1': Completed downloading bit file to device. INFO:Cse - '1': Programming completed successfully. PROGRESS_END - End Operation. Elapsed time = 1 sec. key: dclk_has_reset, value: 0 key: period_frc, value: 0 key: period_int, value: 10 Found Slave on Bus Index. Found Slave on Bus Index. Slave Int Type is 99, slave Index is 0 , SPI_SLAVE is 99 Slave Type is 99, slave Index is 0 SPI core clock speed value = 0xA801. PROGRESS_START - Starting Operation. '1': IDCODE is '012018' (in hex). '1': ID Check failed. INFO:Cse - The operation did not complete successfully. '1': Configuration data download to FPGA was not successful. DONE did not go high, please check your configuration setup and mode settings. PROGRESS_END - End Operation. Elapsed time = 3 sec. </pre> Ein direktes programmieren des FPGAs mit dem Bit-File funktioniert ohne Probleme. Woran kann es hier liegen? Danke im Voraus Martin