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DMP10H400SEQ-838150.pdf
Voltage Drain Current DSS 1 µA VDS = -80V, GS= 0V Gate-Source Leakage GSS ±100 nA VGS = ±20V, DS = 0V ON CHARACTERISTICS (Note 7) Gate Threshold Voltage V -1.0 -2.2 -3.0 V V = V , I = -250µA GS(TH) DS GS D 203 250 VGS = -10V,DI = -5A Static Drain-Source On-Resistance R DS(ON) 241 300 m VGS
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PI4IOE5V9555.pdf
1.3 — μs tHIGH HIGH Period of the SCL Clock — 4.0 — 0.6 — μs tf Fall Time of both SDA and SCL — — 300 — 300 ns Signals Rise Time of both SDA and SCL tr Signals — — 1000 — 300 ns tSP Pulse Width of Spikes that must be — — 50 — 50 ns Suppressed by the Input Filter Port Timing v(Q) Data Output Valid Time
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PDF
IRF9Z34-Vishay.pdf
- - Zero Gate Voltage Drain Current IDSS DS GS - 100 μA VDS = - 48 V, VGS = 0 V, J = 150 °C - - - 500 Drain-Source On-State Resistance RDS(on) V GS = - 10 V ID= - 11 A b - - 0.14 Ω Forward Transconductance gfs V DS = - 25 V,DI = - 11 A 5.9 - -
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PDF
93LC66.pdf
not exceed .005" (0.127mm) per side. JEITA (formerly EIAJ) equivalent: SC-74A Drawing No. C04-120 DS21795A-page 14 2003 Microchip Technology Inc. 93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C 8-Lead Plastic Dual In-line (P) – 300 mil (PDIP) E1 D 2 n 1 α E A A2 L c A1 β B1 p eB B Units INCHES* MILLIMETERS Dimension
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PDF
Chess-Schematic.PDF
PISIPO104 IL2 IL1 PILED200 PILED200 PICable201 PICable202 GND PISIPO101D DRAIN1 PISIPO5L02 PL01 PILED300 PILED300 1K GND 5V PICable2032 PICable204 SIPLO_SRCK 5V PISIPO1015 DRAIN2 PISIPO106 1K GND IL2 IL1 PILED400 PILED400 5V PICable2054 PICable206 PISIPO107CK DRAIN3 PISIPO4L02 PL01 PILED500 PILED500 1K
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PDF
BMP280_2018.pdf
Data sheet Document revision 1.19 Document release date January 8th, 2018 Document number BST-BMP280-DS001-19 Technical reference code(s) 0273 300 436 Notes Data in this document are subject to change without notice. Product photos and pictures are for illustration purposes only and may differ from the
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PDF
RJH60F5DPQ.pdf
a d 20 V GE= 0 V C Coes i Ta = 25C D Pulse Test Ta = 2°C Cres 0 10 0 1 2 3 4 0 50 100 150 200 250 300 C-E Diode Forward Voltage V (V) CEF Collector to Emitter VoltageCE (V) Dynamic Input Characteristics (Typical) ) ( 800 V 16 ) E GE ( C E V VCE G e 600 12 V a V = 300 V e o CC a V 600 V o e 400 8 V i e m i E m r 200 V CC= 600 V 4 E t 300 V t e IC= 40 A t l Ta = 25°C G C 0 0 0 20 40 60 80 100 Gate Charge Qg (nc) R07DS0326EJ0200 Rev.2.00 Page 4 of 7 Jul 22, 2011 RJH60F5DPQ-A0 Preliminary Switching Characteristics (Typical) (1) Switching
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PDF
l6203.pdf
TRANSISTORS OFF DSS Leakage Current Fig. 11 s = 52 V 1 mA ON RDS On Resistance Fig. 4,5 0.3 0.55 V DS(ON) Drain Source Voltage Fig. 9 DS = 1A L6201 0.3 V DS = 1.2A L6202 0.36 V DS = 3A L6201PS/0 0.9 V 3 V sens Sensing Voltage – 1 4 V SOURCEDRAIN DIODE Vsd Forward ON Voltage Fig. 6a and b SD = 1A L6201
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PDF
L6203.pdf
TRANSISTORS OFF DSS Leakage Current Fig. 11 s = 52 V 1 mA ON RDS On Resistance Fig. 4,5 0.3 0.55 V DS(ON) Drain Source Voltage Fig. 9 DS = 1A L6201 0.3 V DS = 1.2A L6202 0.36 V DS = 3A L6201PS/0 0.9 V 3 V sens Sensing Voltage – 1 4 V SOURCEDRAIN DIODE Vsd Forward ON Voltage Fig. 6a and b SD = 1A L6201
in „Eingangsfrequenz Vollbrückentreiber L6203“ · Mikrocontroller und Digitale Elektronik ·
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PDF
L6202_L6203_STM.pdf
TRANSISTORS OFF DSS Leakage Current Fig. 11 s = 52 V 1 mA ON RDS On Resistance Fig. 4,5 0.3 0.55 V DS(ON) Drain Source Voltage Fig. 9 DS = 1A L6201 0.3 V DS = 1.2A L6202 0.36 V DS = 3A L6201PS/0 0.9 V 3 V sens Sensing Voltage – 1 4 V SOURCEDRAIN DIODE Vsd Forward ON Voltage Fig. 6a and b SD = 1A L6201
in „L6203 DMOS Full Bridge Driver testen“ · Analoge Elektronik und Schaltungstechnik ·
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PDF
DG211_70040.pdf
Unit Analog Switch Analog Signal Range VANALOG Full –15 15 V Drain-Source On-Resistance r Room 45 85 DS(on) Full 100 V D "10 V, IS= 1 mA W rDS(on)atch DrDS(on) Room 2 Room –0.5 "0.01 0.5 Source Off Leakage Current S(off) VS= "14 V, VD= #14 V Full –5 5 Room –0.5 "0.01 0.5 Drain Off Leakage Current D(off
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PDF
DG212_Siliconix.pdf
Unit Analog Switch Analog Signal Range VANALOG Full –15 15 V Drain-Source On-Resistance r Room 45 85 DS(on) Full 100 V D "10 V, IS= 1 mA W rDS(on)atch DrDS(on) Room 2 Room –0.5 "0.01 0.5 Source Off Leakage Current S(off) VS= "14 V, VD= #14 V Full –5 5 Room –0.5 "0.01 0.5 Drain Off Leakage Current D(off
in „Analogschalter mit Logikpegel-Shifter“ · Analoge Elektronik und Schaltungstechnik ·
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PDF
FQ44N10F.pdf
µA l M VDS = 80 V, C = 150°C -- -- 100 µA O S IGSSF Gate-Body Leakage Current, Forward VGS = 25 V, DS = 0 V -- -- 100 nA F I Gate-Body Leakage Current, Reverse V = -25 V, V = 0 V -- -- -100 nA E GSSR GS DS T On Characteristics V GS(th) Gate Threshold Voltage VDS = VGS, D = 250 µA 2.0 -- 4.0 V R DS(on
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PDF
IRF8736.pdf
On-Resistance Vs. Temperature www.irf.com 3 IRF8736PbF 10000 V = 0V, f = 1 MHZ 5 GS D = 14.4A Ciss= Cgs+ gd, ds SHORTED ) Crss= Cgd ( VDS = 24V C = C + C g 4 V = 15V ) oss ds gd l DS p Ciss o ( e c r 3 t o c 1000 - p t a Coss t 2 , a C , S 1 Crss VG 0 100 1 10 100 0 4 8 12 16 20 V , Drain-to-Source Voltage (V) Qg, Total Gate Charge (nC) DS Fig 5. Typical Capacitance Vs. Fig 6. Typical Gate Charge Vs. Drain-to-Source Voltage Gate-to-Source Voltage 1000 1000 OPERATION IN THIS AREA LIMITED BY R (on) ) ) DS ( ( n 100 n 100 e r 100µsec u u
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PDF
IRF_1404_S.pdf
LIMITED BY R ) DS(on) ( ° n TJ= 175 C )000 e ( u100 t 10us C e i r r C100 100us D i r TJ= 25 C r e D 1ms e 10 , , I 10ms D 10 IS TC= 25 C TJ= 175 C V GS = 0 V Single Pulse 1 1 0.4 0.8 1.2 1.6 2.0 2.4 1 10 100 VSD ,Source-to-Drain Voltage (V) V DS , Drain-to-Source Voltage (V) Fig 7. Typical Source-Drain Diode Fig 8. Maximum Safe Operating Area Forward Voltage 4 www.irf.com IRF1404S/L R 200 V D LIMITED BY PACKAGE DS VGS 160 D.U.T. R G + A - DD
in „Geiger Counter Sparkfun“ · Mikrocontroller und Digitale Elektronik ·
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PDF
irf_1404.pdf
negligible (turn-on isSdoDinated by L +L ) Notes: Repetitive rating; pulse width limited by Pulse width ≤ 300µs; duty cycle ≤ 2%. max. junction temperature. (See fig. 11) Cosseff. is a fixed capacitance that gives the same charging time Starting T = 25°C, L = 0.12mH J as Cosswhile DS is rising from 0 to 8DSSV
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PDF
ADC0804_NSC.pdf
Supply Voltage RD to Output Data Valid vs. Supply Voltage A vs. Load Capacitance D 0 8 4 A D C 0 0 5 DS005671-38 DS005671-40 DS005671-39 fCLK vs. Clock Capacitor Full-Scale Error vs Effect of Unadjusted Offset Error Conversion Time vs. VREF/2 Voltage DS005671-41 DS005671-42 DS005671-43 Output Current vs Power Supply Current Linearity Error at Low Temperature vs Temperature (Note 9) V REF/2 Voltages DS005671-44 DS005671-46 DS005671-45 5 www.national.com 5 0 0 TRI-STATE Test Circuits and Waveforms C D = / 1H 1H, L 10 pF 0 8 0 D A 3 8 0 C D DS005671-48 / DS005671-47 t 20 ns 0 r 8 C t t , C=10 pF D 0H
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PDF
ADC0801_05.pdf
Supply Voltage RD to Output Data Valid vs. Supply Voltage A vs. Load Capacitance D 0 8 4 A D C 0 0 5 DS005671-38 DS005671-40 DS005671-39 fCLK vs. Clock Capacitor Full-Scale Error vs Effect of Unadjusted Offset Error Conversion Time vs. VREF/2 Voltage DS005671-41 DS005671-42 DS005671-43 Output Current vs Power Supply Current Linearity Error at Low Temperature vs Temperature (Note 9) V REF/2 Voltages DS005671-44 DS005671-46 DS005671-45 5 www.national.com 5 0 0 TRI-STATE Test Circuits and Waveforms C D = / 1H 1H, L 10 pF 0 8 0 D A 3 8 0 C D DS005671-48 / DS005671-47 t 20 ns 0 r 8 C t t , C=10 pF D 0H
in „Verständnisfrage zum ADC080x (VIN-MIN/DC-Offset)“ · Analoge Elektronik und Schaltungstechnik ·
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L6206.pdf
40 60 80 100 f [kHz] Tj [°C] SW Figure 28. Typical low-side R DS(ON) vs. supply Figure 29. Typical drain-source diode forward voltage ON characteristic R DS(ON) ] ISD[A] 0.300 3.0 Tj= 25 °C 0.296 T = 25 °C 2.5 j 0.292 2.0 0.288 1.5 0.284 1.0 0.280 0.5 0.276 0.0 0
in „l6206 Datenblatt Fehler?“ · Mikrocontroller und Digitale Elektronik ·
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PDF
SeikoLCD.pdf
Spec. No. : MG325E01R300-001 Product : LCD Module Rev. : a Development Spec. Product No. : G325E01R300 Page : 1/17 CONTENTS 1. GENERAL ……………… 2 1–1 Application 1–2 Deliberation Concerning Product Applications 1–3 Industrial
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PDF
sct2750ny-e.pdf
120 400 110 Ta= 25ºC Ta= 25ºC D=1.7A 350 VDD=800V ] 100 VGS= 18V/0V Eon J VGS= 18V/0V 90 R = 0Ω [ 300 R = 0Ω [ L=2mH E L=2mH : 80 : E on y g 250 r 70 e n 60 n 200 E E g 50 Eoff n h h 150 t 40 i w 30 w 100 S S Eoff 20 10 50 0 0 400 600 800 1000 1200 0 1 2 3 4 5 6 7 8 Drain - Source Voltage :DS [V] Drain
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AR0130_DS_D.pdf
fixed) 6pixelclocks =0.08μs P2 Frameendblanking 6(fixed) 6pixelclocks =0.08μs Q Horizontalblanking R0x300C-A 370pixelclocks =4.98μs A+Q(tROW) Line(Row)time R0x300C 1650pixelclocks =22.22μs V Verticalblanking ContextA:(R0x300A-(R0x3006-R0x3002+1))x(A+Q) 49,500pixelclocks ContextB:((R0x30AA-(R0x3090-R0x308C
in „Auswahl des richtigen dsp“ · Digitale Signalverarbeitung / DSP / Machine Learning ·
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PDF
BUZ71A.pdf
Source Breakdown Voltage BV DSS ID= 250µA, VGS = 0V 50 - - V Gate to Threshold Voltage VGS(TH) VGS = V DS DI = 1mA (Figure 9) 2.1 3 4 V o Zero Gate Voltage Drain Current IDSS TJ= 25 C, VDS = 50V, GS = 0V - 20 250 µA o TJ= 125 C, V DS = 50V, GS = 0V - 100 1000 µA Gate to Source Leakage Current IGSS VGS =
in „AVR + N-Mosfet Transistor“ · Analoge Elektronik und Schaltungstechnik ·
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PDF
MPLINK_TUTORIAL.pdf
nop nop decfsz LSB,1 goto dly1 decfsz MSB,1 goto dly1 return end 1998 Microchip Technology Inc. DS51185A-page 47 MPLINK Tutorial NOTES: DS51185A-page 48 1998 Microchip Technology Inc. Chapter 6. Sample Application 4 NOTES: 1998 Microchip Technology Inc. DS51185A-page 49 MPLINK Tutorial NOTES: DS51185A-page 50 1998 Microchip Technology Inc. Chapter 6. Sample Application 4 NOTES: 1998 Microchip Technology Inc. DS51185A-page 51 M W ORLDWIDE S ALES AND S ERVICE AMERICAS AMERICAS (continued)
in „Anfängerfrage zu Assembler“ · Mikrocontroller und Digitale Elektronik ·
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PDF
MBI5030.pdf
Meaning Port Error Status Code Off Iout, effect0 “0” - Iout, effect Iout, target and V out, effect V DS, Th “1” Open Circuit On I ＝ I and V ≧ V “0” Normal out, effect out, target out, effect DS, Th Note: the threshold voltage V DS, Th is aroundV knee + 0.2 Volt March 2006, V1.00 - 11 - MBI5030 16-channel
in „Atmega8+MBI5030+SPI“ · Mikrocontroller und Digitale Elektronik ·
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PDF
DS32kHz_-_temp-co_osci_1min_per_y.pdf
INFORMATION VBAT 5 10 TPIN DS32kHz/BGA 36-Pin BGA 0ºC to +70ºC NC 6 9 NC DS32kHz-N/BGA 36-Pin BGA -40ºc to +85ºC NC 7 8 NC DS32kHz/DIP 14-Pin DIP 0ºC to +70ºC DS32kHz-N/DIP 14-Pin DIP -40ºc to +85ºC DS32kHz 14-Pin DIP Module (300
in „RTC mit ATMega8“ · Mikrocontroller und Digitale Elektronik ·
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PDF
AON6500.pdf
Drain-Source Breakdown Voltage ID=250 A, V GSV 30 V V =30V, V =0V 1 IDSS Zero Gate Voltage Drain Current DS GS A T J55°C 5 IGSS Gate-Body leakage current V DS=0V, VGS ±20V 100 nA VGS(th) Gate Threshold Voltage V DS GS, D=250 A 1 1.4 2 V V =10V, I =20A 0.75 0.95 GS D m R DS(ON) Static Drain-Source On-Resistance
in „Unbekanntes Bauteil?“ · Analoge Elektronik und Schaltungstechnik ·
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PDF
stb6nk60z.pdf
Min. Typ. Max. Unit g (1) Forward transconductance V DS= 8 V, D= 3 A 5 S fs C pF iss Input capacitance 905 Coss Output capacitance V DS= 25 V, f = 1 MHz, pF V = 0 115 pF Crss Reverse transfer GS 25 capacitance Coss eq2.Equivalent output V = 0, V = 0 to 480 V 56 pF capacitance GS DS Qg Total gate charge V DD= 480 V,DI = 6 A, 33 46 nC Q gs Gate-source charge V GS= 10 V 6 nC Q Gate-drain charge 17 nC gd (see Figure 18) 1. Pulsed: pulse duration=300µs, duty cycle 1.5% 2. Coss eq. defined
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PDF
stb6nk60z.pdf
Min. Typ. Max. Unit g (1) Forward transconductance V DS= 8 V, D= 3 A 5 S fs C pF iss Input capacitance 905 Coss Output capacitance V DS= 25 V, f = 1 MHz, pF V = 0 115 pF Crss Reverse transfer GS 25 capacitance Coss eq2.Equivalent output V = 0, V = 0 to 480 V 56 pF capacitance GS DS Qg Total gate charge V DD= 480 V,DI = 6 A, 33 46 nC Q gs Gate-source charge V GS= 10 V 6 nC Q Gate-drain charge 17 nC gd (see Figure 18) 1. Pulsed: pulse duration=300µs, duty cycle 1.5% 2. Coss eq. defined
in „Unterschiedliche Power MOSFET kompatibel?“ · Analoge Elektronik und Schaltungstechnik ·
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PDF
IRFR2307Z.pdf
Reverse Transfer Capacitance ––– 150 ––– pF ƒ = 1.0MHz C oss Output Capacitance ––– 1070 ––– VGS= 0V, V DS= 1.0V, ƒ = 1.0MHz C oss Output Capacitance ––– 190 ––– VGS= 0V, V DS= 60V, ƒ = 1.0MHz C osseff. Effective Output Capacitance ––– 400 ––– VGS= 0V, VDS= 0V to 60Vf Source-Drain Ratings and Characteristics
in „MOSFET IRFR2307Z“ · Analoge Elektronik und Schaltungstechnik ·
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PDF
70599B.pdf
Analog-for-the-Digital Age, Application Maestro, CodeGuard, arising from this information and its use. Use of Microchip dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN, devices in life support and/or safety applications is entirely at ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial the buyer’s risk, and the buyer agrees
in „AVR32UC3B mit Funkmodul MRF24J40MB“ · Mikrocontroller und Digitale Elektronik ·
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PDF
chy100_family_datasheet.pdf
Glitch Filter Time CHANGE D- Pull-Down R DM(DWN) 14.25 19.53 24.5 kΩ Resistance Switch N1 R I = 200 µA 300 Ω On-Resistance DS(ON)N1 N1 Switch N2 On-Resistance R DS(ON)N2 IN2= 200 µA 300 Ω Switch N3 R I = 200 µA 300 Ω On-Resistance DS(ON)N3 N3 Switch N4 On-Resistance R DS(ON)N4 IN4 200 µA 300 Ω Switch N5 R I = 200 µA, V ≤ 3.6 V 20 40 Ω On-Resistance DS(ON)N5 N5 (D+) Data Line Capacitance C See Note A 1 nF DCP(PWR) NOTES: A. Guaranteed by design. Not tested in production. 4 Rev. E 08/18 www.power.com CHY100 SO-8 (D Package) 0.10 (0.004) C A-B 2X E 4.90
in „Handy mit "Falscher" Spannungshohe laden.“ · Analoge Elektronik und Schaltungstechnik ·
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PDF
TBD62783AFG_datasheet_en_20160511.pdf
thermal conditions during use. Features • 8 circuits built-in • High voltage : OUT = 50 V (MAX) P-DIP18-300-2.54-001 • High current : OUT = -500 mA (MAX for each channel) • Input voltage(output on): 2.0 V (MIN) TBD62783AFG • Input voltage(output off): 0.6 V (MAX) • Package : PG type P-DIP18-300-2.54-001 FG
in „Treiber Pendant zu ULN2803“ · Mikrocontroller und Digitale Elektronik ·
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PDF
A300_DS_DIAMEX-AVR_REF1.pdf
DIAMEX-AVR USB ISP-Programmer für ATMEL AVR, STK500, ATmega, ATtiny, AT90 USB ISP-Programmer für Atmel Prozessoren zum Discountpreis - Made in Germany - Wenn mal wieder der ISP-Programmer abgeraucht ist, weil das Gehäuse aus Kostengründen fehlte, die Datenübertragung so dahinschleicht oder der passive Parallelport-Progger nun doch zum alten Eisen geworfen wird, dann wird's Zeit für dieses tolle Teil. Äußerst preiswerter ISP-Programmer für ATMEL-Prozessoren, die über die einfache SPI-Schnittstelle programmierbar sind. Bemerkenswert ist der eigene onboard-Prozessor mit speziell entwickelter Firmware
in „Universeller RC5-Fernbedienungsempfänger“ · Mikrocontroller und Digitale Elektronik ·
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PDF
DS_L6205N.pdf
Figure 19. Normalized Typical Quiescent Figure 22. Normalized R DS(ON) vs.Junction Current vs. Switching Frequency Temperature (typical value) Iq / (Iq @ 1 kHz) R DS(ON) (DS(ON) 25 °C) 1.7 1.8 1.6 1.6 1.5 1.4 1.4 1.3 1.2 1.2 1.1 1.0 1.0 0.8 0.9 0 20 40 60 80 100 0 20 40 60 80 100 120 140 Tj [°C] fSW[kHz] Figure 20. TypicalLow-Side R DS(ON) vs.Supply Figure23.TypicalDrain-SourceDiodeForward ON Characteristic Voltage R [ ] I [A] DS(ON) SD 0.300 3.0 T = 25°C j 0.296 2.5 Tj= 25°C 0.292 2.0 0.288 1.5 0.284 1.0 0.280 0.5 0.276 0.0 700 800
in „1. Schaltung Mosfet Treiber“ · Analoge Elektronik und Schaltungstechnik ·
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PDF
L6203.pdf
TIMING Symbol Parameter Test Conditions Min. Typ. Max. Unit t1(Vi Source Current Turn-off Delay Fig. 12 300 ns t2(Vi Source Current Fall Time Fig. 12 200 ns t (V) Source Current Turn-on Delay Fig. 12 400 ns 3 i t4(Vi Source Current Rise Time Fig. 12 200 ns t5(Vi Sink Current Turn-off Delay Fig. 13 300 ns
in „Schrittmotorsteuerung verbessern“ · Mikrocontroller und Digitale Elektronik ·
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PDF
sia817edj_MOSFET_SCHOTTKY.pdf
GSS V DS = 0 V, GS = ± 12 V ± 10 µA V DS = - 30 V,GS = 0 V - 1 Zero Gate Voltage Drain Current DSS V = - 30 V, V = 0 V, T = 55 °C DS GS J - 10 On-State Drain Currenta ID(on) VDS 5 V, GS = - 10 V - 8 A V = -
in „Korrekte LIPO-Ladeschaltung?“ · Mikrocontroller und Digitale Elektronik ·
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PDF
cd00000089-1795323.pdf
TIMING Symbol Parameter Test Conditions Min. Typ. Max. Unit t1(Vi Source Current Turn-off Delay Fig. 12 300 ns t2(Vi Source Current Fall Time Fig. 12 200 ns t (V) Source Current Turn-on Delay Fig. 12 400 ns 3 i t4(Vi Source Current Rise Time Fig. 12 200 ns t5(Vi Sink Current Turn-off Delay Fig. 13 300 ns
in „[V] Motortreiber 2x L6203 Multivatt11 und 5x Siemens TLE4205“ · Markt ·
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PDF
cd00000089-1795323.pdf
TIMING Symbol Parameter Test Conditions Min. Typ. Max. Unit t1(Vi Source Current Turn-off Delay Fig. 12 300 ns t2(Vi Source Current Fall Time Fig. 12 200 ns t (V) Source Current Turn-on Delay Fig. 12 400 ns 3 i t4(Vi Source Current Rise Time Fig. 12 200 ns t5(Vi Sink Current Turn-off Delay Fig. 13 300 ns
in „[V] 2St. DMOS Full Bridge L6203 Multiwatt 11 Gehäuse“ · Markt ·
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PDF
TM1637_datasheet.pdf
SG7 g dp SG8 dp SG8 dp SG8 dp DS4 DS5 DS6 SG1 a DPY SG1 a DPY SG1 a DPY SG2 b a SG2 b a SG2 b a SG3 c f b SG3 c f b SG3 c f b SG4 d g GR4 SG4 d g GR5 SG4 d g GR6 SG5 e SG5 e SG5 e SG6 e d c SG6 e d c SG6 e d c SG7 f dp SG7 f dp SG7
in „7-Segmentanzeige an Atmega32“ · Mikrocontroller und Digitale Elektronik ·
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PDF
NTMFS4C09N.pdf
Charge Q 3.4 nC GS VGS = 4.5 V, DS = 15 V;DI = 30 A Gate−to−Drain Charge Q 5.4 GD Gate Plateau Voltage V 3.1 V GP Total Gate Charge Q V = 10 V, V = 15 V; I = 30 A 22.2 nC G(TOT) GS DS D SWITCHING CHARACTERISTICS (Note 7) Turn−On Delay Time t 10 d(ON) Rise Time t 32 r VGS = 4.5 V, DS = 15 V, Turn−Off Delay Time t ID = 15 A, G = 3.0 W 16 ns d(OFF) Fall Time t 6.0 f 6. Pulse Test: pulse width v 300 ms, duty cycle v 2%. 7. Switching characteristics are independent of operating junction
in „Kontrolle Eagle Schaltplan“ · Mikrocontroller und Digitale Elektronik ·
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PDF
drv8350f_7_.pdf
value of I was DRIVEN DRIVEN selected as 200-mA sink. 9.2.1.2.3 V Overcurrent Monitor Configuration DS The V monitors are configured based on the worst-case motor current and the R of the external DS DS(on) MOSFETs as shown in Equation 13. VDS_OCP ! max u R DS(on)max (13) 9.2.1.2.3.1DS Overcurrent Example The goal of this example is to set the V DS monitor to trip at a current greater than 75 A. According to the CSD19535KCS 100 V N-Channel NexFET ™ Power MOSFET data sheet, the R DS(on)value is 2.2 times higher at 175°C, and the maximum R DS(on)
in „BLDC-Motor: Überspannung beim Bremsen trotz Durchschaltung aller Low-Side-MOSFETs?“ · Analoge Elektronik und Schaltungstechnik ·
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PDF
2n3958.pdf
Symbol Test Conditions Min Typ a Max Unit Static Gate-Source Breakdown Voltage V(BR)GSS G = –1 mA, DS = 0 V –50 –57 V Gate-Source Cutoff Voltage VGS(off) VDS = 20 V,DI = 1 nA –1.0 –2 –4.5 Saturation Drain Current DSS VDS= 20 V, GS = 0 V 0.5 3 5 mA VGS = –30 V, DS= 0 V –10 –100 pA Gate Reverse Current
in „JFET prüfen mit transistortester“ · Analoge Elektronik und Schaltungstechnik ·
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PDF
2n3958.pdf
Symbol Test Conditions Min Typ a Max Unit Static Gate-Source Breakdown Voltage V(BR)GSS G = –1 mA, DS = 0 V –50 –57 V Gate-Source Cutoff Voltage VGS(off) VDS = 20 V,DI = 1 nA –1.0 –2 –4.5 Saturation Drain Current DSS VDS= 20 V, GS = 0 V 0.5 3 5 mA VGS = –30 V, DS= 0 V –10 –100 pA Gate Reverse Current
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Micrel.pdf
package. For applications with input voltage 6V or below, see MIC37xxx LDOs. Package Types MIC29150/300/500 MIC29151/301/501/751 3-Lead TO-220 (T) 5-Lead TO-220 Fixed Voltage (T) (Top View) (Top View) 5 FLG 3 OUT 4 OUT A 2 GND B T T 3 GND 1 IN 2 IN 1 EN 2016-2019 Microchip Technology Inc. DS20005685B-page
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BTS_100_High_Side.pdf
0, D = — 0.25 mA — 50 — — Gate threshold voltage V GS(th) V = V , I = — 1 mA — 2.5 — 3.0 — 3.5 GS DS D Zero gate voltage drain current I DSS A V = 0 V,V = — 50 V GS DS Tj= 25 °C — — 1 — 10 Tj= 150 °C — — 100 — 300 Gate-source leakage current I GSS VGS = — 20 V,V DS= 0 Tj= 25 °C — — 10 — 100 nA Tj= 150
in „Motorsteuerung mit kollektorschaltung“ · Mikrocontroller und Digitale Elektronik ·
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PDF
bts100.pdf
0, D = — 0.25 mA — 50 — — Gate threshold voltage V GS(th) V = V , I = — 1 mA — 2.5 — 3.0 — 3.5 GS DS D Zero gate voltage drain current I DSS A V = 0 V,V = — 50 V GS DS Tj= 25 °C — — 1 — 10 Tj= 150 °C — — 100 — 300 Gate-source leakage current I GSS VGS = — 20 V,V DS= 0 Tj= 25 °C — — 10 — 100 nA Tj= 150
in „BTS 100 Ersastzlösung“ · Mikrocontroller und Digitale Elektronik ·
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Fairchild_FDS9936A.pdf
Transistor General Description Features SO-8 N-Channel enhancement mode power field effect 5.5 A, 30 V. DS(ON) 0.040Ω @ V GS= 10 V, transistors are produced using Fairchild's proprietary, high R DS(ON) 0.060Ω @ V GS= 4.5 V. cell density, DMOS technology. This very high density process is especially tailored
in „CCFL-Inverter reparieren...“ · Analoge Elektronik und Schaltungstechnik ·
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UP6281B8.pdf
example, V CC= 12V, CC= 1mA, C ISS_U 2x1.5nF, COSS_U= T 40 2x0.1nF, VIN= 12V, CISS_L = 2x3nF, f OSC= 300kHz, the 30 o power dissipation is calculated as: 0 10 20c 30 40 50 60 70 PLOSS Copper Area (mm)2 =12V{1mA +[12V(3nF+ 6nF)+12V×0.2nF]300kHz} Figure 1.Therma. Resistance θJAs. CopperArea = 0.41W Take
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DS3502-3122456.pdf
and Industrial Controls Mechanical POT Replacement Ordering Information PART TEMP RANGE PIN-PACKAGE DS3502U+ -40°C to +100°C 10 μSOP Pin Configuration and Typical Operating Circuit appear at DS3502U+T&R -40°C to +100°C 10 μSOP end of data sheet. +Denotes a lead(Pb)-free/RoHS-compliant package. T&R = Tape
in „Anschluss des Potentiometers an den Microcontroller“ · Mikrocontroller und Digitale Elektronik ·