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PDF
LCD_64128A_LED.pdf
register to display data RAM 1 Data read(from display data RAM to output register) Reset System reset can be initialized by setting RSTB terminal at low level when turning power on, receiving instruction from MPU. When RSTB becomes low, following procedure is occurred. - Display off - Display start line register becone set by 0.(Z-address 0) While RSTB is low level, no instruction except status read can be accepted. Reset status appears at DB4. After DB4 is low, any instruction can be accepted. The Conditions of power supply at initial power up are shown in table 1. Displaytech Ltd LCD MODULE 64128A
in „Displaytech 64128 mit LPC2119 ansteuern“ · Mikrocontroller und Digitale Elektronik ·
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PDF
LCD64128A_DIS.pdf
register to display data RAM 1 Data read(from display data RAM to output register) Reset System reset can be initialized by setting RSTB terminal at low level when turning power on, receiving instruction from MPU. When RSTB becomes low, following procedure is occurred. - Display off - Display start line register becone set by 0.(Z-address 0) While RSTB is low level, no instruction except status read can be accepted. Reset status appears at DB4. After DB4 is low, any instruction can be accepted. The Conditions of power supply at initial power up are shown in table 1. Displaytech Ltd LCD MODULE 64128A
in „64x128 Pixel Display funktioniert nicht“ · Mikrocontroller und Digitale Elektronik ·
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PDF
MachXO2FamilyDataSheet.pdf
divider, thus allowing the PLL to generate different frequencies for each output. The output dividers can have a value from 1 to 128. The output dividers may also be cascaded together to generate low frequency clocks. The CLKOP, CLKOS, CLKOS2, and CLKOS3 outputs can all be used to drive the MachXO2 clock
in „Statemachine springt in falsche "states" warum?“ · FPGA, VHDL & Co. ·
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PDF
vs1001.pdf
can be selected to be either 512 or 1024 kHz. In slave mode, the DCLK signal is generated by an external circuit. The data (SDATAsignal) can be clockedin at either the rising or falling edge of the DCLK
in „VS1001k: SDI & SCI am SPI-Bus“ · Mikrocontroller und Digitale Elektronik ·
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PDF
swissbit-U500-USB3-Stick.pdf
with two flash channels. All U-500 modules use two flash channels for best performance. The U-500 can flexibly operate at 3.3V or 5V nominal with ±5% tolerance. It supports USB 3.1 Gen 1 SuperSpeed and is fully backwards compatible to USB 2.0/1.1 High/Full Speed. Figure 1: Functional Block Diagram Swissbit
in „[S] USB Stick für Produktdoku - weniger Speicher, mehr Zuverlässigkeit“ · Markt ·
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PDF
db_atmega8.pdf
than the current value of TCNT1. The result will then be that the counter will miss the Compare Match at the TOP value. The counter will then have to count to the MAX value (0xFFFF) and wrap around start- 90 ATmega8(L) 2486P–AVR–02/06 ATmega8(L) ing at 0x0000 before the Compare Match can occur. The OCR1A
in „ADC-Input und Auswahlverfahren“ · Mikrocontroller und Digitale Elektronik ·
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PDF
BF1009S_Appnote__INF.pdf
the crystal frequency divided by 6 (10.25 MHz) is available at a pin as low pass filtered voltage, it can be disabled with the serial bus. 8. Output ports PORT_1 / 2 are NMOS Open drain outputs. 9. I²C Bus The TUA 4401K supports the I²C bus protocol (2 wire). All
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PDF
KS0713.pdf
from the microprocessor correspond to the LCD common lines as shown in Figure 6. The microprocessor can read from and write to RAM through the I/O buffer. Since the LCD controller operates independently, data can be written into RAM at the same time as data is being displayed without causing the LCD flicker
in „Dbox LCD HT12538“ · Mikrocontroller und Digitale Elektronik ·
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PDF
nft7175_en.pdf
specifications Reading width 80 mm Dimensions I-type : (l x w x h) 55 x 47 x 20 mm, Min. Resolution at PCS 0.9 0.2 mm (0.15mm at 60 mm reading length) L-type : (l x w x h) 52 x 55 x 20 mm Min. PCS value 0.45 Case material sheet metal Weight body 100 g (excl. cable) Depth of field approx. 30 - 42 mm (approx
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PDF
8742.pdf
Timer Other Microprocessor Families and Clock in a Single Package Y Expandable I/O Y 2048 x 8 EPROM, 128 x 8RAM, 8-Bit Y RAM Power-Down Capability Timer/Counter, 18 Programmable I/O Y Over 90 Instructions: 70% Single Byte Pins Y Y One 8-Bit Status and Two Data Available in EXPRESS — Standard Temperature
in „Code auslesen mit Verify?“ · Mikrocontroller und Digitale Elektronik ·
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PDF
Dot-Matrix-Driver_max6952eax.pdf
ranging between 0101 RAM05 RAM21 1MHz and 8MHz to drive OSC. The OSC inputs of multi- ple MAX6952s can be tied together to a common exter- nal clock to make the devices blink at the same rate. 0110 RAM06 RAM22 The relative blink phasing of multiple MAX6952s can be synchronized by setting the T bit in
in „PIC: max6952 ansteuerung über SPI“ · Mikrocontroller und Digitale Elektronik ·
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PDF
drv8825.pdf
323 117 59 30 83% –56% 326 118 86% –51% 329 119 60 88% –47% 332 120 90% –43% 335 121 61 31 16 92% –38% 338 122 94% –34% 340 123 62 96% –29% 343 124 97% –24% 346 125 63 32 98% –20% 349 126 99% –15% 352 127 64 100% –10% 354 128 100% –5% 357 16 Submit Documentation Feedback
in „Suche passenden Treiber für Stepper.“ · Mikrocontroller und Digitale Elektronik ·
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Datei
iic_rx_solo.c
hpinfotech.com Project : Version : Date : 18.06.2007 Author : F4CG Company : F4CG Comments: Chip type : AT90CAN128 Program type : Application Clock frequency : 16,000000 MHz Memory model : Small External SRAM size : 0 Data Stack size : 1024 *****************************************************/ #include <90can128.h> #include <lcd.h> #include <delay.h> #define TWINT 7 // Declare your global variables here unsigned char iic_data; // General init function void init(void) { // Crystal Oscillator division factor
in „I²C (TWI) CodeVison - Problem bei Pinbelegung“ · Mikrocontroller und Digitale Elektronik ·
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PDF
TMC4671-LA_datasheet.pdf
at the next Hall state change. After disabling of the module, the process can be started again. This function can also be used as a rough plausibility check during longer operation. 4.6.10.3 Encoder Initialization
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PDF
Powermeter.pdf
61036 standard. OFFSET Constant offset, which is added to all measurement results. Improves linearity at low amplitudes, if properly scaled. Should be around ½ LSB x 255 = 128. NMAX This is the number of samples to accumulate during each calculation cycle. Large values create more stable results but at
in „230V Leistung erfassen mit ATmega128“ · Mikrocontroller und Digitale Elektronik ·
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PDF
volt230.pdf
61036 standard. OFFSET Constant offset, which is added to all measurement results. Improves linearity at low amplitudes, if properly scaled. Should be around ½ LSB x 255 = 128. NMAX This is the number of samples to accumulate during each calculation cycle. Large values create more stable results but at
in „Netzteil ohne Trafo“ · Mikrocontroller und Digitale Elektronik ·
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PDF
energymeter.pdf
61036 standard. OFFSET Constant offset, which is added to all measurement results. Improves linearity at low amplitudes, if properly scaled. Should be around ½ LSB x 255 = 128. NMAX This is the number of samples to accumulate during each calculation cycle. Large values create more stable results but at
in „Leistungsmessung über Shunt?“ · Analoge Elektronik und Schaltungstechnik ·
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PDF
doc2566.pdf
61036 standard. OFFSET Constant offset, which is added to all measurement results. Improves linearity at low amplitudes, if properly scaled. Should be around ½ LSB x 255 = 128. NMAX This is the number of samples to accumulate during each calculation cycle. Large values create more stable results but at
in „Cadsoft Eagle“ · Platinen ·
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PDF
c8051f32x.pdf
In addition to direct access to data memory organized as bytes, the sixteen data memory locations at 0x20 through 0x2F are also accessible as 128 individually addressable bits. Each bit has a bit address from 0x00 to 0x7F. Bit 0 of the byte at 0x20 has bit address 0x00 while bit7 of the byte at 0x20
in „Drehwinkelmessung“ · Mikrocontroller und Digitale Elektronik ·
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PDF
fahlman91cascadecorrelation.pdf
outputweightwillbe positive. Since a unit’s weights to different outputs may be of mixed sign, a unit can sometimes serve two purposes by developinga positivecorrelation with the error at one output and a negative correlation with the error at another. Instead of a single candidate unit, it is possible
in „Fehlenden Signalabschnitt rekonstruieren“ · Digitale Signalverarbeitung / DSP / Machine Learning ·
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PDF
CM-BF537E_HardwareUserManual_V1.pdf
°-70°C) Standard Mount 32 MB SDRAM o SDRAM Clock up to 133MHz o MT48LC16M16A2BG-7 (16Mx16, 256Mbit at 3.3 V) 4 MB of Addressable Flash o ITLRC28F320J3C110 (2Mx16 32Mbit at 3.3 V; all 4 MByte addressable) o Additional flash memory can be connected through the expansion board as parallel flash using asynchronous
in „SDHC Karte Einbindung“ · Mikrocontroller und Digitale Elektronik ·
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PDF
W78E051C40DL_4170039.pdf
The power-down mode stops the crystal oscillator for minimum power consumption. The external clock can be stopped at any time and in any state without affecting the processor. 2. FEATURES • Fully static design 8-bit CMOS microcontroller • Wide supply voltage of 4.5V to 5.5V • 128 bytes of on-chip scratchpad
in „Winbond W78E051 programmieren - kennt ihr compiler? woher ISP?“ · Mikrocontroller und Digitale Elektronik ·
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PDF
RF-24G_datasheet.pdf
current two channels 250kbps 23 mA IVCC Supply current two channels 1000kbps 25 mA RX SENS Sensitivity at 0.1%BER (@250kbps) -90 dBm RX SENS Sensitivity at 0.1%BER (@1000kbps) -80 dBm 3 Laipac Technology Inc. www.laipac.com Phone +1-905-7621228 Fax +1-905-7631737 C/ICO C/I Co-channel 6 dB C/I1ST 1sAdjacent
in „[V] Grafik-LCDs, Pictiva-LCDs, TRW-24G Funkmodule“ · Markt ·
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Datei
lcd.h
30 19:51:33 peter Exp $ Software: AVR-GCC 3.3 Hardware: any AVR device, memory mapped mode only for AT90S4414/8515/Mega ***************************************************************************/ /** @defgroup pfleury_lcd LCD library @code #include <lcd.h> @endcode @brief Basic routines for interfacing
in „DCF auf INT0“ · Mikrocontroller und Digitale Elektronik ·
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Datei
mw_lcd.h
30 19:51:33 peter Exp $ Software: AVR-GCC 3.3 Hardware: any AVR device, memory mapped mode only for AT90S4414/8515/Mega ***************************************************************************/ /** @defgroup pfleury_lcd LCD library @code #include <lcd.h> @endcode @brief Basic routines for interfacing
in „DCF auf INT0“ · Mikrocontroller und Digitale Elektronik ·
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PDF
H83003H.PDF
control register (PCR) for switching input pull-up transistors on and off. Ports 4, 5, 6, 8, and C can drive one TTL load and a 90-pF capacitive load. Ports 9, A, and B can drive one TTL load and a 30-pF capacitive load. Ports 4 to 6 and 8 to C can drive a Darlington pair. Ports 5 and B can drive LEDs
in „H8/300 Frage (genauer H8/3003)“ · Mikrocontroller und Digitale Elektronik ·
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PDF
GD32F103xx_Datasheet_V2.5.pdf
Up to 96 Kbytes of SRAM The ARM ® Cortex -M3 processor is structured in Harvard architecture which can use separate buses to fetch instructions and load/store data. 3072 Kbytes of inner Flash and 96 Kbytes of inner SRAM at most is available for storing programs and data, both accessed (R/W) at CPU clock
in „Unterschiede CS32F103C8T6 und STM32F103C8T6“ · Mikrocontroller und Digitale Elektronik ·
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PDF
msp430g2452.pdf
a system reset is generated. If the watchdog function is not needed in an application, the module can be disabled or configured as an interval timer and can generate interrupts at selected time intervals. Copyright © 2010–2013, Texas Instruments Incorporated Submit Documentation Feedback 13 MSP430G2x52
in „MSP430 Gleitkommazahl in Flash speichern“ · Mikrocontroller und Digitale Elektronik ·
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PDF
littelfuse-PTC-Rline-Catalog.pdf
from low resistance to high resistance in 20°C still air.B B V : Maximum continuous voltage device can withstand without damage at rated current. B B IMA : Maximum fault current device can withstand without damage at rated voltage. MAX PD : Power dissipated from device when in the tripped state in 20
in „Batteriehalter mit unbekannten Bauteil“ · Analoge Elektronik und Schaltungstechnik ·
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PDF
xc164cm_ds_v1.4_2007_03.pdf
Derivative Synopsis Derivative) Temp. Program On-Chip RAM Interfaces Range Memory SAK-XC164CM-16F40F -40 to 128 Kbytes 2 Kbytes DPRAM, ASC0, ASC1, SAK-XC164CM-16F20F 125 °C Flash 4 Kbytes DSRAM, SSC0, SSC1, 2 Kbytes PSRAM CAN0, CAN1 SAF-XC164CM-16F40F -40 to 128 Kbytes 2 Kbytes DPRAM, ASC0, ASC1, SAF-XC164CM-
in „xc164cm16ff und cc770“ · Mikrocontroller und Digitale Elektronik ·
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PDF
tlv320aic12k.pdf
3, the default being 128. Oversampling ratio of 512 can be used when FS is a maximum of 8 Ksps and an oversampling ratio of 256 can be used when FS is a maximum of a 16 Ksps. M should be a multiple of 2 for an oversampling
in „PHILIPS VP5500 VoIP Telefon bei Pollin“ · Mikrocontroller und Digitale Elektronik ·
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PDF
datasheet.pdf
to 95 39 15.54 96 to 127 42 11 128 to 159 45 7.79 160 to 191 48 5.51 192 to 223 51 3.9 224 to 255 (*) control of the transmit gain by AT commands (for WISMO Quik Q24x6 Series driven by AT commands) confidential ' Page : 28 / 81 This
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PDF
cp2102n-datasheet.pdf
UART device to stop sending data. The CP2102N does not pull RTS low again until the UART RX FIFO is at the FLOW ON watermark level of 384 bytes (at least 128 free bytes). This hysteresis allows for optimal operation. These RTS watermark levels are configurable using Xpress Configurator in Simplic- ity
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PDF
cp2102n-datasheet.pdf
UART device to stop sending data. The CP2102N does not pull RTS low again until the UART RX FIFO is at the FLOW ON watermark level of 384 bytes (at least 128 free bytes). This hysteresis allows for optimal operation. These RTS watermark levels are configurable using Xpress Configurator in Simplic- ity
in „[V] 10 St. Silabs CP2102N-A01 QFN20 USB-to-UART bridge controller.“ · Markt ·
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PDF
cp2102n-datasheet.pdf
UART device to stop sending data. The CP2102N does not pull RTS low again until the UART RX FIFO is at the FLOW ON watermark level of 384 bytes (at least 128 free bytes). This hysteresis allows for optimal operation. These RTS watermark levels are configurable using Xpress Configurator in Simplic- ity
in „[V] 10 St. Silabs CP2102N-A01 QFN20 USB-to-UART bridge controller. (10€)“ · Markt ·
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PDF
cp2102n-datasheet.pdf
UART device to stop sending data. The CP2102N does not pull RTS low again until the UART RX FIFO is at the FLOW ON watermark level of 384 bytes (at least 128 free bytes). This hysteresis allows for optimal operation. These RTS watermark levels are configurable using Xpress Configurator in Simplic- ity
in „[V] 15St. Silabs CP2102N-A01 QFN20 USB-to-UART bridge controller.“ · Markt ·
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PDF
cp2102n-datasheet.pdf
UART device to stop sending data. The CP2102N does not pull RTS low again until the UART RX FIFO is at the FLOW ON watermark level of 384 bytes (at least 128 free bytes). This hysteresis allows for optimal operation. These RTS watermark levels are configurable using Xpress Configurator in Simplic- ity
in „Frage zu CP2102N und CP2104“ · Mikrocontroller und Digitale Elektronik ·
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PDF
atmega2560_2561.pdf
illustrates, changing the TOP actively while the Timer/Counter is running in the phase correct mode can result in an unsymmetrical output. The reason for this can be found in the time of update of the OCRnx Register. Since the OCRnx update occurs at TOP, the PWM period starts and ends at TOP. This implies
in „Ethernet Buchse“ · Mikrocontroller und Digitale Elektronik ·
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PDF
PIC_Applikationen.PDF
, you must use the ADC’s RC oscillator. The tradeoff in using the RC oscillator is that its period can vary from 2 to 6µs, depending on temperature and manufacturing tolerances. Interrupt Enable. The ADC is relatively slow—at 20 MHz the PIC can execute 100 instructions in the 20µs the ADC takes to make
in „MATRIX-Tastatur“ · Mikrocontroller und Digitale Elektronik ·
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PDF
GLCD.pdf
SERIES Version : 1.1 P 2 of 30 n PHYSICAL DATA Item Contents Unit LCD type STN / FSTN --- LCD duty 1/128 --- LCD bias 1/12 --- Viewing direction 6 / 12 o’clock Module size (W×H×T) 144 (156.3 CCFL) × 104 × 11 MAX (14 MAX W/LED mm BACKLIGHT) Viewing area (W×H) 114 × 64 mm Number of dots 240 × 128 dots Dot
in „Problem mit IC6963“ · Mikrocontroller und Digitale Elektronik ·
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PDF
ths0842.pdf
80 MHz, C =I5 pF, R SW = 200 : R t 1 ∉ 2f ǒ C In(256) –R ƫ S CLK I SW So, for applications running at a lower CLK , the total source resistance can increase proportionally. The analog input of the THS0842 is a differential input that can be configured in various ways depending on the signal source and
in „ADC - Wie schnell aktualisiert der? Ist ein Oszi möglich?“ · Mikrocontroller und Digitale Elektronik ·
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PDF
lm35.pdf
package and a plastic TO-220 package. (1) Device Information PART NUMBER PACKAGE BODY SIZE (NOM) TO-CAN (3) 4.699 mm × 4.699 mm TO-92 (3) 4.30 mm × 4.30 mm LM35 SOIC (8) 4.90 mm × 3.91 mm TO-220 (3) 14.986 mm × 10.16 mm (1) For all available packages, see the orderable addendum at the end of the datasheet
in „Signalkonverter Ladegerät“ · Analoge Elektronik und Schaltungstechnik ·
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PDF
lm35.pdf
package and a plastic TO-220 package. (1) Device Information PART NUMBER PACKAGE BODY SIZE (NOM) TO-CAN (3) 4.699 mm × 4.699 mm TO-92 (3) 4.30 mm × 4.30 mm LM35 SOIC (8) 4.90 mm × 3.91 mm TO-220 (3) 14.986 mm × 10.16 mm (1) For all available packages, see the orderable addendum at the end of the datasheet
in „Linearisierung NTC und Anpasssung“ · Analoge Elektronik und Schaltungstechnik ·
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PDF
RT8298E-02.pdf
Operation Oscillator(OSC) The RT8298E is a synchronous high voltage Buck The internal oscillator runs at nominal frequency 600kHz Converter that can support the input voltage range from andcanbesynchronizedbyanexternalclockintherange 4.5V to 24V and the output current can be up to 6A. The between 300kHz
in „Schaltregler - maximaler Spulenstrom“ · Analoge Elektronik und Schaltungstechnik ·
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PDF
RT8298E-02.pdf
Operation Oscillator(OSC) The RT8298E is a synchronous high voltage Buck The internal oscillator runs at nominal frequency 600kHz Converter that can support the input voltage range from andcanbesynchronizedbyanexternalclockintherange 4.5V to 24V and the output current can be up to 6A. The between 300kHz
in „Wahl des SynchrongleichrichterMOSFETs für Buck Converter“ · Analoge Elektronik und Schaltungstechnik ·
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PDF
RT8298E-02.pdf
Operation Oscillator(OSC) The RT8298E is a synchronous high voltage Buck The internal oscillator runs at nominal frequency 600kHz Converter that can support the input voltage range from andcanbesynchronizedbyanexternalclockintherange 4.5V to 24V and the output current can be up to 6A. The between 300kHz
in „Woher Eingangsschwingung am Buck“ · Analoge Elektronik und Schaltungstechnik ·
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PDF
AD8610_8620.pdf
unity gain; much larger capacitive industrial temperature range (−40°C to +125°C). The AD8610 loads can be driven easily at higher noise gains.TheAD8610/ isavailableinthenarrow8-leadSOICandthetiny8-leadMSOP AD8620 swing to within 1.2 V of the supplies even with a 1 kΩ surface-mount packages. The AD8620
in „Regelbare Stromqulle verstehen“ · Analoge Elektronik und Schaltungstechnik ·
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PDF
T100_Scaler.pdf
2.1 I2C Command Protocol Before your tester writes IC commands to T100, slave address must be set at 50h. The timing sequence can be shown as below. After 4 cycles, the tester can get started IIC commands. SDA(A3) can affect slave address. Set low for 40h. Set high for 50h. 2 Cycles 2 Cycles XTALI RSTB
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PDF
ads5240.pdf
denoted by ADCLK P and • Simultaneous Sample-and-Hold ADCLK . The word output of each ADC channel can N • 70.5dBFS SNR at 10MHz IF be transmitted either as MSB or LSB first. The bit coinciding with the rising edge of the 1x clock output • Internal and External References is the first bit of the word
in „Pipeline A/D-Wandler ADS5240 Verständnisproblem Analoge Eingangsspannung“ · Analoge Elektronik und Schaltungstechnik ·
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PDF
DSO-1062D_User_Manual_Ver0.pdf
the FFT spectrum horizontally to 250 points, but you can use the FFT Zoom function to expand the FFT spectrum so that you can clearly view the frequency components at each of the 1024 data points in the FFT spectrum. Note: The oscilloscope’s vertical response
in „Voltcraft DSO-1062D“ · Mikrocontroller und Digitale Elektronik ·