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PDF
16F648a_40044F.pdf
register It should also be taken in account that under worst case conditions (VDD = Min., Temperature = Max., max. ;into W, sets bank to original WDT prescaler) it may take several seconds before a ;state WDT time out occurs. MOVWF STATUS ;move W into STATUS ;register SWAPF W_TEMP,F ;swap W_TEMP SWAPF W_TEMP
in „16f627A schaltet RA5 u RA6 nicht“ · Mikrocontroller und Digitale Elektronik ·
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Datei
STM32_Init.c
Function push-pull (max speed 2MHz) // <14=>Alternate Function open-drain (max speed 2MHz) // <11=>Alternate Function push-pull (max speed 50MHz) // <15=>Alternate Function open-drain (max speed 50MHz) // <o2.8..11> Pin 2
in „ARM STM32 Eingänge werden nicht erkannt“ · Mikrocontroller und Digitale Elektronik ·
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Datei
STM32_Init.c
Function push-pull (max speed 2MHz) // <14=>Alternate Function open-drain (max speed 2MHz) // <11=>Alternate Function push-pull (max speed 50MHz) // <15=>Alternate Function open-drain (max speed 50MHz) // <o2.8..11> Pin 2
in „ARM STM32 Eingänge werden nicht erkannt“ · Mikrocontroller und Digitale Elektronik ·
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Datei
STM32_Init.c
Function push-pull (max speed 2MHz) // <14=>Alternate Function open-drain (max speed 2MHz) // <11=>Alternate Function push-pull (max speed 50MHz) // <15=>Alternate Function open-drain (max speed 50MHz) // <o2.8..11> Pin 2
in „Frage zu ST-Mikrocontrollern mit eMios“ · Mikrocontroller und Digitale Elektronik ·
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PDF
TMC5072_datasheet.pdf
and DIR interface timing AC-Characteristics clock period is tCLK Parameter Symbol Conditions Min Typ Max Unit step frequency (at maximum STEP dedge=0 ½ f CLK microstep resolution) dedge=1 ¼ f CLK fullstep frequency f f /512 FS CLK STEP input low time *) tSL max(FILTSD ns tCLK0) STEP input high time *)
in „TMC5072 SPI Ansteuerung“ · Mikrocontroller und Digitale Elektronik ·
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PDF
ds-mb86r01-jade-rev1-4.pdf
Max. resolution is 1024 × 768 Max. 6 layered display Max. 2 screen output • Digital video capture function BT.601, BT.656, and RGB666 Max. 2 inputs • Geometry engine (MB86296 compatible display list is
in „Bild im Bild in der Instumententafel Range Rover“ · Mikrocontroller und Digitale Elektronik ·
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PDF
MS-17631_2.0.pdf
▯ } I ( ▯ 2 › 2 LED Driver IC ▯ D O ▯ î C ▯ +12V_FAN LED Forward Voltage E 2 2 1 1 SDICS ▯ +15V R_Max 2.4V x 4 pcs = 9.6V L L L L SDI_CLKL ) For EMI ▯ 3 3 3 2 2 2 1 1 1 G_Max 3.3V x 4 pcs = 13.2V C227 C100p50N0402 LED1_G L L L L L L L L L Pin Definerd 6 5 4 3 2 1 O ▯ C567 C100p50N04N2 LED1_R B_Max 3.3V
in „In Circuit Programmierer für 8-pin 150mil SOIC PM25LD512“ · Mikrocontroller und Digitale Elektronik ·
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PDF
ADIS16250_16255.pdf
/sec, ±1 g, ±320°/sec range setting, unless otherwise noted. Table 1. Parameter Conditions Min Typ Max Unit 1 SENSITIVITY Clockwise rotation is positive output 25°C, dynamic range = ±320°/sec 2 0.07326 °/sec/LSB 25°C, dynamic range = ±160°/sec 0.03663 °/sec/LSB 25°C, dynamic range = ±80°/sec 0.01832
in „Bias bei Gyro“ · Mikrocontroller und Digitale Elektronik ·
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PDF
Triac_Control.pdf
the 50 Hz mains cycle. Figure 2-3: Basic Timing Relationships Tr Mains Tr / 2 Voltage Ti T1 T1 Ti max 8 mS 10 mS 20 mS Time Remarks: 1. Tr is the Full Mains cycle time. (Based on 50 Hz) 2. Tr / 2 is the Half cycle time. (Based on 50 Hz) 3. T1 is the Phase angle delay 4. Ti max is the maximum Phase Angle delay (Ti max is used to avoid re-triggering the Triac in the next half cycle.) 5. Ti is the Triac Gate trigger pulse period Application Note U16498EE1V1AN00 17 Chapter 2 Triac Control 2.2 Triac Triggering Basics
in „Triac ansteuern ohne Moc“ · Analoge Elektronik und Schaltungstechnik ·
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PDF
dmf5120.pdf
Inductance DCR Rated Current Dia. (a) Width (b) Lead Pitch (d) Lead Ø Range (µH) (mOhms) (Amps) mm Max. mm Max. mm Nominal Nominal DM__-1 1.1 - 1500 3 - 1320 10.0 - 0.5 16 10 8.0±1.0 Available in Open, DM__-2 0.9 - 1500 5 - 750 10.7 - 0.9 21 11 8.5±1.5 DM__-3 Clip & Base Mount 1.2 - 1500 4 - 410 10.1
in „Datenblätter gesucht“ · Mikrocontroller und Digitale Elektronik ·
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PDF
datasheet.pdf
Output Voltage RLS 4 M7 V = 451 VDC R LS 4 M7 DC OV DC R OVP Sense Output Voltage VR OVP Input Input DC MAX @ 100 VDC = 76% Voltage DC MAX @ 100 VDC = 76% Voltage DC @ 375 VDC = 41% DC @ 375 VDC = 41% MAX D V MAX D V Reset 10 k7 CONTROL CONTROL Q C C R ROVP >3k7 S S - - PI-4756-121007 PI-4719-120307 Figure
in „Verzweifelt: Wie Widerstände und Kapazitäten eines Sperrwandler IC´s auslegen?“ · Analoge Elektronik und Schaltungstechnik ·
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PDF
Pcm4823.pdf
SVGA/LCD display controller (LCD, EL and CRT displays) allows LCD screen resolutions up to 1024 x 768 and CRT resolutions up to 1280 x 1024 @ 16 colors (PCM-4823 only). The PCM-4823/4823L complies with the "Green Function" standard and supports three types of power saving features: Normal, Doze, and
in „Hitachi SP10Q003 // SP10Q005 ansteuern“ · Mikrocontroller und Digitale Elektronik ·
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PDF
Pcm4823.pdf
SVGA/LCD display controller (LCD, EL and CRT displays) allows LCD screen resolutions up to 1024 x 768 and CRT resolutions up to 1280 x 1024 @ 16 colors (PCM-4823 only). The PCM-4823/4823L complies with the "Green Function" standard and supports three types of power saving features: Normal, Doze, and
in „Astec LPT42 Schaltnetzteil“ · Mikrocontroller und Digitale Elektronik ·
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Artikel
Word Clock Variante 1
nicht-invertierte Open-Collector-Ausgang Pin 3 als Signal an die WordClock angeschlossen werden. Ein Max232 der zur Kontrolle angeschlossen ist, kann den DCF Empfang stören. Ohne Max232 verbessert sich der Empfang deutlich. Da einige berichtet haben, dass der DCF-Empfang bei den Reichelt-Modulen oftmals
pwm.c wird pwm_idx innerhalb pwm_set_brightness_step() falsch normiert: [gefixt - V0.10] pwm_idx % MAX_PWM_STEPS; ersetzen durch: else if (pwm_idx >= MAX_PWM_STEPS ) pwm_idx = MAX_PWM_STEPS - 1; BUG08_003 - [bestätigt] [gefixt - V0.9] OUT23 wird immer mit OUTL1 geschalten BUG08_004 - [bestätigt] [gefixt
Artikel ·
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PDF
7.5inch-e-paper-specification.pdf
±0.20 . 4 0 0 ± 77.80±0.20 79.90±0.20 0.255 ( i . u ±l t 5 0 a ( .) t a ( . x 3) c 1 t 3) t 2 e 1.5max m v 5 x FPL GLASS RTV IC 1,Unlabeledtolerances:±0.15 EPD thickness drawing) 2,Resolution:640*384 3,DPI: 100 7 Waveshare Electronics CO., LTD. 5 n APPROVALS DATE File Serial Number: Version Number: c
in „7.5" Waveshare E-Parper ansteuern“ · Mikrocontroller und Digitale Elektronik ·
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PDF
c01609323.pdf
Microtower Small Form Factor PCI slots 2 Full Length 5V 32 bit PCI slots 2 LP 5V 32 bit PCI slots Max power per slot 25W 25W PCIe x1 slot 1 1 Max power per slot 10W 10W PCIe X16 slot 1 Full Height card 1 LP profile card Max power per slot 75W 25W External Bays 3.5" 1 1 5.25" 2 1 IDE Internal 3.5" HDD
in „PC bootet nicht nach cpu Tausch“ · PC Hard- und Software ·
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PDF
c01609323.pdf
Microtower Small Form Factor PCI slots 2 Full Length 5V 32 bit PCI slots 2 LP 5V 32 bit PCI slots Max power per slot 25W 25W PCIe x1 slot 1 1 Max power per slot 10W 10W PCIe X16 slot 1 Full Height card 1 LP profile card Max power per slot 75W 25W External Bays 3.5" 1 1 5.25" 2 1 IDE Internal 3.5" HDD
in „PC bootet nicht nach cpu Tausch“ · PC Hard- und Software ·
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PDF
170-04833-0-MB90549GPF.pdf
voltage VO V SS 0.3 V SS+ 6.0 V *2 Clamp Current ICLAMP 2.0 2.0 mA Max. overall Clamp Current ICLAMP 20.0 20.0 mA “L” level max. output current IL 15 mA *3 “L” level avg. output current OLAV 4 mA *4 “L” level max. overall output current IOL 100 mA “L” level avg. overall
in „16Bit PIC von Fujitsu .. hat jemand Informationen?“ · Mikrocontroller und Digitale Elektronik ·
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Datei
DDS.vhd
= DIN_CNT_MAX-1) then ROMADDR <= ADDRESS; -- clocked address --> BRAM end if; end if; end process; -- 1 clock cycle latency caused by BROM process begin wait until rising_edge(CLK); if BCK = '1' then if (DIN_CNT = DIN_CNT_MAX-1) then SIGN <= ACCUM(ACCUM'left); end if; end if; end process; QUADRANT <= ACCUM(ACCUM'left-1); RESULT <= signed(sine_LUT(ROMADDR)); ADDRESS <= to_integer(ACCUM(ACCUM'high-2 downto ACCUM'high-11))
in „DDFS von Lothar Miller ich steh aufm Schlauch“ · FPGA, VHDL & Co. ·
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Thread
Model in LTspice
D G S Bulk LM3414Q1 .MODEL LM3414Q1 NMOS Level=1 CBD=26.5p CBS=31.8p CGBO=142n + CGDO=640n CGSO=768n GAMMA=1.59 IS=250f KP=0.968 + LAMBDA=0.116 MJ=0.460 PB=0.800 PHI=.75 RD=0.108 RS=0.108 + VTO=2 .ENDS *$ .SUBCKT NMOS_1 D G S B PARAMS: L=1U W=1U M1 D G S B DMOS L=1U W=1U .MODEL DMOS NMOS
VTO=2 KP=107 lambda=0.01 .ENDS *$ .SUBCKT D_IDEAL A C PARAMS: RS = 1 VTH = 0.7 G1 A C VALUE { MAX(0, ( V(A) - V(C) - { VTH }) / { RS } ) } R1 A C 1G *.ENDS D_IDEAL *$ .model DIODE01 D + IS = 1E-15 + N = 1 + TT = 1E-11 + RS = 0.5 + CJO = 1E-10 + XTI = 0.0 *
Analoge Elektronik und Schaltungstechnik ·oko · ·4 Antworten
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PDF
PC16550D.pdf
toa 70§C, VDD e a 5V g 10%, VSS e 0V, unless otherwise specified. Symbol Parameter Conditions Min Max Units V Clock Input Low Voltage b 0.5 0.8 V ILX VIHX Clock Input High Voltage 2.0 VDD V VIL Input Low Voltage b 0.5 0.8 V VIH Input High Voltage 2.0 VDD V VOL Output Low Voltage IOL e 1.6 mA on all
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Datei
datei-dmesg.txt
device (0005 -> 0007) [ 0.573199] scsi0 : ata_piix [ 0.573536] scsi1 : ata_piix [ 0.573607] ata1: PATA max UDMA/100 cmd 0x1f0 ctl 0x3f6 bmdma 0x1860 irq 14 [ 0.573611] ata2: PATA max UDMA/100 cmd 0x170 ctl 0x376 bmdma 0x1868 irq 15 [ 0.574328] libphy: Fixed MDIO Bus: probed [ 0.574560] tun: Universal TUN/TAP device driver, 1.6 [ 0.574562] tun: (C) 1999-2004 Max Krasnyansky <maxk@qualcomm.com> [ 0.574786] PPP generic driver version 2.4.2 [ 0.574982] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver [ 0.575023] ehci-pci: EHCI PCI platform driver [ 0.575349
in „Limux:: Netzwerk und WLAN futsch.“ · PC Hard- und Software ·
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Datei
speedo.c
MODE_DRAG, MODE_CAL, MODE_TEST, MODE_TEST2, MODE_TEST3 } mainmode; #define MODE_DEFAULT MODE_SPD // max eeprom space: 256 bytes #define eeprom_calib_factor_kph_lo 0 #define eeprom_calib_factor_kph_hi 1 #define eeprom_calib_factor_mph_lo 2 #define eeprom_calib_factor_mph_hi 3 #define eeprom_pulses_in_qtrmile_lo
in „Digital Speedo mit PIC 16F876“ · Mikrocontroller und Digitale Elektronik ·
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PDF
User_s_Manual_of_ET-STM32F103.pdf
with 1.25 DMIPS/MHz speed that is equal to 90 MIPS 4.Has RTC (Real Time Clock) Circuit with XTAL 32.768KHz and Battery Backup 5.Support In-System Programming (ISP) and In- Application Programming (IAP) through ON-Chip Boot- Loader via Port USART-1 (RS232) 6.Has circuit to connect with standard 20 PIN
in „SPI mit SD Karte antwortet nicht korrekt auf CMD0“ · Mikrocontroller und Digitale Elektronik ·
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PDF
User_s_Manual_of_ET-STM32F103.pdf
with 1.25 DMIPS/MHz speed that is equal to 90 MIPS 4.Has RTC (Real Time Clock) Circuit with XTAL 32.768KHz and Battery Backup 5.Support In-System Programming (ISP) and In- Application Programming (IAP) through ON-Chip Boot- Loader via Port USART-1 (RS232) 6.Has circuit to connect with standard 20 PIN
in „Suche Schalter“ · Mikrocontroller und Digitale Elektronik ·
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PDF
Schaltplan_FARBE.pdf
FSMC_NE4/CS 3V3 PA8 3V3 PD3 3 100nF Y1 PC15 9 PC15-OSC32_OUT PG13/FSMC_A24 128 PG13 A24 10K 10K 32.768KHz PG14/FSMC_A25 129 PG14 A25 USER1 USER2 CON3 3V3 BEEP PD0 114 132 PG15 SD_CS 2 D2 PD1 115 PD0/FSMC_D2 PG15 C21 20pF JP6 B P SDIO_CMD D3 PD2 116 PD1/FSMC_D3 6 PB4 JNTRST B U4 R37 R38 C20 10pF USER2
in „STM32 Port-Initialisierung“ · Mikrocontroller und Digitale Elektronik ·
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PDF
Datenblatt_WCDMA-GSM-EDGE-Transceiver_MMM7210.pdf
5.2.1 2G Rx Performance Table 5. 2G Rx - All Bands Specification Name/Parameter Conditions Min Typ Max Units Amplitude After autocal -0.05 — 0.05 dB Imbalance Phase Imbalance After autocal -0.5 — 0.5 Degree Table 6. GSM Rx - Direct Lineup Specification Name/Parameter Conditions Min Typ Max Units GSM850
in „GSM-Modul (SIM908) nur analoge Ausgänge für Anruf?“ · HF, Funk und Felder ·
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PDF
MCU_-_HR8P506_Datasheet_e.pdf
A A c 1 36 E E 1 L2 θ A Gauge plane Seating plane 12 25 L L1 13 b 24 e （mm） （inch） Symbol MIN NOM MAX MIN NOM MAX A — — 1.60 — — 0.063 A1 0.05 — 0.15 0.002 — 0.006 A2 1.35 1.40 1.45 0.053 0.055 0.057 c1 0.09 — 0.20 0.003 — 0.008 D 8.80 9.00 9.20 0.346 0.354 0.362 D1 6.90 7.00 7.10 0.271 0.275 0.279
in „Re - Programmierung eines Cortex M0“ · Mikrocontroller und Digitale Elektronik ·
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PDF
SDHC_SDM04G7B7_08G7B7.pdf
SD Physical Layer Specification Ver.2.00 Compliant Physical L: 32, W: 24, T: 2.1 (mm), Weight: 3g (Max) 2g (typ.) SD Physical Layer Specification Ver.2.00 Compliant (DetailedDimensions attached: sheet. 1) Durability SD Physical Layer Specification Ver.2.00 Compliant RoHS RoHS Compatible Accessories Guarantee
in „SD-Karte - SDHC Karte“ · Mikrocontroller und Digitale Elektronik ·
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PDF
PIC18Fxx2.pdf
Instructions (bytes) (bytes) - Conversion available during SLEEP - Linearity ≤ 1 LSb PIC18F242 16K 8192 768 256 PIC18F252 32K 16384 1536 256 Programmable Low Voltage Detection (PLVD) PIC18F442 16K 8192 768 256 - Supports interrupt on-Low Voltage Detection Programmable Brown-out Reset (BOR) PIC18F452 32K 16384
in „AD1 und AD2 Multiplexen (PIC18F452)“ · Mikrocontroller und Digitale Elektronik ·
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PDF
reference_manual.pdf
Input pull-down 00 0 1 0 Input pull-up 1 Table 21. Output MODE bits MODE[1:0] Meaning 00 Reserved 01 Max. output speed 10 MHz 10 Max. output speed 2 MHz 11 Max. output speed 50 MHz 9.1.1 General-purpose I/O (GPIO) During and just after reset, the alternate functions are not active and the I/O ports are
in „I2S zwischen STM32F103RET6 und PCM3168A möglich?“ · Mikrocontroller und Digitale Elektronik ·
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PDF
ATmega32.pdf
to eight bits. In phase correct PWM mode the counter is incremented until the counter value matches MAX. When the counter reaches MAX, it changes the count direction. The TCNT0 value will be equal to MAX for one timer clock cycle. The timing diagram for the phase correct PWM mode is shown on Figure 33
in „STK500 als ISP“ · Mikrocontroller und Digitale Elektronik ·
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PDF
ATM16_doc2466.pdf
to eight bits. In phase correct PWM mode the counter is incremented until the counter value matches MAX. When the counter reaches MAX, it changes the count direction. The TCNT0 value will be equal to MAX for one timer clock cycle. The timing diagram for the phase correct PWM mode is shown on Figure 33
in „ISP - Pinbelegung“ · Mikrocontroller und Digitale Elektronik ·
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PDF
SC16C550-05.pdf
V or 5.0 V ±10%, unless otherwise specified. Symbol Parameter Conditions 2.5 V 3.3 V 5.0 V Unit Min Max Min Max Min Max V LOW-level clock input voltage −0.3 0.45 −0.3 0.6 −0.5 0.6 V IL(CK) VIH(CK) HIGH-level clock input voltage 1.8 VCC 2.4 V CC 3.0 VCC V VIL LOW-level input voltage −0.3 0.65 −0.3 0.8
in „Probleme beim Senden SC16c550“ · Mikrocontroller und Digitale Elektronik ·
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PDF
156346062-STi7105.pdf
by:on (148.5 MHz Max) n 1, 2PLL8,1024 CLK_DISP_HD t CLOCK_OFF (148.5 MHz Max) g 1,2,PLL,1024 l Freq. o Synth CLK_DSS Div by:on o #0 (36.864 MHz) 1,2PLL 1024 CLK_656 e CLK_DAA (148.5 MHz Max) g (HD) (32.768 MHz) p CLK_GDP3
in „Motorola Vip19x0 (Big brother of Vip1710)“ · Mikrocontroller und Digitale Elektronik ·
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PDF
Ateme16.pdf
to eight bits. In phase correct PWM mode the counter is incremented until the counter value matches MAX. When the counter reaches MAX, it changes the count direction. The TCNT0 value will be equal to MAX for one timer clock cycle. The timing diagram for the phase correct PWM mode is shown on Figure 33
in „Atmega16 und spi bus“ · Mikrocontroller und Digitale Elektronik ·
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PDF
Ateme16.pdf
to eight bits. In phase correct PWM mode the counter is incremented until the counter value matches MAX. When the counter reaches MAX, it changes the count direction. The TCNT0 value will be equal to MAX for one timer clock cycle. The timing diagram for the phase correct PWM mode is shown on Figure 33
in „Atmega16 und spi bus“ · Mikrocontroller und Digitale Elektronik ·
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PDF
arm.pdf
A 9..24V P4X103 7 C2 C1C1 PIX104 PION / OFF 10n L2L 3.3V power supply 733-334 4 C0 DR127-470-R 3A max. 8IGND4 1 PIGND8 SW PIN101 PIL2PIL202 VCC LM2676S-ADJ 2 0 0K V2V C1 C2C 32 C3 I2 C4C4 R1R1 R2R2 TGL34-33A 10u 100n 100n 4k7 56 0A C0 31 VKV3V3 I1 0 1 30BQ040 P1 C5C5 C1 C6 VA P2 330u C2 330u 2 R3R3
in „ARM Board Layout“ · Platinen ·
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PDF
AN758.pdf
wound, or 12 – 14 turns if loosely wound. The flux density can then be calculated as: V x 102 B17 30 B max = max ( B 2πfnA I16 IMD ( G15 35 d where: f = Frequency in MHz E D W14 G PE I n = Total number of turns. P13 40 A = Cross sectional area of the toroid in cm . VCC = 50 V,out 300 W PEP V = Peak voltage
in „Stackpole Ferrit Kerne für RF Verstärker“ · HF, Funk und Felder ·
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PDF
_Motorola_AN758.pdf
wound, or 12 – 14 turns if loosely wound. The flux density can then be calculated as: V x 102 B17 30 B max = max ( B 2πfnA I16 IMD ( G15 35 d where: f = Frequency in MHz E D W14 G PE I n = Total number of turns. P13 40 A = Cross sectional area of the toroid in cm . VCC = 50 V,out 300 W PEP V = Peak voltage
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PDF
MGA-62563__AV02-1237EN_.pdf
= 5OΩ,V = 3V (unldss otherwise specified) Symbol ParametersandTestConditions Freq Units Min. Typ. Max. StdDev Id [1,2] Device Current mA 47 62 77 2.09 NF test[1,2 Noise Figure in test circuit [1] f = 0.5 GHz dB 0.93 1.4 0.06 [1,2] [1] G test Associated Gain in test circuit f = 0.5 GHz dB 20.4 22 23.4
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PDF
ATMEGA8_DATENBLATT.pdf
to eight bits. In phase correct PWM mode the counter is incremented until the counter value matches MAX. When the counter reaches MAX, it changes the count direction. The TCNT2 value will be equal to MAX for one timer clock cycle. The timing diagram for the phase correct PWM mode is shown on Figure 51
in „I2C/TWI TWBR > 10 warum?“ · Mikrocontroller und Digitale Elektronik ·
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PDF
LGT8FX8P_databook_v1.0.4.pdf
信号，降序计数下比较匹配 时清零 OC0x 信号 下表为波形产生模式控制。 WGM0[2:0] 工作模式 TOP 值 更新 OCR0X 时刻 置位 TOV0 时刻 立即 0 Normal 0xFF MAX 1 PCPWM 0xFF TOP BOTTOM 2 CTC OCR0A 立即 MAX 3 FPWM 0xFF TOP MAX 4 保留 - - - 5 PCPWM OCR0A TOP BOTTOM 6 保留 - - - 7 FPWM OCR0A TOP TOP 下表为死区时间使能时 OC0A 信号输出波形的极性控制。 死区时间使能模式下 OC0A 信号输出波形的极性控制 DTEN0 COM0A
in „Spot Welder Firmware Update fehlerhaft“ · Mikrocontroller und Digitale Elektronik ·
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PDF
LGT8FX8P_databook_v1.0.4.pdf
信号，降序计数下比较匹配 时清零 OC0x 信号 下表为波形产生模式控制。 WGM0[2:0] 工作模式 TOP 值 更新 OCR0X 时刻 置位 TOV0 时刻 立即 0 Normal 0xFF MAX 1 PCPWM 0xFF TOP BOTTOM 2 CTC OCR0A 立即 MAX 3 FPWM 0xFF TOP MAX 4 保留 - - - 5 PCPWM OCR0A TOP BOTTOM 6 保留 - - - 7 FPWM OCR0A TOP TOP 下表为死区时间使能时 OC0A 信号输出波形的极性控制。 死区时间使能模式下 OC0A 信号输出波形的极性控制 DTEN0 COM0A
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PDF
Mega32.pdf
to eight bits. In phase correct PWM mode the counter is incremented until the counter value matches MAX. When the counter reaches MAX, it changes the count direction. The TCNT0 value will be equal to MAX for one timer clock cycle. The timing diagram for the phase correct PWM mode is shown on Figure 33
in „AVR Timer/Counter Zeit berechnen“ · Mikrocontroller und Digitale Elektronik ·
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PDF
SCD5580.PDF
Slimline Serial Input Dot Addressable Intelligent Display Package Dimensions in inches (mm) 1.500 max. (38.10) .050 0.145 (2.54) (.47) (1.27) .012 (.30) (3.68) typ. typ. .300 –.020 (10.0 –.15) (7.62 –.51) Pin 1 1.312 ref. 0.200 Indicator (33.32) (5.08) EIA date code Intensity Code SIEMENSX YYWW Z Y
in „[V] 2 St. Punktmatrix Displays SCD5583, 5x5, 8-stellig, grün“ · Markt ·
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PDF
A300_ATMEGA8xxx.pdf
to eight bits. In phase correct PWM mode the counter is incremented until the counter value matches MAX. When the counter reaches MAX, it changes the count direction. The TCNT2 value will be equal to MAX for one timer clock cycle. The timing diagram for the phase correct PWM mode is shown on Figure 51
in „atMega8-16 Au beschreiben“ · Mikrocontroller und Digitale Elektronik ·
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PDF
ATmega8.pdf
contains timing data for basic Timer/Counter operation. The figure shows the count sequence close to the MAX value. 70 ATmega8(L) 2486Z–AVR–02/11 ATmega8(L) Figure 28. Timer/Counter Timing Diagram, No Prescaling clkI/O clkTn (clI/O1) TCNTn MAX - 1 MAX BOTTOM BOTTOM + 1 TOVn Figure 29 shows the same timing
in „Mikrocontroller und 15'' TFT LCD“ · Mikrocontroller und Digitale Elektronik ·
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PDF
db_atmega8.pdf
to eight bits. In phase correct PWM mode the counter is incremented until the counter value matches MAX. When the counter reaches MAX, it changes the count direction. The TCNT2 value will be equal to MAX for one timer clock cycle. The timing diagram for the phase correct PWM mode is shown on Figure 51
in „ADC-Input und Auswahlverfahren“ · Mikrocontroller und Digitale Elektronik ·
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PDF
AVR_ATmega_328PB.pdf
selecting crystals, consider the Maximum ESR Recommendations: Table 12-5 Maximum ESR Recommendation for 32.768kHz Crystal Crystal CL [pF] Max. ESR [kΩ] (1) 6.5 75 9.0 65 12.5 30 Note: 1. Maximum ESR is typical value based on characterization. The Low-frequency Crystal Oscillator provides an internal load capacitance
in „ATmega328PB: UART(MC) empfängt falsche Daten“ · Mikrocontroller und Digitale Elektronik ·