-
PDF
1_AMD_BKDG_Family__15h_Mod_00h-0Fh_BKDG.pdf
topology. Table 35: DDR3 UDIMM Population Support G34/C32 DIMM DIMM0 DIMM1 DIMM2 Slots/Ch 1 SR/DR N/A N/A 2 - SR/DR N/A SR/DR SR/DR N/A 3 - - SR/DR SR/DR - SR/DR Table 36: DDR3 RDIMM Population Support G34/C32 DIMM Slots/Ch DIMM0 DIMM1 DIMM2 1 SR/DR/QR N/A N/A 2 - SR/DR/QR N/A SR/DR/QR SR/DR/QR N/A
-
PDF
msp430f5529.pdf
F1 G1 I/O Output terminal of crystal oscillator XT1 AVSS1 14 14 D1 G2 Analog ground supply P8.0 15 N/A N/A N/A I/O General-purpose digital I/O P8.1 16 N/A N/A N/A I/O General-purpose digital I/O P8.2 17 N/A N/A N/A I/O General-purpose digital I/O DVCC1 18 15 G1 H1 Digital power supply DVSS1 19 16 H1
in „Fragen zu ADC“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
ATMega16.pdf
Formats FRAME (IDLE) St 0 1 2 3 4 [5] [6] [7] [8] [P] Sp1 [Sp2] (St / IDLE) St Start bit, always low. (n) Data bits (0 to 8). P Parity bit. Can be odd or even. Sp Stop bit, always high. IDLE No transfers on the communication line (RxD or TxD). An IDLE line must be high. The frame format used by the USART
in „DCF auf INT0“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
MAX220-MAX249.pdf
R4IN 2 T5IN T5 T5OUT 41 R1IN 17 39 R4OUT GND 18 MAX240 38 T4 IN 16 R1 OUT R1 R1 IN 17 VCC 19 37 T3IN N.C. 20 36 R5OUT 5kΩ N.C. 21 35 R5IN N.C. 22 34 N.C. R2 13 R2 OUT R2 IN 10 2 2 2 2 2 2 2 3 3 3 3 5kΩ . . - - . . . TTL/CMOS 3 R3 OUT R3 R3IN 4 RS-232 . . 1 V C 2 C V . C.C . OUTPUTS INPUTS N N C C N N
in „avr prog und device- auswahl“ · Mikrocontroller und Digitale Elektronik ·
-
Datei
Wie_archiviert_ihr_Websites__-_Mikrocontroller.net.html
dkqQMKalhrhfPtaHpF2VlLxrqdMm0Tp5GILQlYJmdrEoHqsL9woSrRvj53XEpJKe/1ZDl2QTBmF3Wn6m8fp3ZZumvR/D1DwrLh4j/rqoLiWbrAfGLWNhU/s2KtyXoN4DECBrmza9zbwyRDpzVro6nWduBeI4xirL+aNJpTp5o8szbLJ/1QxpofDn+EW1OpFSlIRKXx1VoGxK99XMvZHlbVKp7i5CHS0U2jTK3vUaoHZmQsNRBSLPtlrMnH+u3aRqE43bYxN6/Wy/YhP9dtZrG5dzby+dCiSuH121DZs+nk/EZbei77C65ZVZ3fdhfZK5NTHflqAzWF6lJjRu0XW7XaO6dnjsnTRAec
-
PDF
max232.pdf
R4IN 2 T5IN T5 T5OUT 41 R1IN 17 39 R4OUT GND 18 MAX240 38 T4 IN 16 R1 OUT R1 R1 IN 17 VCC 19 37 T3IN N.C. 20 36 R5OUT 5kΩ N.C. 21 35 R5IN N.C. 22 34 N.C. 13 R2 R2 IN OUT R2 10 2 2 2 2 2 2 2 3 3 3 3 5kΩ . . - - . . . TTL/CMOS 3 R3 OUT R3 R3IN 4 RS-232 . . C V C C C V . C.C . OUTPUTS INPUTS N N N N N 5kΩ
in „Trackball dsub9w auf PS2m Belegung?“ · PC Hard- und Software ·
-
PDF
max232cpe.pdf
2 T5IN T5 OUT 41 R1IN 17 39 R4OUT GND 18 MAX240 38 T4IN 16 R1 R1 V 19 37 T3 OUT R1 IN 17 CC IN 5k N.C. 20 36 R5OUT N.C. 21 35 R5IN N.C. 22 34 N.C. 13 R2 OUT R2IN 10 R2 2 2 2 2 2 2 2 3 3 3 3 5k 3 R3 R3 4 . . + + - + 2 - . . . TTL/CMOS OUT R3 IN RS-232 N N. C V C C C V N N N . OUTPUTS 5k INPUTS Plastic
in „UART Problem mit Baudrate“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
453523_1.pdf
2 T5IN T5 OUT 41 R1IN 17 39 R4OUT GND 18 MAX240 38 T4IN 16 R1 R1 V 19 37 T3 OUT R1 IN 17 CC IN 5k N.C. 20 36 R5OUT N.C. 21 35 R5IN N.C. 22 34 N.C. 13 R2 OUT R2IN 10 R2 2 2 2 2 2 2 2 3 3 3 3 5k 3 R3 R3 4 . . + + - + 2 - . . . TTL/CMOS OUT R3 IN RS-232 N N. C V C C C V N N N . OUTPUTS 5k INPUTS Plastic
in „Bitte um Überprüfung“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
ADUC7019_7020_7021_7022_7024_7025_7026_7027_7028.pdf
fS=774kSPS Rev. B | Page 28 of 92 ADuC7019/20/21/22/24/25/26/27/28 9000 75 –76 8000 70 SNR –78 7000 65 6000 –80 Y C ) 60 ) E5000 d d U ( –82 ( Q N THD H R4000 S 55 T F 3000 –84 50 2000 3 45 –86 0 1000 0 0 5 5 4 4 0 0 40 –88 0 1161 1162 1163 1.0 1.5 2.0 2.5 3.0 BIN EXTERNAL REFERENCE (V) Figure23.CodeHistogramPlot
-
PDF
MAX232.pdf
R4IN 2 T5IN T5OUT 41 R1 17 39 R4 T5 IN MAX240 OUT GND 18 38 T4IN 16 R1 OUT R1 R1IN 17 VCC 19 37 T3IN N.C. 20 36 R5OUT 5k N.C. 21 35 R5IN N.C. 22 34 N.C. 13 R2 OUT R2 R2IN 10 2 2 2 2 2 2 2 3 3 3 3 5k . . . . . TTL/CMOS 3 R3OUT R3IN 4 RS-232 . C. 1 V 1 2 2C V . C.C . OUTPUTS R3 INPUTS N N C C C N N N 5k
in „Problem mit RS232“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
MAX232.pdf
R4IN 2 T5IN T5OUT 41 R1 17 39 R4 T5 IN MAX240 OUT GND 18 38 T4IN 16 R1 OUT R1 R1IN 17 VCC 19 37 T3IN N.C. 20 36 R5OUT 5k N.C. 21 35 R5IN N.C. 22 34 N.C. 13 R2 OUT R2 R2IN 10 2 2 2 2 2 2 2 3 3 3 3 5k . . . . . TTL/CMOS 3 R3OUT R3IN 4 RS-232 . C. 1 V 1 2 2C V . C.C . OUTPUTS R3 INPUTS N N C C C N N N 5k
in „Welche Bedeutung....“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
PicoMite_User_Manual_4_.pdf
manage these numbered locations in flash you can use the following commands (note that in the following n is a number from 1 to 7): FLASH SAVE n Save the program in RAM to the flash location n. FLASH LOAD n Load a program from flash location n into RAM. FLASH RUN n Run a program from flash location n, clears
in „Qual der Wahl - Sensoren Auswertung auf Display ("Analog")“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
TMC4671-LA_datasheet.pdf
identification and auto tuning options with TRINAMIC’s IDE • UART Debug Interface – Three pin (GND, RxD, TxD) 3.3 V UART interface (1N8; 9600 (default), 115200, 921600, 3M bps) – Available as port for external position sensors (e.g. absolute encoder together with processor) – Transparent register access
-
PDF
DM00135183.pdf
command in quad mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 327 Figure 64. nCS when CKMODE = 0 (T = CLK period). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 335 Figure 65. nCS when CKMODE = 1 in SDR mode (T = CLK period) . . . . . . . . . . . . . . .
in „STM32F446 FMP I2C kein Open Drain möglich?!“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
CMX813.pdf
byte which may be followed by either: (i) a further instruction or data (1 btye) or (ii) a status or Rx data reply (1 byte) 8-bit Write Only Registers HEX REGISTER BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 ADDRESS/ NAME (D7) (D6) (D5) (D4) (D3) (D2) (D1) (D0) COMMAND $01 GENERAL N/A N/A N/A N/A N/A N/A N/A N/A RESET ROM PAGE SELECT DECODER BANDWIDTH OPERATION MODE $30 CONTROL MSB LSB MSB LSB MSB LSB BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 TONE TONE ADDRESS $31 ADDRESS MSB LSB BIT 7 BIT6 BIT
in „leidiges Thema - SPI“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
FT2232_datasheet.pdf
mode) baud rate pre-scaler USB 1.1. Note : The device would be a USB 2.0 Full supports division by (n+0), (n+0.125), (n+0.25), Speed device (12Mb/s) as opposed to a USB 2.0 (n+0.375), (n+0.5), (n+0.625), (n+0.75) and (n+0.875) High Speed device (480Mb/s). 14 where n is an integer between 2 and 16,384
in „AVR-Programmierung via USB mit FT2232“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
ATtiny804-06-07-1604-06-07-DataSheet-DS40002312A.pdf
Asynchrono... Figure 23-4. Synchronous Mode XCK Timing XCK INVEN = 0 Data transmit (TxD) Data sample (RxD) XCK INVEN = 1 Data transmit (TxD) Data sample (RxD) The I/O pin can be inverted by writing a ‘1’ to the Inverted I/O Enable (INVEN) bit in the Pin n Control register of the port peripheral (PORTx.PINnCTRL
in „ATTINY804 RTC bekomme ich nicht hin“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
Kap4.pdf
interpoliert werden. Vor jeder Mesung wird dann nur eine Kalibrierung mit einem KalibrierwiderstandR N durchgeführt. Die unbekannte Impedanz R ergxbt sich dann aus der B-Kanal- Spannung U RN(mit RN) und der SpannungU (miBxR ) naxh U U Rx= R T RN - 1+ R N RN (38) UBx U Bx Wird für RNein Kurzschluß (R =N0) verwendet (B-KanalspannungU ) , verBKnfacht sich dies zu UBK Rx= R T - 1 (39) UBx wobei auch hier stets der Parallelleitwert von Cczu subtrahieren ist. 4.2.2 Messung der Quarzparameter 4.2.2.1
in „Bitte um Identifizierung Quartz“ · Analoge Elektronik und Schaltungstechnik ·
-
PDF
RK032ML05.pdf
Rocktech Displays Limited 磐石电子有限公司 LCD Module Specification Module P/N: RK032ML05 Version: 1.1 Description : 3.2 inch TFT 240*400 Pixels With LED backlight TEL: 0086-755-26065260 Fax: 0086-755-26065261 E-mail: Sales@rocktech.com.hk Web: www.rocktech.com.hk RK032ML05 Revision
-
PDF
manual.pdf
1~255 denominator G =N ×C ×4 =×2500×4 10=00 =25 system P 3200 3200 8 configuration Position control, speed control, torque Position control model Position control control control Input model Pulse control, digital quantity
in „Invertierungsschaltung Notaus-Ausgänge“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
SPI_Interface_On_GPS_Receiver_A2035_H.pdf
77 $GPGSV,3,3,12,09,00,000,,10,00,000,,11,00,000,,12,00,000,*71 $GPRMC,000050.058,V,,,,,,,191210,,,N*4F $GPGGA,000051.065,,,,,0,00,,,M,0.0,M,,0000*51 $GPGSA,A,1,,,,,,,,,,,,,,,*1E $GPRMC,000051.065,V,,,,,,,191210,,,N*40 Hexadecimal format ouputğ▯▯ 24 47 50 47 47 41 2C 30 30 30 30 35 30 2E 30 35 38 2C
in „Schlampiges GPS-Receiver Datenblatt (Maestro 2035-H)“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
XPLAIN_Shematic.pdf
SDRAM_D2 V_XM SDRAM_A8 33 A8 PB5 10 PB5(TDI-ACB5-ADCB5) PJ1(EBI) 66 SDRAM_D1 SDRAM_A9 34 A9 PB6 11 65 SDRAM_D0 7 SDRAM_A10 22 PB7 12 PB6(TCK-ACB6-ADCB6) PJ0(EBI) 64 n 1 SDRAM_A11 35 A10 40 13 PB7(TDO-ACB7-ADCB7) VCC 63 1 C A11 NC0 36 GND 14 GND GND 62 SDRAM_CLK GND NC1 15 0 n VCC PH7(EBI) NC2 C 1 PC0
in „Xplain: Schaltplan gesucht“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
ATmegaXX4.pdf
Multi-processor Communication Mode” on page 187. 18.11.3 UCSRnB – USART Control and Status Register n B Bit 7 6 5 4 3 2 1 0 RXCIEn TXCIEn UDRIEn RXENn TXENn UCSZn2 RXB8n TXB8n UCSRnB Read/Write R/W R/W R/W R/W R/W R/W R R/W Initial Value 0 0 0 0 0 0 0 0 Bit 7 – RXCIEn: RX Complete Interrupt Enable n
in „Atmega644PA Timer3“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
mega644.pdf
Multi-processor Communication Mode” on page 187. 16.11.3 UCSRnB – USART Control and Status Register n B Bit 7 6 5 4 3 2 1 0 RXCIEn TXCIEn UDRIEn RXENn TXENn UCSZn2 RXB8n TXB8n UCSRnB Read/Write R/W R/W R/W R/W R/W R/W R R/W Initial Value 0 0 0 0 0 0 0 0 Bit 7 – RXCIEn: RX Complete Interrupt Enable n
in „AVR Controller braucht zu viel Strom“ · Mikrocontroller und Digitale Elektronik ·
-
Datei
Transistortester.h
,'g',' ', '"','T','r','e','n','n','e',LCD_CHAR_INSEP,'P','i','n','s','!','"',' ', 'u','n','d',' ','s','c','h','l','i','e','s','s','e',' ', 'e','r','s','t',' ', 'n','a','c','h',' ','d','e','r',' ', 'M','e','l','d','u','n','g',' ', '"','1'+TP_OFFSET,'-',LCD_CHAR_CAP,'-','3'+TP_OFFSET,LCD_CHAR_INSEP,'>','1','0','0','n','F','"',' ', 'e','i','n','e','n',' ','g','u','t','e','n',' ', 'K','o','n','d','e','n','s','a','t','o','r',' ', 'm','i','t',' ','m','e','h','r',' ','a','l','s',' ','1','0','0','n','F',' ', 'a','n','
-
PDF
DIY_Synth_Anleitung.pdf
. Grob- und Fein-Regler für das Tuning), P2 so einstellen, dass ein "C" am Ausgang erscheint (z.B. 65Hz oder 33 Hz). DIY Synth Seite 22 Anleitung Anwendungsbeispiel Diese Symbole für elektronische Bauteile werden im folgenden verwendet: Widerstand entsprechendes US symbol Potentiometer entsprechendes
in „Eurorack PSU“ · Analoge Elektronik und Schaltungstechnik ·
-
PDF
050_AM800480LTMQW-TW0H.pdf
LTD. 24 11.5 INSPECTION QUALITY CRITERIA Defect Type Limit Note φ＜0.15mm Ignore Spot 0.15mm≦φ≦0.5mm N≦4 (1) 0.5mm＜φ N=0 0.03mm<W≦0.1mm, N≦3 Visual Fiber L≦5mm (1) Internal 1.0mm＜W, 1.5mm＜L N=0 Defect φ＜0.15mm Ignore Polarizer Bubble 0.15mm≦φ≦0.5mm N≦2 (1) 0.5mm＜φ N=0 Mura It’ OK if mura is slight visible through 6%ND filter A Grade B Grade Bright Dot C O Total C O Total (3) Area Area Area Area N≦0 N≦2 N≦2 N≦2 N≦3 N≦5 (2) Dark Dot N≦2 N≦3 N≦3 N≦3 N≦5 N≦8 Electrical Defect Total Dot N≦4 N≦5 N≦6 N≦8 (2) N≦1 N≦1 N≦1 N≦1 N≦1 Two Adjacent Dot N≦0 (4) pair pair pair pair pair Three or More Adjacent
in „lcd controller board“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
Diplom_Mangalathu.pdf
Anpassnetzwerk zur Leistungsanpassung 25 3,3 Rauschanpassung 21 2,9 ] 2,5 [7 2,d Vorverstärker 13 1,7 G N 9 1,3 0,9 553,55,657,59,661,63,65,667,69,71,673,69 Frequenz [M H z] Spektrumsanalysator Rauschgenerator Abb. 3.10: Schematische Darstellung der Rauschanpassung mit Rauschgenerator. Z beschreibt die Impe
in „Nuclear magnetic resonanc NMR“ · Analoge Elektronik und Schaltungstechnik ·
-
PDF
MSP430F5438IPZ.pdf
63 50 Digital ground supply DVCC2 64 51 Digital power supply General-purpose digital I/O P8.5/TA1.0 65 65 I/O TA1 CCR0 capture: CCI0B input, compare: Out0 output General-purpose digital I/O P8.6/TA1.1 66 66 I/O TA1 CCR1 capture: CCI1B input, compare: Out1 output P8.7 67 N/A I/O General-purpose digital
in „Strombelastbarkeit MSP430“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
datasheet.pdf
QSPI_IO[0] / I2C_SDA PIO_11 2 PIO[13] / QSPI_IO[1] PIO_13 PIO / Serial Flash / I C PIO[14] / UART_RX2 PIO_14 PIO[15] / UART_TX1 PIO_15 F1 PIO[16] / UART_RTS PIO_16 PIO / UART PIO[17] / UART_CTS2 PIO_17 MIC BIAS AIO[0]D2 AIO_0 Analogue Input / Output U 8 3 A V V USB_P H10 O F I _ _ USB_N J10 _ _ G D
in „A2DP Bluetooth Modul China eBay“ · HF, Funk und Felder ·
-
PDF
ATtiny212_40001911A.pdf
the edge where data output (TxD) is changed. Figure 24-3. Synchronous Mode XCK Timing INVEN = 1 XCK RxD / TxD Sample INVEN = 0 XCK RxD / TxD Sample The I/O pin can be inverted by writing a '1' to the Inverted I/O Enable bit (INVEN) in the Pin n Control register of the Port peripheral (PORT.PINnCTRL).
in „Neue 8-Bit Tinys vorgestellt: 417/814/816/817“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
AN2131_datasheet.PDF
Technical Reference Manual t # o 6 5 4 D D E # T I I I T R T T R A D C P D 7 6 5 4 3 2 1 0 D C 7 D N C K 7 6 5 4 N B B B B 3 2 1 0 B B B B N C C S G V B D D D D G P P P P D D D D P P P P G V P 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 SCL PC6/WR# 65 40 WAKEUP# 66 39 PC5
in „Aufrufen von Funktion legt auch vorherigen Teil des Programms lahm“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
AN2131_datasheet.PDF
Technical Reference Manual t # o 6 5 4 D D E # T I I I T R T T R A D C P D 7 6 5 4 3 2 1 0 D C 7 D N C K 7 6 5 4 N B B B B 3 2 1 0 B B B B N C C S G V B D D D D G P P P P D D D D P P P P G V P 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 SCL PC6/WR# 65 40 WAKEUP# 66 39 PC5
in „Einteilung von data, pdata, xdata, code?“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
at90s2313-datasheet-atmel.pdf
,b) ← 1 None 2 CBI P, b Clear Bit in I/O Register I/O(P,b) ← 0 None 2 LSL Rd Logical Shift Left Rd(n+1) ← Rd(n), Rd(0) ← 0 Z,C,N,V 1 LSR Rd Logical Shift Right Rd(n) ← Rd(n+1), Rd(7) ← 0 Z,C,N,V 1 ROL Rd Rotate Left through Carry Rd(0) ← C, Rd(n+1) ← Rd(n), C ← Rd(7) Z,C,N,V 1 ROR Rd Rotate Right through Carry Rd(7) ← C, Rd(n) ← Rd(n+1), C ← Rd(0) Z,C,N,V 1 ASR Rd Arithmetic Shift Right Rd(n) ← Rd(n+1), n = 0..6 Z,C,N,V 1 SWAP Rd Swap Nibbles Rd(3..0) ← Rd(7..4), Rd(7..4) ← Rd(3..0) None 1 BSET s Flag Set SREG(s) ← 1 SREG
in „AVR Studio 4.19“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
AT90S2313_Datasheet.pdf
,b) ← 1 None 2 CBI P, b Clear Bit in I/O Register I/O(P,b) ← 0 None 2 LSL Rd Logical Shift Left Rd(n+1) ← Rd(n), Rd(0) ← 0 Z,C,N,V 1 LSR Rd Logical Shift Right Rd(n) ← Rd(n+1), Rd(7) ← 0 Z,C,N,V 1 ROL Rd Rotate Left through Carry Rd(0) ← C, Rd(n+1) ← Rd(n), C ← Rd(7) Z,C,N,V 1 ROR Rd Rotate Right through Carry Rd(7) ← C, Rd(n) ← Rd(n+1), C ← Rd(0) Z,C,N,V 1 ASR Rd Arithmetic Shift Right Rd(n) ← Rd(n+1), n = 0..6 Z,C,N,V 1 SWAP Rd Swap Nibbles Rd(3..0) ← Rd(7..4), Rd(7..4) ← Rd(3..0) None 1 BSET s Flag Set SREG(s) ← 1 SREG
in „Fragen zum Sleep Mode“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
asus-p701-unlocked.pdf
63 AD0 P_PMON_10 I Sense Power Loading <Variant Name> 64 AD1 BAT_IN I sense Battery EC Pin Define 65 AD2 N.C I Reserved Title : 66 AD3 N.C I Reserved ASUSTek Computer INC. Engineer: Kell_Huang Size Project Name 68 GPO3C DOC O Trigger Clock Gen Rev http://hobi-elektronika.net A3 P701 1.2G DateFriday,
-
PDF
AtMega644P_Datasheet.pdf
Multi-processor Communication Mode” on page 180. 17.10.3 UCSRnB – USART Control and Status Register n B Bit 7 6 5 4 3 2 1 0 RXCIEn TXCIEn UDRIEn RXENn TXENn UCSZn2 RXB8n TXB8n UCSRnB Read/Write R/W R/W R/W R/W R/W R/W R R/W Initial Value 0 0 0 0 0 0 0 0 Bit 7 – RXCIEn: RX Complete Interrupt Enable n
in „Alkoholmessgerät programmieren“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
atmega644.pdf
Multi-processor Communication Mode” on page 180. 17.10.3 UCSRnB – USART Control and Status Register n B Bit 7 6 5 4 3 2 1 0 RXCIEn TXCIEn UDRIEn RXENn TXENn UCSZn2 RXB8n TXB8n UCSRnB Read/Write R/W R/W R/W R/W R/W R/W R R/W Initial Value 0 0 0 0 0 0 0 0 Bit 7 – RXCIEn: RX Complete Interrupt Enable n
in „SPI-Kommunikation Atmega644 - ADS1118“ · Mikrocontroller und Digitale Elektronik ·
-
Datei
Inputs.ino
#define HAT_CENTER 8 #define HAT_N 0 #define HAT_NE 1 #define HAT_E 2 #define HAT_SE 3 #define HAT_S 4 #define HAT_SW 5 #define HAT_W 6 #define HAT_NW 7 #define PIN_RESERVED 3 Encoder encoders[4]; // input pins autofilled based on which
in „Dauerkontakt vom Schalter in Impuls umwandeln“ · Analoge Elektronik und Schaltungstechnik ·
-
PDF
ATmega32.pdf
1 0 PIND7 PIND6 PIND5 PIND4 PIND3 PIND2 PIND1 PIND0 PIND Read/Write R R R R R R R R Initial Value N/A N/A N/A N/A N/A N/A N/A N/A 65 2503Q–AVR–02/11 ATmega32(L) External The External Interrupts are triggered by the INT0, INT1, and INT2 pins. Observe that, if enabled, Interrupts the interrupts will
in „STK500 als ISP“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
Mega32.pdf
Formats FRAME (IDLE) St 0 1 2 3 4 [5] [6] [7] [8] [P] Sp1 [Sp2] (St / IDLE) St Start bit, always low. (n) Data bits (0 to 8). P Parity bit. Can be odd or even. Sp Stop bit, always high. IDLE No transfers on the communication line (RxD or TxD). An IDLE line must be high. The frame format used by the USART
in „AVR Timer/Counter Zeit berechnen“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
PIC18f6622.pdf
D D D D J 1J R R R R R R R R R V V R R R R R R R R R 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 RH2/A18 1 60 RJ2/WRL RH3/A19 RJ3/WRH 2 59 RE1/AD9/WR/P2C 3 58 RB0/INT0 RE0/AD8/RD/P2D 57 RB1/INT1 4 RG0/ECCP3/P3A 5 56 RB2/INT2 RG1/TX2/CK2 6 55 RB3/INT3/ECCP2 (1/P2A(1) RG2/RX2/DT2 RB4/KBI0
in „PIC 18F6622 Zeit um EEPROM zu schreiben“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
ATM16_doc2466.pdf
Transmit) CONTROL PARITY GENERATOR S PIN B TRANSMIT SHIFT REGISTER CONTROL TxD A A D Receiver CLOCK RX RECOVERY CONTROL RECEIVE SHIFT REGISTER DATA PIN RxD RECOVERY CONTROL UDR (Receive) PARITY CHECKER UCSRA UCSRB UCSRC Note: 1. Refer to Figure 1 on page 2, Table 33 on page 65, and Table 27 on page 60
in „ISP - Pinbelegung“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
Ateme16.pdf
Transmit) CONTROL PARITY GENERATOR S PIN B TRANSMIT SHIFT REGISTER CONTROL TxD A A D Receiver CLOCK RX RECOVERY CONTROL RECEIVE SHIFT REGISTER DATA PIN RxD RECOVERY CONTROL UDR (Receive) PARITY CHECKER UCSRA UCSRB UCSRC Note: 1. Refer to Figure 1 on page 2, Table 33 on page 65, and Table 27 on page 60
in „Atmega16 und spi bus“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
Ateme16.pdf
Transmit) CONTROL PARITY GENERATOR S PIN B TRANSMIT SHIFT REGISTER CONTROL TxD A A D Receiver CLOCK RX RECOVERY CONTROL RECEIVE SHIFT REGISTER DATA PIN RxD RECOVERY CONTROL UDR (Receive) PARITY CHECKER UCSRA UCSRB UCSRC Note: 1. Refer to Figure 1 on page 2, Table 33 on page 65, and Table 27 on page 60
in „Atmega16 und spi bus“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
xmega_a1.pdf
Ball Pitch 0.88 mm, Chip Ball Grid Array (CBGA) 100C2 100-ball, 7 x 7 x 1.0 mm Body, Ball Pitch 0.65 mm, Very Thin Fine-Pitch Ball Grid Array (VFBGA) 2 8067I–AVR–04/09 XMEGA A1 2. Pinout/Block Diagram Figure 2-1. Block diagram and pinout I D / C E INDEX CORNER 5 4 3 2 1 0 V N R R E D Q Q Q Q0 N C K
in „Welchen Wert hat der Pull-up-Widerstand dieses XMega?“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
MSP430F233TPM.pdf
µF 100 nF Figure 39. Supply Voltage and Reference Voltage Design V REF-/ eREF- External Supply From DV CC Power + Supply - DV SS 10 µF 100 nF + AV CC MSP430F261x - MSP430F241x AV SS 10 µF 100 nF Apply External Reference eREF+] or Use Internal ReferenceREF+] VREF+ or VeREF+ + - 10 µF 100 nF Reference Is Internally V REF-VeREF- Switched to AV SS Figure 40. Supply Voltage and Reference Voltage Design V REF-/ eREF- = AV SS, Internally Connected 66 POST OFFICE BOX 65•3DALLAS, TEXAS 75265 MSP430x23x
in „MSP430 SPI A25L080 Flash“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
40001893B.pdf
ADC1 PTC (3)AC0 AC1 AC2 DAC0 USAR SPI0 TWI0 TCA0 TCBn TCD0 CCL - - - - Name Specia T0 2 2 2 1 (1,2) l N N I I Q Q O O S S 23 19 16 10 PA0 AIN0 LUT0- RESE IN0 T UPDI 24 20 17 11 PA1 BREA AIN1 TXD MOSI SDA LUT0- K IN1 1 1 18 12 PA2 EVOU AIN2 RxD MISO SCL LUT0- T0 IN2 2 2 19 13 PA3 EXTCL AIN3 XCK SCK WO3
in „ATtiny1614 CPU Takt Problem“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
ATtiny1614_1616_1617.pdf
ADC1 PTC (3)AC0 AC1 AC2 DAC0 USAR SPI0 TWI0 TCA0 TCBn TCD0 CCL - - - - Name Specia T0 2 2 2 1 (1,2) l N N I I Q Q O O S S 23 19 16 10 PA0 AIN0 LUT0- RESE IN0 T UPDI 24 20 17 11 PA1 BREA AIN1 TXD MOSI SDA LUT0- K IN1 1 1 18 12 PA2 EVOU AIN2 RxD MISO SCL LUT0- T0 IN2 2 2 19 13 PA3 EXTCL AIN3 XCK SCK WO3
in „124Bus Beschreibung verfuegbar?“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
WM-F1216VG-6FLWcV03.pdf
L Level VOL OH =0.1 - - 0.1VCC V mA Supply Current for Logic *I - - 2.2 3.2 mA - DD Display color 65K colors *DD Measurement condition is for all pixels on display. ※ To avoid image residual, the same picture could not display to exceed one hour. WM-F1216VG-6FLWc Ver.3 4/35 1.3 Interface Pin Function
in „[V] 2,4GHz Transceiver(CortexM3) Chip-Antenne, Balun.“ · Markt ·