Wasserfester DS10B20 mit 1m Kabel für 2,11€: http://www.ebay.de/itm/High-Quality-Waterproof-Digital-Temperature-Temp-Sensor-Thermal-Probe-DS18B20-/400338132625?pt=LH_DefaultDomain_0&hash=item5d36031e91
Clock Width “H” Pulse Width tWCKH 15 ns Clock Width “L” Pulse Width tWCKL 15 ns Data Set Up Time DS 10 ns Data Hold Time tDH 12 ns Latch Pulse “H” Pulse Width tWLPH 15 ns Shift Clock to Latch Pulse tLD 0 ns Rise Time Shift Clock to Latch Pulse Fall Time SL 30 ns Latch Pulse to Shift Clock LS 25 ns Rise
Hallo, ich habe schon mehrere Tsic 206/306 am laufen. Die Temperaturen habe ich auch schon mit den DS10B20/18S20 von Dallas verglichen, alles bewegt sich dabei innerhalb von 1 Grad. Also OK. Ein Billigthermometer zeigte jedoch 2 Grad weniger an. Schwierigkeiten mit den TSIC Sensoren hatte ich immer wenn
ns 5 Chip Enable HoldTime to Rising Clock Edge ceh 20 20 ns 6 Data SetupTime to Rising Clock Edge ds 10 10 ns 7 Data HoldTime after Rising Clock Edge dh 10 10 ns [1] 8 Rising Clock Edge to D OUT dout 10 40 10 65 ns 9 Propagation Delay D to D t 18 30 ns IN OUT [1,2] doutp Simultaneous Mode for One IC
BCLK rising edge DACLRC/ADCLRC hold t 10 ns LRH time from BCLK rising edge DACDAT set-up time to tDS 10 ns BCLK rising edge DACDAT hold time from tDH 10 ns BCLK rising edge ADCDAT propagation delay tDD 0 35 ns from BCLK falling edge PD, Rev 4.8, April 2009 w 17 WM8731 / WM8731L Production Data MPU INTERFACE
-- V V DS DSS DD Vary tpto obtain ID BV DSS required peakDI I AS R I (t) G C VDD D DUT V V (t) DD DS 10V p tp Time N-CHANNEL SSR/U2N60A POWER MOSFET Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms DUT + V DS -- IS L Driver V GS RG Same Type as DUT V DD V GS •dv/dt controlled by GR ” •IScontrolled
------------------------------ ; Reservierung des Stack-Bereichs ?STACK SEGMENT IDATA RSEG ?STACK DS 10H ;------------------------------------------------------------------------------ ; Auf Adresse 0 im Code-Speicher muss ein LJMP zum Programmanfang stehen CSEG AT 0 ;absolutes Code-Segment bei Adresse
; Reservierung des Stack-Bereichs ?STACK SEGMENT IDATA RSEG ?STACK DS 10H ;------------------------------------------------ ; Variablen im int. direkt adressierbaren RAM Variablen SEGMENT DATA ;Variablen im direkt adressierbaren internen RAM RSEG Variablen
die ändern will, muss man dann die Endstufe über das Herstellertool neu parametrieren (z.B. unsere DS10-Serie). Wenn einige wenige Drehzahlen reichen, kann man die auch vorab konfigurieren und per digitalem I/O (z.B. über den Parallelport) umschalten (DS30-Reihe). Das sind dann im Prinzip schon richtige
nur zum übertragen des Programms auf den Controller. USB wäre schön, RS232 geht aber auch. Die DS10 Controller sind da leider zu teuer.
admittance |y | 45 75 — S I = 30 A, V = 10 VNote 1 fs D DS Input capacitance Ciss — 6800 — pF V DS= 10 V Output capacitance Coss — 1550 — pF V GS= 0 Reverse transfer capacitance Crss — 500 — pF f = 1MHz Total gate charge Qg — 130 — nc V DD= 10 V Gate to source charge Qgs — 16 — nc V GS= 10 V Gate to
#NET "FPGA_HSWAPEN" LOC = "D4"; ## 1 on R81 100 ohm to GND #NET "FPGA_INIT_B" LOC = "U3"; ## 1 on DS10 (thru series R90 27.4 ohm) #NET "FPGA_M0_CMP_MISO" LOC = "T15"; ## 1 on J3, 1 on SW2 DIP Sw #NET "FPGA_M1" LOC = "N12"; ## 2 on SW2 DIP Sw #NET "FPGA_MOSI_CSI_B_MISO0" LOC = "T13"; ## 15 on U17, 5 on
brauche 9A) zu erhalten. Hier ein exemplarisches Datenblatt: http://www.infineon.com/dgdl/BTM7810K_DS_10.pdf?folderId=db3a3043156fd5730116144c5d101c30&fileId=db3a30431be39b97011bea18e9217fee Für eine H-Brücke muss ich SH1 mit DL1 und SL2 mit DL2 verbinden. Zwischen die Pins kriege ich aber eine maximal
= 0 t5 A[20:1], SIZ[1:0], M/R# hold from AS# 0 — ns t6 CS# hold from AS# 0 — ns t7 R/W# setup to DS# 10 — ns t8 R/W# hold from AS# 0 — ns t9 AS# = 0 and CS# = 0 to DSACK1# driven high 1 — ns t10 AS# high to DSACK1# high impedance 3 13 ns t12 D[31:16] valid to 3rd CLK where CS# = 0 AS# = 0, and DS# =
= 0 t5 A[20:0], SIZ[1:0], M/R# hold from AS# 0 0 ns t6 CS# hold from AS# 0 0 ns t7 R/W# setup to DS# 10 10 ns t8 R/W# hold from AS# 0 0 ns t9 AS# = 0 and CS# = 0 to DSACK1# driven high 1 1 ns t10 AS# high to DSACK1# high 4 18 3 12 ns t11 First BCLK where AS# = 1 to DSACK1# high impedance 3 15 2 14 ns
recht dünn.... Ein geeigneter Typ könnte dieser sein: http://www.infineon.com/dgdl/IPD90P03P4L-04_DS_10.pdf?folderId=db3a304314dca3890114ef902baa05f9&fileId=db3a30431ddc9372011e07e8373a27c4 Ist aber nicht leicht "bekömmlich" (DIGIKEY hat ihn z.B.) und günstig sieht anders aus ;-)
V a Diode Forward Voltage I =-1A , V =0V -0.7 -1.3 V SD b SD GS Dynamic Q g Total Gate Charge V DS=-10V , DS=-3.6A 11 15 Q gs Gate-Source Charge V =-4.5V 2 nC GS Q gd Gate-Drain Charge 1.5 td(ON) Turn-on Delay Time 13 22 Tr Turn-on Rise Time V DD10V , I DS3.6A , 36 56 ns td(OFF) Turn-off Delay Time
Forward Transconductance V DS5 V, I D 0.5 A 1.45 S DYNAMIC CHARACTERISTICS C iss InputCapacitance V DS10 V, V =GS V, 50 pF C oss Output Capacitance f = 1.0 MHz 28 pF C rss ReverseTransferCapacitance 9 pF SWITCHING CHARACTERISTICS (Note) tD(on) Turn - On Delay Time V DD6 V, I D 0.5 A, 3 6 ns tr Turn - On
Equivalent Input Noise Voltage vs. Frequency Output Conductance vs. Drain Current 20 20 VGS(off)–3 V V DS= 10 V VGS(off)–3 V V DS= 10 V f = 1 kHz ) z 16 S 16 H ( / c TA= –55_C V a n c g 12 d 12 l o o C 25_C e u i 8 t 8 N u – – 125_C n D = 5 mA o e 4 g 4 D = DSS 0 0 10 100 1 k 10 k 100 k 0.1 1 10 f – Frequency
sw gs2 gd Q oss Output Charge ––– 13 ––– nC V DS= 10V, VGS= 0V td(on) Turn-On Delay Time ––– 14 ––– V DD= 10V, VGS= 4.5V e t r Rise Time ––– 14 ––– ns ID= 12A td(off) Turn-Off Delay Time ––– 5.8 ––– Clamped Inductive Load tf Fall Time ––– 16 ––– C iss Input Capacitance ––– 2830 ––– V GS= 0V C oss Output Capacitance ––– 920 ––– pF V DS= 10V C rss Reverse Transfer Capacitance ––– 420 ––– ƒ = 1.0MHz Avalanche Characteristics Parameter Typ. Max. Units E Single Pulse Avalanche Energy AS ––– 460 mJ IAR Avalanche Curren c ––– 12 A E AR Repetitive
wenn ich von Low-Side rede dann meine ich tatsächlich BTS117 http://www.infineon.com/dgdl/BTS117_DS_10.pdf?folderId=db3a30431ddc9372011e26863f92474e&fileId=db3a304325305e6d01254ed0155454f2 Der BTS711 ist ein Highside Schalter. Gruß Anja
CHARACTERISTICS TRANSFER CHARACTERISTICS (TYPICAL) Chip (TYPICAL) Chip 600 600 VGS = 20V 12V 10V V DS= 10V ) 500 ) 500 A 15V A D D I 400 I 400 T T Tch= 125°C Tch= 25°C E E R 300 R 300 U U C 9V C N 200 N 200 A A R R D 100 D 100 Tch= 25°C 0 0 0 0.2 0.4 0.6 0.8 1.0 5 7 9 11 13 15 DRAIN-SOURCE VOLTAGE V DS
Comments ANALOG SWITCH Analog Signal Range V to V V SS DD On Resistance (RON) 2.5 Ω typ V S V SS V DD , DS= 10 mA 4.5 5 Ωmax On Resistance Match Between Channels (∆RON 0.4 Ωtyp V S V SS V DD , DS= 10 mA 0.8 Ω max On Resistance Flatness (R ) 0.6 Ω typ V = V to V , I = 10 mA FLAT(ON) S SS DD DS 1 Ω max LEAKAGE
Threshold Voltage -0.70 ––– ––– V V DS= VGS, D = -250µA gfs Forward Transconductance ––– 5.9 ––– S V DS= -10V, D = -1.5A I Drain-to-Source Leakage Current ––– ––– -1.0 µA V DS= -16V, VGS= 0V DSS ––– ––– -25 V DS= -16V, GS = 0V, TJ= 55°C IGSS Gate-to-Source Forward Leakage ––– ––– 100 nA V GS= -12V Gate-to-Source
i 12 fs n n c r c O gos n D n r u i d o 40 t r 8 4 c - 200 n t n i e a c r µ − ( D S S 4 DSS@ V DS= 10 V, GS = 0 V 2 m −)100 20 ) D gfs V DS= 10 V, GS= 0 V ) ( I f = 1 kHz S rD 0 0 0 0 0 −2 −4 −6 −8 −10 0 −2 −4 −6 −8 −10 VGS(off)Gate-Source Cutoff Voltage (V) VGS(off)Gate-Source Cutoff Voltage (V) Output
Gate-source leakage current IGSS V GS=20 V, V DS=0 V - - 10 nA On-state drain current IDSS V GS=0 V, V DS=10 V 140 - - mA Drain-source on-state resistance R DS(on) V GS=0 V, ID=70 mA - 1.7 3.5 Ω V GS=10 V, ID=660 mA - 1.0 1.8 |V |>2|I |R , Transconductance g fs DS D DS(on)max 0.4 0.8 - S ID=0.48 A 3) Threshold
dennoch möchte ich da etwas zu schreiben. Kurz nach den letzten Beitrag habe ich mir den Hitachi DS 10 DFL Akkuschrauber gekauft. Im Vergleich zu meinem ersten No-Name Teil war es wirklich eine andere Welt. Der Akku war innerhalb von wenigen Minuten geladen und auch sonst war es ein schönes Gerät.
Typical Source-Drain Diode Fig 8. Maximum Safe Operating Area Forward Voltage IRLML2803 RD Q G V DS 10V VGS Q Q D.U.T. GS GD R G + -VDD VG 10V Pulse Width ≤ 1 µs Charge Duty Factor ≤ 0.1 % Fig 9a. Basic Gate Charge Waveform Fig 10a. Switching Time Test Circuit Current Regulator Same Type as D.U.T. VDS
Drain-to-Source Voltage,VDS – V Gate-to-Source Voltage,V GS – V | y fs | - I R - V 100 D 25 DS(on) GS S V DS =10V Ta=25°C 7 | 5 s m 20 y 3 C °C – , -25° 25 n c 2 Ta= C ( D =14A a 75° D 15 i e R d 10 u e A o n D =7A e 7 o i 10 s 5 - e r a R T 3 D t r i S 5 w 2 t n o S O F 1.0 0 0.1 2 3 5 7 1.0 2 3 5 7 10 2 3 5
Drain-source breakdown V(BR)DSS voltage D = 250µA, GS= 0 55 V V = Max rating, DSS Zero gate voltage drain DS 10 µA current (GS= 0) VDS = Max rating,Tc = 125°C 100 µA Gate body leakage current GSS VGS = ±20V ±200 nA (VDS = 0) VGS(th) Gate threshold voltage VDS= VGS, D = 250µA 2 4 V R Static drain-source on V
OE/VPP Setup Time 2 s t OE/V Hold Time 2 s OEH PP Input Rise and Fall Times t Data Setup Time 2 s DS (10% to 90%) 20ns t Address Hold Time 0 s AH t Data Hold Time Input Pulse Levels 2 s DH 0.45V to 2.4V CE High to tDFP Output Float Delay2) 0 130 ns Input Timing Reference Level t V Setup Time 0.8V to 2.0V
I y DSS fs (mA) (mS) 16 40 30 12 20 8 10 4 0 0 0 −1 −2 −3 −4 0 −2 −4 −6 −8 VGSoff(V) VGSoff(V) V DS= 10 V; Tj= 25 °C. VDS = 10 V; D = 10 mA; Tj= 25 °C. Fig 2. Drain current as a function of gate-source Fig 3. Common source forward transfer admittance as cut-off voltage; typical values. a function of
Table 7 - User LED LED Designation Virtex-II Pro Pin # DS7 (LED1) V8 DS8 (LED2) W6 DS9 (LED3) U10 DS10 (LED4) V10 2.6 User Push Button Switches The Virtex-II Pro development board provides four user push button switches as described in the following table. An active low signal is generated when a given
to BCLK rising edge DACLRC/ADCLRC hold tLRH 10 ns time from BCLK rising edge DACDAT set-up time to DS 10 ns BCLK rising edge DACDAT hold time from DH 10 ns BCLK rising edge PD Rev 4.0 February 2005 w 15 WM8731 / WM8731L Production Data Test Conditions AVDD, HPVDD, DBVDD = 3.3V, AGND = 0V, DCVDD = 1.5V
to BCLK rising edge DACLRC/ADCLRC hold tLRH 10 ns time from BCLK rising edge DACDAT set-up time to DS 10 ns BCLK rising edge DACDAT hold time from DH 10 ns BCLK rising edge PD Rev 3.4 April 2004 w 15 WM8731 / WM8731L Production Data Test Conditions AVDD, HPVDD, DBVDD = 3.3V, AGND = 0V, DCVDD = 1.5V, DGND
