between RO buffer OFF - - 15 kΩ DAC_OUT and V SS to have a 1% accuracy is 1.5 MΩ Maximum capacitive load at (2) C LOAD Capacitive load - - 50 pF DAC_OUT pin (when the buffer is ON). It gives the maximum output DAC_OUT Lower DAC_OUT voltage
wie das von elc. MCLK am ak470x scheint zu Schweigen, zumindest hat das Oszi nicht viel gezeigt. Der DAC im ak470x scheint initialisiert und nicht gemutet zu sein, laut Datenblatt und des Dumps (nach Boot des NFS-Images): [code] 192.168.2.65 bin # i2cdump /dev/i2c-3 0x11 0 9 i2cdump Dec 22 2008 i2c
Schieberegister nutzen und mit einem zweiten Port, einem 4-fach 2 zu eins Multiplexer (statt AND) und dem DAC wie bei Jörg Wolframs Chipbasic für Vorder- und Hintergrundfarbe je eine aus 16 auswählen ohne mehr ICs zu brauchen. Gruß, DetlevT
gibt dann genau die von dir genannten 25 Zeilen zu 80 Spalten. Ja, es könnten mehr Ports, ein DAC, ein Multiplexer... aber auch ein CPLD oder ein FPGA verwendet werden. Ich habe aus zwei Gründen darauf verzichtet. 1. Das AVR CP/M ist bewusst mit sehr einfacher Hardware aufgebaut, sozusagen ein
angekommen. Ein wirklich interessantes Teil. Ethernet, CAN, USB Host, 4x UART, 8x 12bit ADC, 10bit DAC, u.w.m. Der ebenfalls bestellte LPC2478 wird nachgeliefert. Dieser ist sogar noch interessanter, da ein XGA LCD Controller enthalten ist. Dann man ran an den Speck. Nun brauche ich passende Boards
---------------------------------------------------------------- Date: Tue, 8 Dec 2009 10:05:34 +0800 Delivered-To: michelle.konzack@tamay-dogan.net From: Ivy Du <ivy@wandisplay.com> To: Michelle Konzack <michelle.konzack@tamay-dogan.net> Subject: Formike Electronics: .22" , 8".. samples status
CMDR signals. Can be used to force DAC SD O/P. i n C [6] TST_DAC_SD_CMDS: Functions with CMDS signal. Can be used to force DAC SD O/P. o C [5] DAC_HD_HZU: d 1: Disables the DAC HD output current and puts the O/P in high impedance mode, but
testen, bau grad alles in Schaltschränke ein). @all Wäre vielleicht interessant auch eine Option (DAC-Ausgang) in der GUI zu haben, die auch ohne ZCD läuft und konstant eine Gleichspannung von 0-5V geniert und ansonsten wie die Dimmerfunktion nutzbar ist.
Komfort=>'22.0', KomfortStart=> '0700', KomfortEnde=> '1700', KomfortStartWE=>'0800', KomfortEndeWE=>'1700', Standby=>'20.0', Nacht=> '18.0', } ); # Aktuelle Zeit lesen my ($sec,$min,$hour,$mday,$mon,$year,$wday,$yday,$isdst) = localtime(time); if ($wday == 0) {$wday
V DD 00 VREF+ 01 V SOURCE+ FVR_buffer2 10 DAC1R<4:0> 5 Reserved 11 R DAC1PSS R DAC1EN R R X U DAC1_output 32 M To Peripherals Steps o - 3 R DAC1OUT (1) R DAC1OE R DAC1NSS VREF- 1 VSOURCE- VSS 0 Note 1: The unbuffered DAC1_output is provided on
level 1 DAC buffer read pointer top position flag. DACRPT 0 The DAC buffer read pointer is not zero 1 The DAC buffer read pointer is zero 0 DAC buffer read pointer bottom position flag. DACRPB 0 The DAC buffer
diesen Thread,Deine Sterne ;) & mach' dort Dampf, wohin sie weisen & man Dir das Webby verkauft hat: 0800-1721212 & Vodafones Foren! Der alternative Server startete übrigens schlicht als kleines Privat- projekt, um z.B. wenig computeraffinen Rentnern die Stimmen ihrer etwa zehn Flugstunden entfernten
all other Resets ‘1’ = Bit is set ‘0’ = Bit is cleared bit 7 DACEN: DAC Enable bit 1 = DAC is enabled 0 = DAC is disabled bit 6 DACLPS: DAC Low-Power Voltage State Select bit 1 = DAC Positive reference source selected 0 = DAC Negative reference source selected bit 5 DACOE: DAC Voltage Output Enable bit 1 = DAC voltage level is also an output on the DACOUT pin 0 = DAC voltage level is disconnected from the DACOUT pin bit 4 Unimplemented: Read as ‘0’ bit 3-2 DACPSS<1:0>: DAC
all other Resets ‘1’ = Bit is set ‘0’ = Bit is cleared bit 7 DACEN: DAC Enable bit 1 = DAC is enabled 0 = DAC is disabled bit 6 DACLPS: DAC Low-Power Voltage State Select bit 1 = DAC Positive reference source selected 0 = DAC Negative reference source selected bit 5 DACOE: DAC Voltage Output Enable bit 1 = DAC voltage level is also an output on the DACOUT pin 0 = DAC voltage level is disconnected from the DACOUT pin bit 4 Unimplemented: Read as ‘0’ bit 3-2 DACPSS<1:0>: DAC
all other Resets ‘1’ = Bit is set ‘0’ = Bit is cleared bit 7 DACEN: DAC Enable bit 1 = DAC is enabled 0 = DAC is disabled bit 6 DACLPS: DAC Low-Power Voltage State Select bit 1 = DAC Positive reference source selected 0 = DAC Negative reference source selected bit 5 DACOE: DAC Voltage Output Enable bit 1 = DAC voltage level is also an output on the DACOUT pin 0 = DAC voltage level is disconnected from the DACOUT pin bit 4 Unimplemented: Read as ‘0’ bit 3-2 DACPSS<1:0>: DAC
all other Resets ‘1’ = Bit is set ‘0’ = Bit is cleared bit 7 DACEN: DAC Enable bit 1 = DAC is enabled 0 = DAC is disabled bit 6 DACLPS: DAC Low-Power Voltage State Select bit 1 = DAC Positive reference source selected 0 = DAC Negative reference source selected bit 5 DACOE: DAC Voltage Output Enable bit 1 = DAC voltage level is also an output on the DACOUT pin 0 = DAC voltage level is disconnected from the DACOUT pin bit 4 Unimplemented: Read as ‘0’ bit 3-2 DACPSS<1:0>: DAC
all other Resets ‘1’ = Bit is set ‘0’ = Bit is cleared bit 7 DACEN: DAC Enable bit 1 = DAC is enabled 0 = DAC is disabled bit 6 DACLPS: DAC Low-Power Voltage State Select bit 1 = DAC Positive reference source selected 0 = DAC Negative reference source selected bit 5 DACOE: DAC Voltage Output Enable bit 1 = DAC voltage level is also an output on the DACOUT pin 0 = DAC voltage level is disconnected from the DACOUT pin bit 4 Unimplemented: Read as ‘0’ bit 3-2 DACPSS<1:0>: DAC
all other Resets ‘1’ = Bit is set ‘0’ = Bit is cleared bit 7 DACEN: DAC Enable bit 1 = DAC is enabled 0 = DAC is disabled bit 6 DACLPS: DAC Low-Power Voltage State Select bit 1 = DAC Positive reference source selected 0 = DAC Negative reference source selected bit 5 DACOE: DAC Voltage Output Enable bit 1 = DAC voltage level is also an output on the DACOUT pin 0 = DAC voltage level is disconnected from the DACOUT pin bit 4 Unimplemented: Read as ‘0’ bit 3-2 DACPSS<1:0>: DAC
-n/n = Value at POR and BOR/Value at all other Resets ‘1’ = Bit is set ‘0’ = Bit is cleared bit 7 DACEN: DAC Enable bit 1 = DAC is enabled 0 = DAC is disabled bit 6 DACLPS: DAC Low-Power Voltage State Select bit 1 = DAC Positive reference source selected 0 = DAC Negative reference source selected bit 5 DACOE: DAC Voltage Output Enable bit 1 = DAC voltage level is also an output on the DACOUT pin 0 = DAC voltage level is disconnected from the DACOUT pin bit 4 Unimplemented: Read as 0’ bit 3-2 DACPSS<1:0>: DAC
_________Detailed Description 8 The MAX186/MAX188 use a successive-approximation 12-BIT CAPACITIVE DAC conversion technique and input track/hold (T/H) circuit- VREF 1 ry to convert an analog signal to a 12-bit digital output. INPUT CHOLD COMPARATOR X MUX – + ZERO A flexible serial interface provides
AND EXAMPLES (S19A-G-002-06) 8: HARDWARE ABSTRACTION LAYER (HAL) 8.2.3 Color Manipulation int seGetDac(int device, BYTE *pDac) Description: Reads the entire DAC into an array. Parameter: device - registered device ID pDac - pointer to an array of BYTE dac[256][3] dac[x][0] == RED component dac[x][1]
AINA21/PR5 HDMI_PON HDMI_PON O O HDMI Power Supply (MN864788A) 155 T32A11INC0/T32A11INA0/AINA22/PR6 DAC_PON ---- O O DAC Power Supply 156 T32A11INC1/T32A11INB0/AINA23/PR7 DSP_PON ---- O O DSP, DIR, DAC, DAB (A670) Power IC 157 AVDD3 +3.3M ---- -------- --- 158 AVSS DGND ---- -------- --- 159 DAC0/PT0
.2) TWDx TWIx Two-wire Serial Data I/O – – – TWCKx TWIx Two-wire Serial Clock I/O – – – Analog ADC, DAC and Analog VREFP Analog – – – Comparator Positive Reference ADC, DAC and Analog VREFN Comparator Negative Reference Analog – – – Must be connected to GND or GNDANA. 12-bit Analog Front End - (x=[0..1
the DAC function is enabled. Integrated Gigabit Ethernet Controller for PCI Exp49ss Track ID: JATR-1076-21 Rev. 1.0 RTL8111B/RTL8168B Registers Datasheet 5.7.3. Message Control Table 45. Message Control Bits RW Field Description 15::8 RO Reserved Reserved. Always return 0 7 RO 64-bit address capable 1: DAC is enabled 0: No DAC The value of this bit is the same as the DAC bit (bit4 in C+CR register). The initial value of this bit comes from EEPROM auto-load to the DAC bit in the C+CR register. 6::4 RW
PORTA Port A Configuration 0x0600 ADC0 Analog to Digital Converter/Peripheral Touch Controller 0x06A0 DAC0 Digital to Analog Converter 0 0x0670 AC0 Analog Comparator 0x0680 DAC0 Digital to Analog Converter 0x0800 USART0 Universal Synchronous Asynchronous Receiver Transmitter 0x0810 TWI0 Two Wire Interface
