Gast
#888824
Hallo, ich hab alle eingänge von mein FPGA benutzt und nun kommt diese Fehlermeldung. Komme einfach nicht mehr weiter. Kann mir da jemand sagen, was ich tun muss? ERROR:Place:866 - Not enough valid sites to place the following IOBs: IO Standard: Name = LVCMOS25, VREF = NR, VCCO = 2.50, TERM = NONE Module_CLK This may be due to either an insufficient number of sites available on the device, too many prohibited sites, or incompatible I/O Standards locked or range constrained to I/O Banks with valid sites. This situation could possibly be resolved by one (or all) of the following actions: a) Grouping IOBs of similar standards into a minimum amount of I/O Banks by using LOC or range constraints. b) Maximizing available I/O Banks resources for special IOBs by choosing lower capacity I/O Banks if possible. c) If applicable, decreasing the number of user prohibited sites or using a larger device.