Problem mit negativem Index

-- Elemente und Index des Heaps bzw. des Dualport-RAM's

subtype element is std_logic_vector (data_width_heap - 1 downto 0);

subtype negativ_index is std_logic_vector (address_width_heap - 1 downto -1);

subtype index is std_logic_vector (address_width_heap - 1 downto 0);

process_buildheap : process (clock_heap, start_buildheap)

variable v : index;         -- z.B. 8 Bit positive  

variable i : negativ_index; -- 1 bit grösser, i kann negative werden

begin 

  -- v := n/2-1;

  -- for i in v downto 0 loop

    -- downheap(i);

   -- end loop;

    if rising_edge(clock_heap) then

  if start_buildheap = '1' then

  case buildheap_state is

    when zero =>   buildheap_valid <= '0';

    -- n und v sind z.B. 8 Bit

    -- v := n/2-1

  v := std_logic_vector(to_unsigned(to_integer(unsigned(n))/2-1,address_width_heap));

          buildheap_state <= first;

    when first =>  -- 8 Bit an 9 Bit zuweisen mit Slice ?

                  i (address_width_heap-2 downto -1) := v;

                  buildheap_state <= second;

                  -- Start of loop

    when second => -- Prüfe ob negative

                  if to_integer(unsigned(i)) >= 0 then

                    -- downheap_input ist vom Typ index

                         downheap_input <= i (address_width_heap-2 downto -1);

                    start_downheap <= '1';

                            buildheap_state <= third;

                  else

                    -- Wenn negative

                    buildheap_state <= forth;

                  end if;

        when third => if downheap_valid = '1' then

                    start_downheap <= '0';

                    -- Von z.B. 9 Bit decrementieren

                    i := std_logic_vector(to_unsigned(to_integer(unsigned(i)) - 1,address_width_heap+1));

                         buildheap_state <= second;

                  end if;

                  -- End of loop

        when forth => buildheap_valid <= '1';

      end case;

    end if;

  end if;

  end process;