Gast
#1034435
Was läuft hier schief ? Erhalte ausser den Packer Warnings ansonsten nur
zwei "normale" Warnings. Würde mich jetzt gerne an das Testbed wagen.
Related source file is "E:/Programmieren/VHDL/EDA Design/Xilinx ISE
Projekte/HeapSort/HeapSortParallel.vhd".
WARNING:Xst:653 - Signal <write_enable_heap_internal> is used but never
assigned. This sourceless signal will be automatically connected to
value 1.
WARNING:Xst:653 - Signal <read_enable_heap_internal> is used but never
assigned. This sourceless signal will be automatically connected to
value 1.
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PACKER Warning: Lut Mcompar_holedownheap_state_cmp_lt0000_lut<1> driving
carry Mcompar_holedownheap_state_cmp_lt0000_cy<1> can not be packed with
the carry due to conflict with the common signal requirement between the
LUT inputs and the Carry DI/MAND pins. This would result in an extra LUT
for a feedthrough.
PACKER Warning: Lut Mcompar_holedownheap_state_cmp_lt0000_lut<4> driving
carry Mcompar_holedownheap_state_cmp_lt0000_cy<4> can not be packed with
the carry due to conflict with the common signal requirement between the
LUT inputs and the Carry DI/MAND pins. This would result in an extra LUT
for a feedthrough.
PACKER Warning: Lut Mcompar_downheap_state_cmp_lt0001_lut<1> driving
carry Mcompar_downheap_state_cmp_lt0001_cy<1> can not be packed with the
carry due to conflict with the common signal requirement between the LUT
inputs and the Carry DI/MAND pins. This would result in an extra LUT for
a feedthrough.
PACKER Warning: Lut Mcompar_downheap_state_cmp_lt0001_lut<4> driving
carry Mcompar_downheap_state_cmp_lt0001_cy<4> can not be packed with the
carry due to conflict with the common signal requirement between the LUT
inputs and the Carry DI/MAND pins. This would result in an extra LUT for
a feedthrough.