1 | #ifndef F_CPU
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2 | #define F_CPU 8000000UL
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3 | #endif
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4 | /** INCLUDES *********************************************************************************************************************/
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5 | #include <avr/interrupt.h>
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6 | #include <avr/sleep.h>
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7 | #include <avr/eeprom.h>
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8 | /** DEFINES **********************************************************************************************************************/
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9 | #define F_CPU 8000000UL
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10 | #define A0 0x04
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11 | #define CS1B 0x08
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12 | #define RST 0x10
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13 | #define DD_DOGM_PORT DDRB
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14 | //DOGM COMMANDS
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15 | #define LCD_ON 0xAF
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16 | #define LCD_OFF 0xAE
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17 | #define SET_PAGE 0xB0
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18 | #define SET_ADDRESS0 0x01
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19 | #define SET_ADDRESS1 0x00
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20 | #define NORMAL 0xA6
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21 | #define REVERSE 0xA7
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22 | #define ALL_OFF 0xA4
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23 | #define ALL_ON 0xA5
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24 | #define BIAS_SET_7 0xA3
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25 | #define BIAS_SET_9 0xA2
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26 | #define RESET 0xE2
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27 | #define MODE_SEL_NOR 0xC0
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28 | #define MODE_SEL_REV 0xC8
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29 | #define RES_SET 0x20
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30 | #define IND_ON_FL 0xAD01
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31 | #define IND_OFF_FL 0xAC01
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32 | #define IND_ON_NFL 0xAD00
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33 | #define IND_OFF_NFL 0xAC00
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34 | #define BOOST_SET_2 0xF800
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35 | #define BOOST_SET_5 0xF801
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36 | #define BOOST_SET_11 0xF802
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37 | #define PWR_SAVE 0x00
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38 | #define NOP 0xE3
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39 | /** MACROS ***********************************************************************************************************************/
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40 | #define SPI_WAITFOR() do { while ((SPSR & (1 << SPIF)) == 0) ; } while(0)
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41 | #define A0_HIGH() PORTB |= A0;_delay_us(50);
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42 | #define A0_LOW() PORTB &= ~A0;_delay_us(50);
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43 | #define RST_HIGH() PORTB |= RST;//_delay_us(50);
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44 | #define RST_LOW() PORTB &= ~RST;//_delay_us(50);
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45 | #define CS1B_HIGH() PORTB |= CS1B;_delay_us(50);
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46 | #define CS1B_LOW() PORTB &= ~CS1B;_delay_us(50);
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47 | /** VARIABLES ********************************************************************************************************************/
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48 | volatile uint8_t init[] = { 0x40 ,0xA1 ,0xC0 ,0xA6 ,0xA2 ,0x2F ,0xF8 ,0x00 ,0x23 ,0x81 ,0x1F ,0xAC ,0x00 ,0xAF };
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49 | volatile uint16_t k,h,i;
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50 | /** FUNCTIONS ********************************************************************************************************************/
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51 | void dogm132_spi_init(void) {
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52 | DDRB |= 0xFF/*(1<<PORTB3) | (1<<PORTB2) | (1<<PORTB4)*/;
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53 |
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54 | CS1B_HIGH();
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55 |
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56 | SPCR = 0;
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57 |
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58 | SPCR = (1<<SPE) | (1<<MSTR) | (1<<SPI2X) | (0<<DORD) | (1<<CPOL) | (1<<CPHA);
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59 |
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60 | uint8_t dummy = (SPSR);
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61 | dummy=dummy;
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62 | }
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63 | /**-----------------------------------------------------------------------------------------------------------------------------**/
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64 | void dogm132_transmit(uint8_t data){
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65 | CS1B_LOW();
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66 | SPDR = data;
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67 | SPI_WAITFOR();
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68 | CS1B_HIGH();
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69 | }/**-----------------------------------------------------------------------------------------------------------------------------**/
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70 | void dogm132_transmit_data(uint8_t data){
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71 | A0_HIGH();
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72 | dogm132_transmit(data);
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73 | A0_LOW();
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74 | }
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75 | /**-----------------------------------------------------------------------------------------------------------------------------**/
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76 | void dogm132_clear_lcd(void){
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77 | uint8_t i,h;
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78 | for(h=0;h<8;h++){
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79 | for(i=0;i<132;i++){
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80 | dogm132_transmit(SET_PAGE + h);
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81 | dogm132_transmit_data(0x00);
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82 | }
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83 | }
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84 | }
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85 | /**-----------------------------------------------------------------------------------------------------------------------------**/
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86 | void dogm_home(void){
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87 | dogm132_transmit(0x40);
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88 | dogm132_transmit(SET_PAGE);
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89 | dogm132_transmit(SET_ADDRESS0);
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90 | dogm132_transmit(SET_ADDRESS1);
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91 | }
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92 | /**-----------------------------------------------------------------------------------------------------------------------------**/
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93 | void dogm132_init(void){
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94 | uint8_t i;
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95 | RST_HIGH();
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96 | CS1B_LOW();
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97 | _delay_us(50);
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98 | RST_LOW();
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99 | _delay_us(50);
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100 | RST_HIGH();
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101 | _delay_ms(1);
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102 | for(i=0;i<14;i++){
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103 | dogm132_transmit(init[i]);
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104 | }
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105 | }
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106 | /** MAIN *************************************************************************************************************************/
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107 | int main(void){
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108 | DDRA = 0x03;
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109 | dogm132_spi_init();
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110 | dogm132_init();
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111 | for(i=0;i<8;i++){
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112 | dogm_home();
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113 | dogm132_clear_lcd();
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114 | }
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115 | _delay_ms(1000);
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116 | for(;;){
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117 | dogm_home();
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118 | for(h=0;h<10;h++){
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119 | for(i=0;i<4;i++){
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120 | for(k=0;k<132;k++){
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121 | dogm132_transmit(0xB0 | i);
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122 | dogm132_transmit_data(0xAA+i);
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123 | }
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124 | }
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125 | }
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126 | _delay_ms(250);
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127 | dogm_home();
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128 | for(h=0;h<10;h++){
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129 | for(i=0;i<4;i++){
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130 | for(k=0;k<44;k++){
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131 | dogm132_transmit(0xB0 | i);
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132 | dogm132_transmit_data(0xAA);
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133 | }
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134 | for(k=0;k<44;k++){
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135 | dogm132_transmit(0xB0 | i);
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136 | dogm132_transmit_data(0x18);
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137 | }
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138 | for(k=0;k<44;k++){
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139 | dogm132_transmit(0xB0 | i);
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140 | dogm132_transmit_data(0x81);
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141 | }
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142 | }
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143 | }
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144 | _delay_ms(250);
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145 | dogm_home();
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146 | for(h=0;h<10;h++){
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147 | for(i=0;i<4;i++){
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148 | for(k=0;k<132;k++){
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149 | dogm132_transmit(0xB0 | i);
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150 | dogm132_transmit_data(0x55+i);
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151 | }
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152 | }
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153 | }
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154 | _delay_ms(250);
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155 | }
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156 | }
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