1 | #include "ECan_Defs.h"
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2 |
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3 | unsigned int ecanInitFlags = ECAN_CONFIG_SAMPLE_THRICE & // Form value to be used
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4 | ECAN_CONFIG_PHSEG2_PRG_ON & // with CANInitialize
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5 | ECAN_CONFIG_STD_MSG &
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6 | ECAN_CONFIG_ALL_VALID_MSG &
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7 | ECAN_CONFIG_LINE_FILTER_OFF;
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8 |
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9 | unsigned int ecanSendFlags = ECAN_TX_PRIORITY_0 & // Form value to be used
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10 | ECAN_TX_STD_FRAME & // with CANSendMessage
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11 | ECAN_TX_NO_RTR_FRAME;
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12 |
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13 | void main()
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14 | {
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15 | unsigned char data[8] = {25,56};
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16 | unsigned long id = 0x100;
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17 |
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18 | id = id << 18;
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19 | // Set PLL: Fosc = ((Fin/PLLPRE)*PLLDIV)/PLLPOST = (((10MHz/2)*32)/2) = 80MHz
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20 | CLKDIV &= 0xFF00; // set PLLPRE and PLLPOST to 0. Fcy (device clk) is Fosc/2 = 40Mhz
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21 | PLLFBD = 0x001E; // set PLLDIV to 32
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22 |
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23 | AD1PCFGL = 0xFFFF; // Configure ADC inputs as digital inputs
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24 | AD1PCFGH = 0xFFFF; // for ADC1
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25 | AD2PCFGL = 0xFFFF; // Configure ADC inputs as digital inputs for ADC2
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26 |
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27 | // Clear Interrupt Flags
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28 | IFS0 = 0;
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29 | IFS1 = 0;
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30 | IFS2 = 0;
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31 | IFS3 = 0;
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32 | IFS4 = 0;
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33 |
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34 | // Enable ECAN2 Interrupt
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35 | IEC3bits.C2IE = 1; // enable ECAN2 interrupts
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36 | C2INTEbits.TBIE = 1; // enable ECAN2 tx interrupt
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37 | C2INTEbits.RBIE = 1; // enable ECAN2 rx interrupt
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38 |
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39 | // init dma channel 0 for dma to ecan peripheral data transfer
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40 | ECAN2DmaChannelInit(0, 1, &ECAN2RxTxRAMBuffer);
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41 | // init dma channel 2 for ecan peripheral to dma data transfer
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42 | ECAN2DmaChannelInit(2, 0, &ECAN2RxTxRAMBuffer);
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43 |
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44 | // setup ecan fifo
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45 | C2FCTRLbits.DMABS = 0x6; // set fifo buffer size to 32
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46 | C2FCTRLbits.FSA0 = 1; // set fifo start address to TRB5 buffer
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47 | C2FCTRLbits.FSA1 = 0;
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48 | C2FCTRLbits.FSA2 = 1;
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49 | C2FCTRLbits.FSA3 = 0;
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50 | C2FCTRLbits.FSA4 = 0;
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51 |
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52 | ECAN2Initialize(1, 8, 8, 8, 8, ecanInitFlags);
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53 |
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54 | ECAN2SetBufferSize(ECAN2RAMBUFFERSIZE);
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55 | ECAN2SelectTxBuffers(0x0001); // set transmit buffer to a size of four
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56 | ECAN2FilterEnable(0x0003);
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57 |
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58 | ECAN2SetOperationMode(ECAN_MODE_CONFIG, 0xFF); // enter config mode
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59 | ECAN2SetBaudRate(1, 8, 8, 8, 8, ecanInitFlags); // set baudrate to 100kbaud
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60 | ECAN2SetMask(ECAN_MASK_0, -1, ECAN_CONFIG_ALL_VALID_MSG); // set mask0
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61 | ECAN2SetMask(ECAN_MASK_1, 0, ECAN_CONFIG_ALL_VALID_MSG); // set mask1 for capture all msg in fifo
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62 | ECAN2SetMask(ECAN_MASK_2, 0, ECAN_CONFIG_ALL_VALID_MSG); // set mask2
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63 | ECAN2SetFilter(ECAN_FILTER_1, 0, ECAN_MASK_0, ECAN_RX_BUFFER_15, ECAN_CONFIG_STD_MSG); // accept all msg
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64 | ECAN2SetOperationMode(ECAN_MODE_NORMAL, 0xFF); // enter normal mode
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65 |
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66 | while(1) // endless loop
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67 | {
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68 | ECAN2Write(id,data,1,ecanSendFlags);
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69 | Delay_ms(100);
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70 | }
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71 |
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72 | return;
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73 | }
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74 |
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75 | void C2Interrupt(void) org 0x0084 // ECAN event iterrupt
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76 | {
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77 | IFS3bits.C2IF = 0; // clear ECAN interrupt flag
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78 | if(C2INTFbits.TBIF) { // was it tx interrupt?
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79 | C2INTFbits.TBIF = 0; // if yes clear tx interrupt flag
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80 | }
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81 |
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82 | if(C2INTFbits.RBIF) { // was it rx interrupt?
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83 | C2INTFbits.RBIF = 0; // if yes clear rx interrupt flag
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84 | }
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85 | }
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