Dreahimpulsgeber auswertung

// rotary encoder header

#define ENC_PORT    PORTC

#define ENC_DDR      DDRC

#define ENC_PIN      PINC

#define ENC_A      6

#define ENC_B      7

#define PHASE_A      (ENC_PIN & 1<<PC6)

#define PHASE_B      (ENC_PIN & 1<<PC7)

// abschnitt der init routine

ENC_DDR &= ~(1<<ENC_A) | ~(1<<ENC_B);  // rotary encoder pins as inout

ENC_PORT |= (1<<ENC_A) | (1<<ENC_B);  // pull ups on

uint8_t new = 0;

if(PHASE_A)

  new = 3;

if(PHASE_B)

  new ^= 1;

last = new;

enc_delta = 0;

TCCR1B = (1<<WGM12) | (1<<CS12) | (1<<CS10);  // CTC Mode, F_CPU/1024

OCR1A = (uint16_t)(F_CPU / 1024 * 1e-3 - 0.5);  // 1ms

TIMSK1 = (1<<OCIE1A);        // enable timer interrupt

// ISR

ISR(TIMER1_COMPA_vect)

{  

  int8_t new = 0, diff;

  if(PHASE_A)

    new = 3;

  if(PHASE_B)

    new ^= 1;            // convert gray to binary

  diff = last - new;          // difference last - new

  if(diff & 1)

  {                  // bit 0 = value (1)

    last = new;            // store new as next last

    enc_delta += (diff & 2) - 1;  // bit 1 = direction (+/-)

  }

  // 7 segment multiplexing

  switch(tr)

  {

    case 0:

      PORT_TRANS |= (1<<TRANS_4);

      PORT_DISP = digit[1];

      PORT_TRANS &= ~(1<<TRANS_1);

      tr = 1;

      break;

    case 1:

      PORT_TRANS |= (1<<TRANS_1);

      PORT_DISP = digit[0];

      PORT_TRANS &= ~(1<<TRANS_2);

      tr = 2;

      break;

    case 2:

      PORT_TRANS |= (1<<TRANS_2);

      PORT_DISP = digit[2];

      PORT_TRANS &= ~(1<<TRANS_3);

      tr = 3;

      break;

    case 3:

      PORT_TRANS |= (1<<TRANS_3);

      PORT_DISP = digit[3];

      PORT_TRANS &= ~(1<<TRANS_4);

      tr = 0;

      break;

  }

}

// regelmäßige Abfrage in der Hauptschleife:

tmr = (uint8_t)encode_read1();