1 | #include <stdint.h>
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2 |
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3 | void ADC_init(void){
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4 | /* Voltage Reference for the ADC: */
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5 | ADMUX |= (0<<REFS1) | (0<<REFS0); //AREF, Internal Vref turned off
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6 | //ADMUX |= (0<<REFS1) | (1<<REFS0); //AVcc with external capacitor at AREF pin
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7 | //ADMUX |= (1<<REFS1) | (1<<REFS0); //Internal 1.1V Voltage Reference with external capacitor at AREF pin
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8 |
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9 |
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10 | /* ADC Left Adjust Result: */
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11 | ADMUX |= (1<<ADLAR); //Write one to left adjust the result. Otherwise, the result is right adjusted.
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12 |
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13 |
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14 | /* ADC Control and Status Register A: */
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15 | /* ADC Auto Trigger Enable: */
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16 | ADCSRA |= (1<<ADATE); //When this bit is written to one, Auto Triggering of the ADC is enabled. The ADC will start a conversion on a positive edge of the selected trigger signal. The trigger source is selected by setting the ADC Trigger Select bits, ADTS in ADCSRB.
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17 |
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18 | /* ADC Interrupt Flag */
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19 |
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20 | /* ADC Interrupt Enable */
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21 | ADCSRA |= (1<<ADIE); //When this bit is written to one and the I-bit in SREG is set, the ADC Conversion Complete Interrupt is activated.
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22 |
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23 | /* ADC Prescaler Select Bits */
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24 | #ifndef ADC_PRESCALER
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25 | #define ADC_PRESCALER 128
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26 | #endif
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27 | #if ADC_PRESCALER == 2
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28 | ADCSRA |= (0<<ADPS2) | (0<<ADPS1) | (0<<ADPS0); //Division Factor: 2
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29 | #elif ADC_PRESCALER == 2
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30 | ADCSRA |= (0<<ADPS2) | (0<<ADPS1) | (1<<ADPS0); //Division Factor: 2
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31 | #elif ADC_PRESCALER == 4
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32 | ADCSRA |= (0<<ADPS2) | (1<<ADPS1) | (0<<ADPS0); //Division Factor: 4
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33 | #elif ADC_PRESCALER == 8
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34 | ADCSRA |= (0<<ADPS2) | (1<<ADPS1) | (1<<ADPS0); //Division Factor: 8
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35 | #elif ADC_PRESCALER == 16
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36 | ADCSRA |= (1<<ADPS2) | (0<<ADPS1) | (0<<ADPS0); //Division Factor: 16
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37 | #elif ADC_PRESCALER == 32
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38 | ADCSRA |= (1<<ADPS2) | (0<<ADPS1) | (1<<ADPS0); //Division Factor: 32
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39 | #elif ADC_PRESCALER == 64
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40 | ADCSRA |= (1<<ADPS2) | (1<<ADPS1) | (0<<ADPS0); //Division Factor: 64
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41 | #else
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42 | ADCSRA |= (1<<ADPS2) | (1<<ADPS1) | (1<<ADPS0); //Division Factor: 128
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43 | #endif
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44 |
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45 | /* ADC Control and Status Register B: */
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46 | /* ADC Auto Trigger Source */
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47 | ADCSRB |= (0<<ADTS2) | (0<<ADTS2) | (0<<ADTS2); //Trigger Source: Free Running mode
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48 | //ADCSRB |= (0<<ADTS2) | (0<<ADTS2) | (1<<ADTS2); //Trigger Source: Analog Comparator
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49 | //ADCSRB |= (0<<ADTS2) | (1<<ADTS2) | (0<<ADTS2); //Trigger Source: External Interrupt Request 0
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50 | //ADCSRB |= (0<<ADTS2) | (1<<ADTS2) | (1<<ADTS2); //Trigger Source: Timer/Counter0 Compare Match A
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51 | //ADCSRB |= (1<<ADTS2) | (0<<ADTS2) | (0<<ADTS2); //Trigger Source: Timer/Counter0 Overflow
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52 | //ADCSRB |= (1<<ADTS2) | (0<<ADTS2) | (1<<ADTS2); //Trigger Source: Timer/Counter1 Compare Match B
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53 | //ADCSRB |= (1<<ADTS2) | (1<<ADTS2) | (0<<ADTS2); //Trigger Source: Timer/Counter1 Overflow
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54 | //ADCSRB |= (1<<ADTS2) | (1<<ADTS2) | (1<<ADTS2); //Trigger Source: Timer/Counter1 Capture Event
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55 |
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56 | /* Digital Input Disable Register 0: */
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57 |
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58 | }
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59 |
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60 | void ADC_SetChannel(uint8_t channel){
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61 | if(0<= channel && channel <= 7){
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62 | /* ADC Multiplexer Selection Register */
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63 | //ADMUX |= (0<<MUX3) | (1<<MUX2) | (1<<MUX1) | (1<<MUX0);
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64 | ADMUX |= channel;
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65 | }
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66 | }
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67 |
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68 | void ADC_Enable(void){
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69 | /* ADC Control and Status Register A */
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70 | ADCSRA |= (1<<ADEN); //Writing this bit to one enables the ADC. By writing it to zero, the ADC is turned off. Turning the ADC off while a conversion is in progress, will terminate this conversion.
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71 | }
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72 |
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73 | void ADC_Disable(void){
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74 | /* ADC Control and Status Register A */
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75 | ADCSRA &= ~(1<<ADEN); //Writing this bit to one enables the ADC. By writing it to zero, the ADC is turned off. Turning the ADC off while a conversion is in progress, will terminate this conversion.
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76 | }
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77 |
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78 | void ADC_StartConversion(void){
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79 | /* ADC Control and Status Register A */
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80 | ADCSRA |= (1<<ADSC); //In Single Conversion mode, write this bit to one to start each conversion. In Free Running mode, write this bit to one to start the first conversion.
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81 | }
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82 |
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83 | uint8_t ADC_GetHData(void){
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84 | /* ADC Data Register - Highbyte*/
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85 | return ADCH;
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86 | }
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