Tiefpassfilter für QAM in VHDL -> Wie funktioniert dieser Code?

entity iq_demod is

  generic (   

    filter_shift  : natural  := 4;  -- left shift to scale output filter

    filter_rate   : natural  := 8   -- multiplier, filter A = rate/2**shift

    -- ...

  );

  port ( 

    -- ...

  );

end;

architecture RTL of iq_demod is    

  signal filterI, filterQ : signed(baseband_bits-1 downto 0);

  -- ...

begin

     if Rst = '1' then

      filterI <= (others => '0');

      filterq <= (others => '0');

      sumI    := (others => '0');

      sumQ    := (others => '0');

    elsif rising_edge(Clk) then

      if dump = '1' then -- Dump integrator, generate output

        -- Output lowpass

        filterI <= resize(

                     filterI  + ((signed'((sumI - filterI) * filter_rate)) sra filter_shift),

                     filterI'length);

        filterQ <= resize(

                     filterQ  + ((signed'((sumQ - filterQ) * filter_rate)) sra filter_shift),

                     filterQ'length);

        -- dump the integrator

        sumI := (others => '0');

        sumQ := (others => '0');

      end if;

      -- Integrate (or initialise, if it's the dump cycle)

      sumI := sumI + prodI;

      sumQ := sumQ + prodQ;

    end if;

  end process;

end;