AT91SAM7S, Chip Select wird nicht per Hardware gesetzt

[Rooney B. (rooney)]

Hallo!

Hat jemand vielleicht eine Ahnung warum beim AT91SAM7S das Chip Select 
nicht per Hardware gesetzt wird? Ich habe schon so ziemlich alles 
ausprobiert, aber es klappt nicht.
Ich möchte die PDC verwenden und hier wäre es nicht gerade sinnvoll, 
wenn ich das Chip Select per GPIO setzen würde.

Zur Info, ich verwende die Funktionen aus der AT91Lib.


Initialisierung der SPI Schnittstelle

AT91F_PIO_CfgPeriph(AT91C_BASE_PIOA, ((unsigned int) AT91C_PA13_MOSI) | ((unsigned int) AT91C_PA11_NPCS0) | ((unsigned int) AT91C_PA14_SPCK) | ((unsigned int) AT91C_PA12_MISO), 0);  

SPI_Configure(AT91C_BASE_SPI, AT91C_ID_SPI, AT91C_SPI_MSTR);
SPI_ConfigureNPCS(AT91C_BASE_SPI, 0, AT91C_SPI_BITS_8 | 2 << 8);
SPI_Enable(AT91C_BASE_SPI);

Senden der Daten über PDC

SPI_WriteBuffer(AT91C_BASE_SPI, hdlc.frame, hdlc.sizeByte);

[holger (Gast)]

Geklaut bei EFSL;)
Ist für ne SD Karte, aber vieleicht hilft es ja.
Das eine oder andere kannst du wohl wegwerfen.

  AT91PS_SPI pSPI      = AT91C_BASE_SPI;
  AT91PS_PIO pPIOA     = AT91C_BASE_PIOA;
  AT91PS_PMC pPMC      = AT91C_BASE_PMC;
  // not used: AT91PS_PDC pPDC_SPI  = AT91C_BASE_PDC_SPI;
  
  // disable PIO from controlling MOSI, MISO, SCK (=hand over to SPI)
  // keep CS untouched - used as GPIO pin during init
  pPIOA->PIO_PDR = AT91C_PA12_MISO | AT91C_PA13_MOSI | AT91C_PA14_SPCK; //  | NCPS_PDR_BIT;
  // set pin-functions in PIO Controller
  pPIOA->PIO_ASR = AT91C_PA12_MISO | AT91C_PA13_MOSI | AT91C_PA14_SPCK; /// not here: | NCPS_ASR_BIT;
  /// not here: pPIOA->PIO_BSR = NPCS_BSR_BIT;
  
  // set chip-select as output high (unselect card)
  pPIOA->PIO_PER  = NCPS_PDR_BIT; // enable GPIO of CS-pin
  pPIOA->PIO_SODR = NCPS_PDR_BIT; // set high
  pPIOA->PIO_OER  = NCPS_PDR_BIT; // output enable
  
  // enable peripheral clock for SPI ( PID Bit 5 )
  pPMC->PMC_PCER = ( (euint32) 1 << AT91C_ID_SPI ); // n.b. IDs are just bit-numbers
  
  // SPI enable and reset
  pSPI->SPI_CR = AT91C_SPI_SPIEN | AT91C_SPI_SWRST;
  
#ifdef FIXED_PERIPH
  // SPI mode: master, fixed periph. sel., FDIV=0, fault detection disabled
  pSPI->SPI_MR  = AT91C_SPI_MSTR | AT91C_SPI_PS_FIXED | AT91C_SPI_MODFDIS;
  // set PCS for fixed select
  // pSPI->SPI_MR &= 0xFFF0FFFF; // clear old PCS - redundant (AT91lib)
  pSPI->SPI_MR |= ( (SPI_MR_PCS<<16) & AT91C_SPI_PCS ); // set PCS
#else
  // SPI mode: master, variable periph. sel., FDIV=0, fault detection disabled
  // Chip-Select-Decoder Mode (write state of CS-Lines in TDR)
  pSPI->SPI_MR  = AT91C_SPI_MSTR | AT91C_SPI_MODFDIS | AT91C_SPI_PCSDEC ;
#endif
  
  // set chip-select-register
  // 8 bits per transfer, CPOL=1, ClockPhase=0, DLYBCT = 0
  // TODO: Why has CPOL to be active here and non-active on LPC2000?
  //       Take closer look on timing diagrams in datasheets.
  // not working pSPI->SPI_CSR[SPI_CSR_NUM] = AT91C_SPI_CPOL | AT91C_SPI_BITS_8 | AT91C_SPI_NCPHA;
  // not working pSPI->SPI_CSR[SPI_CSR_NUM] = AT91C_SPI_BITS_8 | AT91C_SPI_NCPHA;
  pSPI->SPI_CSR[SPI_CSR_NUM] = AT91C_SPI_CPOL | AT91C_SPI_BITS_8;
  // not working pSPI->SPI_CSR[SPI_CSR_NUM] = AT91C_SPI_BITS_8;
  
  // slow during init
  if_spiSetSpeed(0xFE); 
  
  // enable
  pSPI->SPI_CR = AT91C_SPI_SPIEN;

  /* Send 20 spi commands with card not selected */
  for(i=0;i<21;i++) {
    if_spiSend(iface,0xFF);
  }

  /* enable automatic chip-select */
  // reset PIO-registers of CS-pin to default
  pPIOA->PIO_ODR  = NCPS_PDR_BIT; // input
  pPIOA->PIO_CODR = NCPS_PDR_BIT; // clear
  // disable PIO from controlling the CS pin (=hand over to SPI)
  pPIOA->PIO_PDR = NCPS_PDR_BIT;
  // set pin-functions in PIO Controller (function NCPS for CS-pin)
  pPIOA->PIO_ASR = NCPS_ASR_BIT;
  pPIOA->PIO_BSR = NPCS_BSR_BIT;

[Martin (Gast)]

Hier eine Funktion für einen AT91SAM7S64:

void initspi ( unsigned int SCBR_VALUE )
{
  *AT91C_PMC_PCER = (1 << 5);              // Enable Peripheral Clock

  *AT91C_PIOA_ASR = AT91C_PA12_MISO  |     // Peripherie A
                    AT91C_PA13_MOSI  |
                    AT91C_PA14_SPCK  |
                    AT91C_PA11_NPCS0 ;

  *AT91C_PIOA_PDR = AT91C_PA12_MISO  |     // PIO abschalten
                    AT91C_PA13_MOSI  |     // Peripherie A ist aktiv
                    AT91C_PA14_SPCK  |
                    AT91C_PA11_NPCS0 ;

  *AT91C_SPI_MR   = AT91C_SPI_MSTR ;

  *AT91C_SPI_CSR  = SCBR_VALUE   << SCBR | // Serial Clock Baud Rate
                    AT91C_SPI_CPOL;


  *AT91C_SPI_CR   = AT91C_SPI_SPIEN ;      // Enable SPI
}

[Rooney B. (rooney)]

Vielen Dank, funktioniert jetzt!!!