XC9572XL kein CLK?

NET "CLK"          LOC = "P43";

NET "LED1"        LOC = "P20";

NET "RESET"      LOC = "P33";

entity alogic is 

  Port ( 

      CLK : in  STD_LOGIC;

      RESET : in  STD_LOGIC;

      LED1 : out  STD_LOGIC

      );

end alogic;

architecture Behavioral of alogic is

begin

  --Device process.

  process (RESET,CLK) begin

    --Reset signal detected.

    if RESET = '1' then

      LED1 <= '0';

    --Clock signal.

    elsif CLK'event and CLK = '1' then

      LED1 <= '1';

    end if;

  end process;

end Behavioral;