Xilinx ML505 SATA

Liebe Kollegen!

Ich möchte den SATA Eingang von meinem FPGA Board als Dateneingang 
nutzen. Das Programm ist kein Problem allerdings lässt sich das ganze 
nicht compilieren. Ich bekomme immer wieder den Fehler:

ERROR:Pack:1107 - Pack was unable to combine the symbols listed below 
into a
   single IOB component because the site type selected is not 
compatible.

   Further explanation:
   The component type is determined by the types of logic and the 
properties and
   configuration of the logic it contains. In this case an IO component 
of type
   IOB was chosen because the IO contains symbols and/or properties 
consistent
   with input, output, or bi-directional usage and contains no other 
symbols or
   properties that require a more specific IO component type. Please 
double
   check that the types of logic elements and all of their relevant 
properties
   and configuration options are compatible with the physical site type 
of the
   constraint.

   Summary:
   Symbols involved:
     BUF symbol "sata2_0_IBUF" (Output Signal = sata2_0_IBUF)
     PAD symbol "sata2<0>" (Pad Signal = sata2<0>)
   Component type involved: IOB
   Site Location involved: AB1
   Site Type involved: IPAD

1

NET "sata1[0]" LOC = W1;

2

NET "sata1[1]" LOC = Y1;

3

NET "sata1[2]" LOC = V2;

4

NET "sata1[3]" LOC = W2;

5

NET "sata2[0]" LOC = AB1;

6

NET "sata2[1]" LOC = AA1;

7

NET "sata2[2]" LOC = AC2;

8

NET "sata2[3]" LOC = AB2;

Kann mir jemand helfen!? Was muss ich machen, dass dieses *'%$%&$§$ 
Xilinx ISE das macht was ICH will und nicht was es sich gerade so 
überlegt???

Bussi
Sandy