Ich versuche einen std_logic_vector in ein array zu schreiben.
Warum bekommt ich immer wieder diesen Fehler????
ERROR:HDLCompiler:410 -
"E:\Schmid\2013_14_10_Lady_V6_5th_16Pixel_Reg_TTF\V6_Code\vhd\DDC264.vhd
" Line 161: Expression has 0 elements ; expected 16
1 | type t_data_DDC246 is array (0 to 59) of std_logic_vector (15 downto 0); -- aus einem Package
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2 |
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3 |
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4 | entity DDC264 is
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5 | Port ( clk : in STD_LOGIC;
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6 | ...
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7 | data_o : out t_data_DDC246);
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8 | end DDC264;
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9 |
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10 | -- code
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11 |
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12 | signal s_data : std_logic_vector (1023 downto 0);
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13 |
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14 | -- code
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15 |
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16 | end process;
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17 |
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18 | data_o(0) <= s_data (15 downto 0);
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19 | data_o(1) <= s_data (640 downto 655);
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20 | data_o(2) <= s_data (528 downto 543);
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21 | data_o(3) <= s_data (544 downto 559);
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22 | data_o(4) <= s_data (560 downto 575);
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23 | data_o(5) <= s_data (672 downto 687);
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24 |
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25 |
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26 | ...
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