1 | .area vectors(rom,rel)
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2 | __vectors::
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3 | ; you must use the .paddr directive so the correct form of the
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4 | ; function address (i.e. with the low bit ON) is used
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5 | .paddr _NMI_Handler ; NMI_Handler
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6 | .paddr _HardFault_Handler ; HardFault_Handler
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7 | .paddr _MemManage_Handler ; MemManage_Handler
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8 | .paddr _BusFault_Handler ; BusFault_Handler
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9 | .paddr _UsageFault_Handler ; UsageFault_Handler
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10 | .long 0 ; ARM RESERVED
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11 | .long 0
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12 | .long 0
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13 | .long 0
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14 | .paddr _SVC_Handler ; SVC_Handler
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15 | .paddr _DebugMon_Handler ; DebugMon_Handler
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16 | .long 0 ;
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17 | .paddr _PendSV_Handler ; PendSV_Handler
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18 | .paddr _SysTick_Handler ;
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19 | .paddr _WWDG_IRQ_Handler ;0
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20 | .paddr _PVD_IRQ_Handler ;1
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21 | .paddr _TAMPER_IRQ_Handler ;2
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22 | .paddr _RTC_IRQ_Handler ;3
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23 | .paddr _FLASH_IRQ_Handler ;4
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24 | .paddr _RCC_IRQ_Handler ;5
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25 | .paddr _EXTI0_IRQ_Handler ;6
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26 | .paddr _EXTI1_IRQ_Handler ;7
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27 | .paddr _EXTI2_IRQ_Handler ;8
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28 | .paddr _EXTI3_IRQ_Handler ;9
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29 | .paddr _EXTI4_IRQ_Handler ;10
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30 | .paddr _DMA1_Channel0_IRQ_Handler ;11
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31 | .paddr _DMA1_Channel1_IRQ_Handler ;12
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32 | .paddr _DMA1_Channel2_IRQ_Handler ;13
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33 | .paddr _DMA1_Channel3_IRQ_Handler ;14
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34 | .paddr _DMA1_Channel4_IRQ_Handler ;15
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35 | .paddr _DMA1_Channel5_IRQ_Handler ;16
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36 | .paddr _DMA1_Channel6_IRQ_Handler ;17
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37 | .paddr _ADC1_2_IRQ_Handler ;18
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38 | .paddr _ADC2_IRQ_Handler ;19
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39 | .paddr _ADC3_IRQ_Handler ;20
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40 | .paddr _ADC4_IRQ_Handler ;21
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41 | .paddr _ADC5_IRQ_Handler ;22
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42 | .paddr _EXIT9_5_IRQ_Handler ;23
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43 | .paddr _TIM1_BRK_IRQ_Handler ;24
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44 | .paddr _TIM1_UP_IRQ_Handler ;25
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45 | .paddr _TIM1_TRG_COM_IRQ_Handler ;26
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46 | .paddr _TIM1_CC_IRQ_Handler ;27
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47 | .paddr _TIM2_IRQ_Handler ;28
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48 | .paddr _TIM3_IRQ_Handler ;29
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49 | .paddr _TIM4_IRQ_Handler ;30
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50 | .paddr _I2C1_EV_IRQn_Handler ; 31,
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51 | .paddr _I2C1_ER_IRQn_Handler ; 32,
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52 | .paddr _I2C2_EV_IRQn_Handler ; 33,
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53 | .paddr _I2C2_ER_IRQn_Handler ; 34,
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54 | .paddr _SPI1_IRQn_Handler ; 35,
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55 | .paddr _SPI2_IRQn_Handler ; 36,
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56 | .paddr _USART1_IRQn_Handler ; 37,
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57 | .paddr _USART2_IRQn_Handler ; 38,
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58 | .paddr _EXTI15_10_IRQn_Handler ; 40,
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59 | .paddr _RTC_Alarm_IRQn_Handler ; 41,
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60 | .paddr _OTG_FS_WKUP_IRQn_Handler ; 42,
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61 | .paddr _DUMMYIRQ ; 43,
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62 | .paddr _DUMMYIRQ ; 44,
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63 | .paddr _DUMMYIRQ ; 45,
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64 | .paddr _DUMMYIRQ ; 46,
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65 | .paddr _DMA1_Stream7_IRQn_Handler ; 47,
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66 | .paddr _DUMMYIRQ ; 48,
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67 | .paddr _SDIO_IRQn_Handler ; 49,
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68 | .paddr _TIM5_IRQn_Handler ; 50,
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69 | .paddr _SPI3_IRQn_Handler ; 51,
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70 | .paddr _DUMMYIRQ ; 52,
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71 | .paddr _DUMMYIRQ ; 53,
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72 | .paddr _DUMMYIRQ ; 54,
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73 | .paddr _DUMMYIRQ ; 55,
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74 | .paddr _DMA2_Stream0_IRQn_Handler ; 56,
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75 | .paddr _DMA2_Stream1_IRQn_Handler ; 57,
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76 | .paddr _DMA2_Stream2_IRQn_Handler ; 58,
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77 | .paddr _DMA2_Stream3_IRQn_Handler ; 59,
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78 | .paddr _DMA2_Stream4_IRQn_Handler ; 60,
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79 | .paddr _DUMMYIRQ ; 61,
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80 | .paddr _DUMMYIRQ ; 62,
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81 | .paddr _DUMMYIRQ ; 63,
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82 | .paddr _DUMMYIRQ ; 64,
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83 | .paddr _DUMMYIRQ ; 65,
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84 | .paddr _DUMMYIRQ ; 66,
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85 | .paddr _OTG_FS_IRQn_Handler ; 67,
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86 | .paddr _DMA2_Stream5_IRQn_Handler ; 68,
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87 | .paddr _DMA2_Stream6_IRQn_Handler ; 69,
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88 | .paddr _DMA2_Stream7_IRQn_Handler ; 70,
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89 | .paddr _USART6_IRQn_Handler ; 71,
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90 | .paddr _I2C3_EV_IRQn_Handler ; 72,
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91 | .paddr _I2C3_ER_IRQn_Handler ; 73,
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92 | ; .long 0
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93 | ; .long 0
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94 | ; .long 0
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95 | ; .long 0
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96 | ; .long 0
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97 | ; .long 0
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98 | ; .long 0
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99 | .paddr _FPU_IRQn_Handler ; 81, SPI4 FEGKT
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100 | ; .long 0
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101 | ; .long 0
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102 | .paddr _SPI4_IRQn_Handler ; 84
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