SMT32F407: DMA -> GPIOD

volatile uint16_t sendbuffer[128];

void init_dma()

{

  static TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;

  static DMA_InitTypeDef DMA_InitStructure;

  static NVIC_InitTypeDef NVIC_InitStructure;

  RCC_PCLK1Config(RCC_HCLK_Div1);

  RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA2, ENABLE);

  RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM1, ENABLE);

  //Clear Flags

  DMA_ClearFlag(DMA2_Stream5, DMA_FLAG_FEIF5 | DMA_FLAG_DMEIF5 | DMA_FLAG_TEIF5 | DMA_FLAG_HTIF5 | DMA_FLAG_TCIF5);

  // DMA2 disable

  DMA_Cmd(DMA2_Stream5, DISABLE);

  DMA_DeInit(DMA2_Stream5);

  DMA_InitStructure.DMA_Channel = DMA_Channel_6;  // Stream 5 Channel 6 is TIM1_TRIG

  DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)&GPIOD->ODR;

  DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)0;

  DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral;

  DMA_InitStructure.DMA_BufferSize = 128;

  DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;

  DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;

  DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;

  DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;

  DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;

  DMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh;

  DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Enable;

  DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_Full;

  DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_INC16;

  DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;

  DMA_Init(DMA2_Stream5, &DMA_InitStructure);

  DMA_FlowControllerConfig(DMA2_Stream5, DMA_FlowCtrl_Memory);

  // Timebase

  TIM_TimeBaseStructure.TIM_Period = 1;

  TIM_TimeBaseStructure.TIM_Prescaler = 0;

  TIM_TimeBaseStructure.TIM_ClockDivision = TIM_CKD_DIV1;

  TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Down;

  TIM_TimeBaseStructure.TIM_RepetitionCounter = 0;

  TIM_TimeBaseInit(TIM1, &TIM_TimeBaseStructure);

  TIM_Cmd(TIM1, ENABLE);

  // Set and enable interrupt

  TIM_DMACmd(TIM1, TIM_DMA_Update, ENABLE);

  // set and enable interrupt

  DMA_ITConfig(DMA2_Stream5, DMA_IT_TC, ENABLE);

  NVIC_InitStructure.NVIC_IRQChannel = DMA2_Stream5_IRQn;

  NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;

  NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;

  NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;

  NVIC_Init(&NVIC_InitStructure);

}

void start_dma()

{

  DMA2_Stream5->M0AR = (uint32_t)&sendbuffer;

  DMA2->LIFCR = 0b111101;

  DMA2_Stream5->CR |= DMA_SxCR_EN;

  DMA_Cmd(DMA2_Stream5, ENABLE);

}

//----------------------------------------------------------------------------

void DMA2_Stream5_IRQHandler()

{

  DMA2->HIFCR = DMA_HIFCR_CTCIF5;

  GPIOA->BSRRL = GPIO_Pin_9;  // LED ON -> High Pegel

  return;

}