1 | void Timer_Configuration(void) {
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2 | /* TIM1 clock enable APB2 = 48MHz */
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3 | /* 15kHz PWM_fr = TIM_CLK_fr / (Prescaler + 1) / (Period + 1) TIM_CLK_fr = 48MHz */
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4 | TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
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5 | TIM_OCInitTypeDef TIM_OCInitStructure;
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6 |
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7 | /* Initialize basic structures to default */
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8 | TIM_TimeBaseStructInit(&TIM_TimeBaseStructure);
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9 | TIM_OCStructInit(&TIM_OCInitStructure);
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10 |
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11 | /* TIM4 Peripheral Configuration ----------------------------------------*/
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12 | /* TIM4 Slave Configuration: PWM1 Mode
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13 | * The TIM4 is running at:
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14 | (TIM1 frequency)/ ((TIM4 period +1)* (Repetition_Counter+1)) = 15KHz */
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15 |
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16 | TIM_TimeBaseStructure.TIM_Period = 1;
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17 | TIM_TimeBaseStructure.TIM_Prescaler = 0;
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18 | TIM_TimeBaseStructure.TIM_ClockDivision = 0;
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19 | TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_CenterAligned1;
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20 |
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21 | TIM_TimeBaseInit(TIM4, &TIM_TimeBaseStructure);
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22 |
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23 | TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;
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24 | TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
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25 | TIM_OCInitStructure.TIM_Pulse = TIM4->ARR-1;
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26 |
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27 | TIM_OC4Init(TIM4, &TIM_OCInitStructure);
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28 |
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29 | /* Slave Mode selection: TIM4 */
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30 | TIM_SelectSlaveMode(TIM4, TIM_SlaveMode_Gated);
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31 | TIM_SelectInputTrigger(TIM4, TIM_TS_ITR0);
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32 |
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33 | /* TIM1 Peripheral Configuration ----------------------------------------*/
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34 | /* Time Base configuration */
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35 | TIM_TimeBaseStructure.TIM_Prescaler = 0;
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36 | TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_CenterAligned1;
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37 | TIM_TimeBaseStructure.TIM_Period = 1600 - 1;
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38 | TIM_TimeBaseStructure.TIM_ClockDivision = 0;
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39 | TIM_TimeBaseStructure.TIM_RepetitionCounter = 0;
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40 |
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41 | TIM_TimeBaseInit(TIM1, &TIM_TimeBaseStructure);
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42 |
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43 | /* Channel 1, 2 and 3 Configuration in PWM mode */
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44 | TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;
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45 | TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
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46 | TIM_OCInitStructure.TIM_OutputNState = TIM_OutputNState_Enable;
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47 | TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;
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48 | TIM_OCInitStructure.TIM_OCNPolarity = TIM_OCNPolarity_Low;
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49 | TIM_OCInitStructure.TIM_OCIdleState = TIM_OCIdleState_Reset;
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50 | TIM_OCInitStructure.TIM_OCNIdleState = TIM_OCIdleState_Reset;
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51 |
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52 | TIM_OCInitStructure.TIM_Pulse = 0;
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53 | TIM_OC1Init(TIM1, &TIM_OCInitStructure);
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54 |
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55 | TIM_OCInitStructure.TIM_Pulse = 0;
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56 | TIM_OC2Init(TIM1, &TIM_OCInitStructure);
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57 |
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58 | TIM_OCInitStructure.TIM_Pulse = 0;
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59 | TIM_OC3Init(TIM1, &TIM_OCInitStructure);
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60 |
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61 | /* Master Mode selection */
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62 | TIM_SelectOutputTrigger(TIM1, TIM_TRGOSource_Update);
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63 |
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64 | /* Select the Master Slave Mode */
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65 | TIM_SelectMasterSlaveMode(TIM1, TIM_MasterSlaveMode_Enable);
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66 |
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67 | /* TIM enable counter */
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68 | TIM_Cmd(TIM1, ENABLE);
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69 | TIM_Cmd(TIM4, ENABLE);
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70 |
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71 | }
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72 |
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73 | void NVIC_Configuration(void) {
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74 | /* Configure and enable ADC interrupt */
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75 | NVIC_InitStructure.NVIC_IRQChannel = ADC1_2_IRQn;
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76 | NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
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77 | NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
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78 | NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
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79 | NVIC_Init(&NVIC_InitStructure);
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80 | }
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81 |
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82 | void DMA_Configuration(void) {
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83 | DMA_InitTypeDef DMA_InitStructure;
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84 | DMA_DeInit(DMA1_Channel1);
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85 | DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t) &(ADC1->DR);
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86 | DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t) ADCBuffer;
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87 | DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC;
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88 | DMA_InitStructure.DMA_BufferSize = 3;
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89 | DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
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90 | DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; // Disable only ADCBuffer[0]
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91 | DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;
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92 | DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;
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93 | DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;
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94 | DMA_InitStructure.DMA_Priority = DMA_Priority_High;
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95 | DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
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96 | DMA_Init(DMA1_Channel1, &DMA_InitStructure);
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97 |
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98 | /* Enable DMA1 channel1 */
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99 | DMA_Cmd(DMA1_Channel1, ENABLE);
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100 | }
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101 |
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102 | void ADC_Configuration(void) {
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103 | ADC_InitTypeDef ADC_InitStructure;
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104 | /* ADC1 configuration ------------------------------------------------------*/
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105 | ADC_InitStructure.ADC_Mode = ADC_Mode_Independent;
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106 | ADC_InitStructure.ADC_ScanConvMode = ENABLE;
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107 | ADC_InitStructure.ADC_ContinuousConvMode = DISABLE;
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108 | ADC_InitStructure.ADC_ExternalTrigConv = ADC_ExternalTrigConv_T4_CC4;
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109 | ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right;
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110 | ADC_InitStructure.ADC_NbrOfChannel = 3;
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111 | ADC_Init(ADC1, &ADC_InitStructure);
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112 |
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113 | /* ADC1 rchannel10-15 configuration 14Cycles = 1us, Tconv = 7.5 + 12.5 = 20 ca 5us*/
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114 | ADC_RegularChannelConfig(ADC1, ADC_Channel_10, 1, ADC_SampleTime_7Cycles5);
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115 | ADC_RegularChannelConfig(ADC1, ADC_Channel_14, 2, ADC_SampleTime_7Cycles5);
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116 | ADC_RegularChannelConfig(ADC1, ADC_Channel_15, 3, ADC_SampleTime_7Cycles5);
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117 |
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118 | /* Regular discontinuous mode channel number configuration */
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119 | ADC_DiscModeChannelCountConfig(ADC1, 1);
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120 | /* Enable regular discontinuous mode */
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121 | ADC_DiscModeCmd(ADC1, ENABLE);
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122 |
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123 | /* Enable ADC1 external trigger */
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124 | ADC_ExternalTrigConvCmd(ADC1, ENABLE);
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125 |
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126 | /* Enable EOC interrupt */
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127 | ADC_ITConfig(ADC1, ADC_IT_EOC, ENABLE);
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128 |
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129 | /* Enable ADC1 DMA */
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130 | ADC_DMACmd(ADC1, ENABLE);
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131 |
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132 | /* Enable ADC1 */
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133 | ADC_Cmd(ADC1, ENABLE);
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134 |
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135 | /* Enable ADC1 reset calibration register */
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136 | ADC_ResetCalibration(ADC1);
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137 | /* Check the end of ADC1 reset calibration register */
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138 | while (ADC_GetResetCalibrationStatus(ADC1)) {
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139 | }
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140 |
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141 | /* Start ADC1 calibration */
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142 | ADC_StartCalibration(ADC1);
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143 | /* Check the end of ADC1 calibration */
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144 | while (ADC_GetCalibrationStatus(ADC1)) {
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145 | }
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146 |
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147 | /* Start ADC1 Software Conversion */
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148 | ADC_SoftwareStartConvCmd(ADC1, ENABLE);
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149 | }
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150 |
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151 | void ADC1_2_IRQHandler(void) {
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152 | ADC_ClearITPendingBit(ADC1, ADC_IT_EOC);
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153 | GPIOA->ODR ^= GPIO_Pin_2;
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154 |
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155 | }
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