Schönen guten Abend! Kennt / benutzt jemand die Student Edition von Aldec Active HDL? http://www.aldec.com/education/students Ich interessier mich dafür besonders wegen der graphischen Eingabemöglichkeiten (Bolckdiagramme, FSM-Editor). Welche Einschränkungen gibt es da gegenüber der Vollversion? Ist das trotzdem brauchbar? Viele Grüße Stephan
Ich habs gerade mal installiert, zum Reinschnuppern ;-) Die Release Notes verraten folgende:
1 | Active-HDL 7.2 Student Edition Limitations |
2 | This Student Edition of Active-HDL 7.2 provides the following limitations in comparison to features available in a regular version: |
3 | |
4 | Network installation is not available |
5 | Number of designs in a workspace is restricted to 1 design |
6 | Simulation performance: decreased x20, up to 500 instances |
7 | SystemVerilog and Accelerated Verilog simulation technology (SLP) is disabled |
8 | Off-line simulation (Post Simulation Debug) is disabled |
9 | Co-simulation of Handel-C blocks is disabled |
10 | Simulation of EDIF netlists is disabled |
11 | Batch mode (VSimSA) is not available |
12 | Testbench generation with results comparison in VHDL and Verilog is disabled |
13 | Testbench generation for VHDL and Verilog state machines is disabled |
14 | Block Diagram Editor can contain up to 30 symbols/fubs |
15 | State Diagram Editor can contain up to 30 states |
16 | Comparison of simulation results saved in AWF files is disabled in the GUI and the command line |
17 | Specification of custom stimuli saved in ASDB or VCD files is disabled |
18 | Import of all third-party projects is disabled |
19 | The Export to HTML/PDF option allows exporting block and state diagram that contain up to 30 symbols/fubs and 30 states, export of images to vector graphics is unavailable |
20 | Vendor simulation/schematic libraries are not installed |
21 | Additionally, the following options and tools are not available or limited |
22 | Accelerated Waveform Viewer |
23 | Advanced Dataflow Viewer |
24 | Advanced PDF Export |
25 | BDE Library Conversion |
26 | C Code Debug |
27 | Code Coverage, Expression Coverage, and Toggle Coverage |
28 | Code2Graphics Conversion Wizard |
29 | Conversion tools for the Standard and Accelerated Waveform Viewer |
30 | Design Flow Manager supports only the latest versions of the following tools: |
31 | HDL Synthesis |
32 | 1. Mentor Graphics LeonardoSpectrum (incl. OEM editions) |
33 | 2. Mentor Graphics Precision RTL Synthesis (incl. OEM editions) |
34 | 3. Synplicity Synplify / Synplify Pro / Synplify Premier / Synplify Premier with Design Planner (incl. OEM editions) |
35 | 3. Xilinx XST VHDL/Verilog (incl. available service packs) |
36 | Implementation |
37 | 1. Actel Designer |
38 | 2. Altera Quartus II |
39 | 3. Lattice ispLEVER (incl. available service packs) |
40 | 4. QuickLogic QuickWorks |
41 | 5. Xilinx ISE/WebPack (incl. available service packs) |
42 | |
43 | Refer to the Multivendor Flowchart topic in the Active-HDL on-line documentation or the Release Notes for the detailed information about versions of supported synthesis and implementation tools. |
44 | |
45 | Design Profiler |
46 | Follow Object |
47 | HDE Actions Recorder/Player |
48 | LINT in VHDL and Verilog |
49 | Memory Viewer |
50 | Multi-process code generation for state machines |
51 | PLI/VHPI/VPI Wizard |
52 | Print Manager |
53 | Server Farm Integration |
54 | Third-party interfaces: |
55 | - Denali Memory Interface |
56 | - Debussy Interface |
57 | - Cover and DVM Interface |
58 | - Source Revision Control Interface |
59 | - SWIFT Interface |
60 | VHDL Signal Agent |
61 | Xtrace |
Danke für deine spontane Experimentierfreudigkeit! Ich wollte es nicht gleich selber runterladen, weil mein Internetzugang zur Zeit nicht gerade breitbandig ist :-) Aber das klingt ja garnichtmal so schlimm. Für kleine CPLDs sollte es wohl reichen.
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