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Forum: FPGA, VHDL & Co. erstes CPLD/FPGA Projekt ...


Autor: chriss (Gast)
Datum:

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Hallo Zusammen!

Ich habe vor ca. 8Jahren einmal VHDL in einem Labor programmiert seitdem 
ist leider viel Zeit vergangen. Nun möchte ich einen CPLD/FPGA (Lattice 
MachXO ist ja was daszischen ;) ) also Levelshifter in einem 
Datenadressbus einsetzten.
Die Datenleitungen D[15..0] sind auf 1.8V Pegel die Datenleitungen 
D_LS[15..0] sind auf 3.3V Pegeln und gehen zu einem Ethernet Chip. (1.8V 
seite liegt die CPU).

naja nun hab ich versucht das ganze in VHDL zu schreiben, nur leider 
klappt es nicht so recht. Wenn der CPLD an die spannung angelegt wird 
treibt er den D - Bus auf 0 (alle 16pins!). geb ich die spannung weg 
sind die Pins High Z.

Vielleicht kann mir wer helfen bzw. einen Tipp geben? Danke

VHDL-Code: (signals TEST, TEST1 hab ich zum schluss hinzugefügt, vorher 
hab ich es direkt verbunden)
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;

entity Eth_LevelShifter is
       port(
            D, D_LS: inout std_logic_vector(0 to 15);
            CS4, OE, RW, INT_LS, wai: in std_logic;
            CS4_LS, OE_LS, RW_LS, INT, wait_LS: out std_logic);
end Eth_LevelShifter;

architecture LevelShifter of Eth_LevelShifter is

signal TEST : std_logic_vector(0 to 15);
signal TEST1: std_logic_vector(0 to 15);
begin
     databuf: process(CS4, RW)
     begin
  TEST <= D;
  TEST1 <= D_LS;
     if CS4 = '0' then
      if RW = '0' then
       D <= "ZZZZZZZZZZZZZZZZ";
       D_LS <= TEST;
      else
       D_LS <= "ZZZZZZZZZZZZZZZZ";
       D <= TEST1;
      end if;
     else
      D <= "ZZZZZZZZZZZZZZZZ";
      D_LS <= "ZZZZZZZZZZZZZZZZ";
     end if;
     end process databuf;

     csbuf: process (CS4)
      begin
       if CS4='0' then
        CS4_LS <= '0';
       else
        CS4_LS <= '1';
       end if;
     end process csbuf;

     process (OE)
     begin
      if OE='0' then
       OE_LS <= '0';
      else
       OE_LS <= '1';
      end if;
     end process;

     process (RW)
     begin
      if RW='0' then
       RW_LS <= '0';
      else
       RW_LS <= '1';
      end if;
     end process;

     process (INT_LS)
     begin
      if INT_LS='0' then
       INT <= '0';
      else
       INT <= '1';
      end if;
     end process;
    
     wait_buf: process (wai)
  begin
    if wai='0' then
      wait_LS <= '0';
    else
      wait_LS <= '1';
    end if;
  end process wait_buf;
end LevelShifter;

statt "KEEPER" hab ich auch schon "NONE" probiert
OMMERCIAL ;
BLOCK RESETPATHS ;
BLOCK ASYNCPATHS ;
LOCATE COMP "D(0)" SITE "20" ;
LOCATE COMP "D(1)" SITE "21" ;
LOCATE COMP "D(10)" SITE "37" ;
LOCATE COMP "D(11)" SITE "38" ;
LOCATE COMP "D(12)" SITE "39" ;
LOCATE COMP "D(13)" SITE "43" ;
LOCATE COMP "D(14)" SITE "44" ;
LOCATE COMP "D(15)" SITE "45" ;
LOCATE COMP "D(2)" SITE "22" ;
LOCATE COMP "D(3)" SITE "23" ;
LOCATE COMP "D(4)" SITE "27" ;
LOCATE COMP "D(5)" SITE "29" ;
LOCATE COMP "D(6)" SITE "30" ;
LOCATE COMP "D(7)" SITE "32" ;
LOCATE COMP "D(8)" SITE "34" ;
LOCATE COMP "D(9)" SITE "36" ;
LOCATE COMP "D_LS(0)" SITE "81" ;
LOCATE COMP "D_LS(1)" SITE "80" ;
LOCATE COMP "D_LS(10)" SITE "69" ;
LOCATE COMP "D_LS(11)" SITE "68" ;
LOCATE COMP "D_LS(12)" SITE "67" ;
LOCATE COMP "D_LS(13)" SITE "66" ;
LOCATE COMP "D_LS(14)" SITE "65" ;
LOCATE COMP "D_LS(15)" SITE "64" ;
LOCATE COMP "D_LS(2)" SITE "79" ;
LOCATE COMP "D_LS(3)" SITE "78" ;
LOCATE COMP "D_LS(4)" SITE "77" ;
LOCATE COMP "D_LS(5)" SITE "76" ;
LOCATE COMP "D_LS(6)" SITE "73" ;
LOCATE COMP "D_LS(7)" SITE "72" ;
LOCATE COMP "D_LS(8)" SITE "71" ;
LOCATE COMP "D_LS(9)" SITE "70" ;
LOCATE COMP "CS4" SITE "8" ;
LOCATE COMP "RW" SITE "5" ;
LOCATE COMP "CS4_LS" SITE "96" ;
LOCATE COMP "INT" SITE "50" ;
LOCATE COMP "OE_LS" SITE "100" ;
LOCATE COMP "RW_LS" SITE "99" ;
IOBUF PORT "CS4_LS" IO_TYPE=LVCMOS33 DRIVE=8 PULLMODE=NONE SLEWRATE=FAST OPENDRAIN=OFF INF=OFF ;
IOBUF PORT "OE_LS" IO_TYPE=LVCMOS33 DRIVE=8 PULLMODE=NONE SLEWRATE=FAST OPENDRAIN=OFF INF=OFF ;
IOBUF PORT "RW_LS" IO_TYPE=LVCMOS33 DRIVE=8 PULLMODE=NONE SLEWRATE=FAST OPENDRAIN=OFF INF=OFF ;
IOBUF PORT "D_LS(0)" IO_TYPE=LVCMOS33 DRIVE=8 PULLMODE=KEEPER SLEWRATE=FAST OPENDRAIN=OFF INF=OFF ;
IOBUF PORT "D_LS(1)" IO_TYPE=LVCMOS33 DRIVE=8 PULLMODE=KEEPER SLEWRATE=FAST OPENDRAIN=OFF INF=OFF ;
IOBUF PORT "D_LS(10)" IO_TYPE=LVCMOS33 DRIVE=8 PULLMODE=KEEPER SLEWRATE=FAST OPENDRAIN=OFF INF=OFF ;
IOBUF PORT "D_LS(11)" IO_TYPE=LVCMOS33 DRIVE=8 PULLMODE=KEEPER SLEWRATE=FAST OPENDRAIN=OFF INF=OFF ;
IOBUF PORT "D_LS(12)" IO_TYPE=LVCMOS33 DRIVE=8 PULLMODE=KEEPER SLEWRATE=FAST OPENDRAIN=OFF INF=OFF ;
IOBUF PORT "D_LS(13)" IO_TYPE=LVCMOS33 DRIVE=8 PULLMODE=KEEPER SLEWRATE=FAST OPENDRAIN=OFF INF=OFF ;
IOBUF PORT "D_LS(14)" IO_TYPE=LVCMOS33 DRIVE=8 PULLMODE=KEEPER SLEWRATE=FAST OPENDRAIN=OFF INF=OFF ;
IOBUF PORT "D_LS(15)" IO_TYPE=LVCMOS33 DRIVE=8 PULLMODE=KEEPER SLEWRATE=FAST OPENDRAIN=OFF INF=OFF ;
IOBUF PORT "D_LS(2)" IO_TYPE=LVCMOS33 DRIVE=8 PULLMODE=KEEPER SLEWRATE=FAST OPENDRAIN=OFF INF=OFF ;
IOBUF PORT "D_LS(3)" IO_TYPE=LVCMOS33 DRIVE=8 PULLMODE=KEEPER SLEWRATE=FAST OPENDRAIN=OFF INF=OFF ;
IOBUF PORT "D_LS(4)" IO_TYPE=LVCMOS33 DRIVE=8 PULLMODE=KEEPER SLEWRATE=FAST OPENDRAIN=OFF INF=OFF ;
IOBUF PORT "D_LS(5)" IO_TYPE=LVCMOS33 DRIVE=8 PULLMODE=KEEPER SLEWRATE=FAST OPENDRAIN=OFF INF=OFF ;
IOBUF PORT "D_LS(6)" IO_TYPE=LVCMOS33 DRIVE=8 PULLMODE=KEEPER SLEWRATE=FAST OPENDRAIN=OFF INF=OFF ;
IOBUF PORT "D_LS(7)" IO_TYPE=LVCMOS33 DRIVE=8 PULLMODE=KEEPER SLEWRATE=FAST OPENDRAIN=OFF INF=OFF ;
IOBUF PORT "D_LS(8)" IO_TYPE=LVCMOS33 DRIVE=8 PULLMODE=KEEPER SLEWRATE=FAST OPENDRAIN=OFF INF=OFF ;
IOBUF PORT "D_LS(9)" IO_TYPE=LVCMOS33 DRIVE=8 PULLMODE=KEEPER SLEWRATE=FAST OPENDRAIN=OFF INF=OFF ;
IOBUF PORT "CS4" IO_TYPE=LVCMOS18 DRIVE=NA PULLMODE=NONE SLEWRATE=FAST OPENDRAIN=OFF INF=OFF ;
IOBUF PORT "RW" IO_TYPE=LVCMOS18 DRIVE=NA PULLMODE=NONE SLEWRATE=FAST OPENDRAIN=OFF INF=OFF ;
IOBUF PORT "INT" IO_TYPE=LVCMOS18 DRIVE=8 PULLMODE=NONE SLEWRATE=FAST OPENDRAIN=OFF INF=OFF ;
IOBUF PORT "D(0)" IO_TYPE=LVCMOS18 DRIVE=8 PULLMODE=KEEPER SLEWRATE=FAST OPENDRAIN=OFF INF=OFF ;
IOBUF PORT "D(1)" IO_TYPE=LVCMOS18 DRIVE=8 PULLMODE=KEEPER SLEWRATE=FAST OPENDRAIN=OFF INF=OFF ;
IOBUF PORT "D(10)" IO_TYPE=LVCMOS18 DRIVE=8 PULLMODE=KEEPER SLEWRATE=FAST OPENDRAIN=OFF INF=OFF ;
IOBUF PORT "D(11)" IO_TYPE=LVCMOS18 DRIVE=8 PULLMODE=KEEPER SLEWRATE=FAST OPENDRAIN=OFF INF=OFF ;
IOBUF PORT "D(12)" IO_TYPE=LVCMOS18 DRIVE=8 PULLMODE=KEEPER SLEWRATE=FAST OPENDRAIN=OFF INF=OFF ;
IOBUF PORT "D(13)" IO_TYPE=LVCMOS18 DRIVE=8 PULLMODE=KEEPER SLEWRATE=FAST OPENDRAIN=OFF INF=OFF ;
IOBUF PORT "D(14)" IO_TYPE=LVCMOS18 DRIVE=8 PULLMODE=KEEPER SLEWRATE=FAST OPENDRAIN=OFF INF=OFF ;
IOBUF PORT "D(15)" IO_TYPE=LVCMOS18 DRIVE=8 PULLMODE=KEEPER SLEWRATE=FAST OPENDRAIN=OFF INF=OFF ;
IOBUF PORT "D(2)" IO_TYPE=LVCMOS18 DRIVE=8 PULLMODE=KEEPER SLEWRATE=FAST OPENDRAIN=OFF INF=OFF ;
IOBUF PORT "D(3)" IO_TYPE=LVCMOS18 DRIVE=8 PULLMODE=KEEPER SLEWRATE=FAST OPENDRAIN=OFF INF=OFF ;
IOBUF PORT "D(4)" IO_TYPE=LVCMOS18 DRIVE=8 PULLMODE=KEEPER SLEWRATE=FAST OPENDRAIN=OFF INF=OFF ;
IOBUF PORT "D(5)" IO_TYPE=LVCMOS18 DRIVE=8 PULLMODE=KEEPER SLEWRATE=FAST OPENDRAIN=OFF INF=OFF ;
IOBUF PORT "D(6)" IO_TYPE=LVCMOS18 DRIVE=8 PULLMODE=KEEPER SLEWRATE=FAST OPENDRAIN=OFF INF=OFF ;
IOBUF PORT "D(7)" IO_TYPE=LVCMOS18 DRIVE=8 PULLMODE=KEEPER SLEWRATE=FAST OPENDRAIN=OFF INF=OFF ;
IOBUF PORT "D(8)" IO_TYPE=LVCMOS18 DRIVE=8 PULLMODE=KEEPER SLEWRATE=FAST OPENDRAIN=OFF INF=OFF ;
IOBUF PORT "D(9)" IO_TYPE=LVCMOS18 DRIVE=8 PULLMODE=KEEPER SLEWRATE=FAST OPENDRAIN=OFF INF=OFF ;
LOCATE COMP "CS4_LS" SITE "96" ;
LOCATE COMP "D(0)" SITE "20" ;
LOCATE COMP "CS4" SITE "8" ;
LOCATE COMP "INT" SITE "50" ;
LOCATE COMP "RW_LS" SITE "99" ;
LOCATE COMP "OE_LS" SITE "100" ;
LOCATE COMP "D_LS(15)" SITE "64" ;
LOCATE COMP "D_LS(14)" SITE "65" ;
LOCATE COMP "D_LS(13)" SITE "66" ;
LOCATE COMP "D_LS(12)" SITE "67" ;
LOCATE COMP "D_LS(11)" SITE "68" ;
LOCATE COMP "D_LS(10)" SITE "69" ;
LOCATE COMP "D_LS(9)" SITE "70" ;
LOCATE COMP "D_LS(8)" SITE "71" ;
LOCATE COMP "D_LS(7)" SITE "72" ;
LOCATE COMP "D_LS(6)" SITE "73" ;
LOCATE COMP "D_LS(5)" SITE "76" ;
LOCATE COMP "D_LS(4)" SITE "77" ;
LOCATE COMP "D_LS(3)" SITE "78" ;
LOCATE COMP "D_LS(2)" SITE "79" ;
LOCATE COMP "D_LS(1)" SITE "80" ;
LOCATE COMP "D_LS(0)" SITE "81" ;
LOCATE COMP "D(15)" SITE "45" ;
LOCATE COMP "D(14)" SITE "44" ;
LOCATE COMP "D(13)" SITE "43" ;
LOCATE COMP "D(12)" SITE "39" ;
LOCATE COMP "D(11)" SITE "38" ;
LOCATE COMP "D(10)" SITE "37" ;
LOCATE COMP "D(9)" SITE "36" ;
LOCATE COMP "D(8)" SITE "34" ;
LOCATE COMP "D(7)" SITE "32" ;
LOCATE COMP "D(6)" SITE "30" ;
LOCATE COMP "D(5)" SITE "29" ;
LOCATE COMP "D(4)" SITE "27" ;
LOCATE COMP "D(3)" SITE "23" ;
LOCATE COMP "D(2)" SITE "22" ;
LOCATE COMP "D(1)" SITE "21" ;
LOCATE COMP "RW" SITE "5" ;
LOCATE COMP "INT_LS" SITE "63" ;
LOCATE COMP "OE" SITE "4" ;
LOCATE COMP "CS4_LS" SITE "96" ;
LOCATE COMP "D(0)" SITE "20" ;
LOCATE COMP "CS4" SITE "8" ;
LOCATE COMP "INT" SITE "50" ;
LOCATE COMP "RW_LS" SITE "99" ;
LOCATE COMP "OE_LS" SITE "100" ;
LOCATE COMP "D_LS(15)" SITE "64" ;
LOCATE COMP "D_LS(14)" SITE "65" ;
LOCATE COMP "D_LS(13)" SITE "66" ;
LOCATE COMP "D_LS(12)" SITE "67" ;
LOCATE COMP "D_LS(11)" SITE "68" ;
LOCATE COMP "D_LS(10)" SITE "69" ;
LOCATE COMP "D_LS(9)" SITE "70" ;
LOCATE COMP "D_LS(8)" SITE "71" ;
LOCATE COMP "D_LS(7)" SITE "72" ;
LOCATE COMP "D_LS(6)" SITE "73" ;
LOCATE COMP "D_LS(5)" SITE "76" ;
LOCATE COMP "D_LS(4)" SITE "77" ;
LOCATE COMP "D_LS(3)" SITE "78" ;
LOCATE COMP "D_LS(2)" SITE "79" ;
LOCATE COMP "D_LS(1)" SITE "80" ;
LOCATE COMP "D_LS(0)" SITE "81" ;
LOCATE COMP "D(15)" SITE "45" ;
LOCATE COMP "D(14)" SITE "44" ;
LOCATE COMP "D(13)" SITE "43" ;
LOCATE COMP "D(12)" SITE "39" ;
LOCATE COMP "D(11)" SITE "38" ;
LOCATE COMP "D(10)" SITE "37" ;
LOCATE COMP "D(9)" SITE "36" ;
LOCATE COMP "D(8)" SITE "34" ;
LOCATE COMP "D(7)" SITE "32" ;
LOCATE COMP "D(6)" SITE "30" ;
LOCATE COMP "D(5)" SITE "29" ;
LOCATE COMP "D(4)" SITE "27" ;
LOCATE COMP "D(3)" SITE "23" ;
LOCATE COMP "D(2)" SITE "22" ;
LOCATE COMP "D(1)" SITE "21" ;
IOBUF PORT "INT_LS" IO_TYPE=LVCMOS33 DRIVE=NA PULLMODE=NONE SLEWRATE=FAST OPENDRAIN=OFF INF=OFF ;
LOCATE COMP "INT_LS" SITE "63" ;
LOCATE COMP "RW" SITE "5" ;
IOBUF PORT "OE" IO_TYPE=LVCMOS18 DRIVE=NA PULLMODE=NONE SLEWRATE=FAST OPENDRAIN=OFF INF=OFF ;
LOCATE COMP "OE" SITE "4" ;
LOCATE COMP "wait_LS" SITE "97" ;
LOCATE COMP "wai" SITE "7" ;
IOBUF PORT "wait_LS" IO_TYPE=LVCMOS33 PULLMODE=NONE ;
IOBUF PORT "wai" IO_TYPE=LVCMOS18 PULLMODE=NONE ;

Autor: Johnsn (Gast)
Datum:

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Irgendwelche Warnings in der Synthese?

Autor: chriss (Gast)
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nein leider nichts ...
ich hab es auch schon mal mit symbols im schematic probiert, da gab es 
massig probleme, dann bin ich aber auf vhdl umgestiegen und er hat keine 
warnings bzg. errors ausgegeben.

sonst einen tipp?

Autor: Klaus Falser (kfalser)
Datum:

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Versuche es mal so :

D    <= D_LS when CS = '0' and RW = '1' else (others => 'Z');
D_LS <= D    when CS = '0' and RW = '0' else (others => 'Z');

RW_LS <= RW;
...

Das ganze außerhalb eines Prozesses.

Klaus

Autor: Klaus Falser (kfalser)
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Außerdem solltest Du Keeper deaktivieren!

Autor: chriss (Gast)
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Danke, für deinen Tipp, aber leider hab ich noch immer lauter lows auf 
den leitungen wenn der CPL aktiviert wird/ist.

hat noch wer eine idee?

danke
Gr
chriss

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