Gast
#733040
Hallo, ich habe ein Problem, ich weiß allerdings nicht, ob es an der hardware liegt oder am C-Code. Vielleicht kann mir ja jemand helfen. Beim ATMEGA128 ist noch der interne ozi aktiviert Pullups habe ich 10k hier der Code: #include <avr/io.h> #include "7segment.h" #define TAKT 1000000UL #define FAKTOR 41 #define TEILER 1 void init(unsigned char faktor, unsigned char teiler) { TWBR = faktor; TWSR = teiler; } void send_7segment(unsigned char adresse, unsigned char subadresse, unsigned char controlbits, unsigned char Daten_Digti1, unsigned char Daten_Digti2, unsigned char Daten_Digti3, unsigned char Daten_Digti4 ) { TWCR = (1<<TWINT) | (1<<TWSTA) | (1<<TWEN); // Startbedingung loop_until_bit_is_set(TWCR,TWINT); // warte bis fertig TWDR = adresse; // Adresse TWCR = (1<<TWINT) | (1<<TWEN); // senden loop_until_bit_is_set(TWCR,TWINT); // warte bis fertig TWDR = subadresse; // Subadresse TWCR = (1<<TWINT) | (1<<TWEN); // senden loop_until_bit_is_set(TWCR,TWINT); // warte bis fertig TWDR = controlbits; // Controlbits TWCR = (1<<TWINT) | (1<<TWEN); // senden loop_until_bit_is_set(TWCR,TWINT); // warte bis fertig TWDR = Daten_Digti1; // DIGIT1 TWCR = (1<<TWINT) | (1<<TWEN); // senden loop_until_bit_is_set(TWCR,TWINT); // warte bis fertig TWDR = Daten_Digti2; // DIGTI2 TWCR = (1<<TWINT) | (1<<TWEN); // senden loop_until_bit_is_set(TWCR,TWINT); // warte bis fertig TWDR = Daten_Digti3; // DIGIT3 TWCR = (1<<TWINT) | (1<<TWEN); // senden loop_until_bit_is_set(TWCR,TWINT); // warte bis fertig TWDR = Daten_Digti4; // DIGIT3 TWCR = (1<<TWINT) | (1<<TWEN); // senden loop_until_bit_is_set(TWCR,TWINT); // warte bis fertig TWCR = (1<<TWINT) | (1<<TWSTA) | (1<<TWEN); } void segment_init(unsigned char adresse, unsigned char subadresse, unsigned char controlbits) { TWCR = (1<<TWINT) | (1<<TWSTA) | (1<<TWEN); // Startbedingung loop_until_bit_is_set(TWCR,TWINT); // warte bis fertig TWDR = adresse; // Adresse TWCR = (1<<TWINT) | (1<<TWEN); // senden loop_until_bit_is_set(TWCR,TWINT); // warte bis fertig TWDR = subadresse; // Subadresse TWCR = (1<<TWINT) | (1<<TWEN); // senden loop_until_bit_is_set(TWCR,TWINT); // warte bis fertig TWDR = controlbits; // Controlbits TWCR = (1<<TWINT) | (1<<TWEN); // senden loop_until_bit_is_set(TWCR,TWINT); // warte bis fertig TWCR = (1<<TWINT) | (1<<TWSTA) | (1<<TWEN); } void main (void) { init (FAKTOR, TEILER); while (1){ segment_init (ADRESSE_7SEGMENT_SCHREIBEN, CONTROL_REGISTER_LED, DYN_B13_B24_12mA); send_7segment (ADRESSE_7SEGMENT_SCHREIBEN, DIGIT1, DYN_B13_B24_12mA, acht, acht, acht ,acht); } } und die 7segment.h #define ADRESSE_7SEGMENT_SCHREIBEN 0x70 #define ADRESSE_7SEGMENT_LESEN 0x71 #define CONTROL_REGISTER_LED 0x00 #define DIGIT1 0x01 #define DIGIT2 0x02 #define DIGIT3 0x03 #define DIGIT4 0x04 #define eins 0x06 #define zwei 0x5B #define drei 0x4F #define vier 0x66 #define fuenf 0x6D #define sechs 0x7D #define sieben 0x07 #define acht 0x7F #define neun 0x6F // following is for static mode #define STA_B13_B24_12mA 0x40 // blanked 1+3 and blanked 2+4 and current 12mA #define STA_B13_B24_06mA 0x20 // blanked 1+3 and blanked 2+4 and current 06mA #define STA_B13_B24_03mA 0x10 // blanked 1+3 and blanked 2+4 and current 03mA #define STA_NB13_B24_12mA 0x42 // not blanked 1+3 and blanked 2+4 and current 12mA #define STA_NB13_B24_06mA 0x22 // not blanked 1+3 and blanked 2+4 and current 06mA #define STA_NB13_B24_03mA 0x12 // not blanked 1+3 and blanked 2+4 and current 03mA #define STA_B13_NB24_12mA 0x44 // blanked 1+3 and not blanked 2+4 and current 12mA #define STA_B13_NB24_06mA 0x24 // blanked 1+3 and not blanked 2+4 and current 06mA #define STA_B13_NB24_03mA 0x14 // blanked 1+3 and not blanked 2+4 and current 03mA #define STA_12mA 0x46 // nothing blanked current 12mA #define STA_06mA 0x26 // nothing blanked current 06mA #define STA_03mA 0x16 // nothing blanked current 03mA // following is for dynamic mode #define DYN_B13_B24_12mA 0x41 // blanked 1+3 and blanked 2+4 and current 12mA #define DYN_B13_B24_06mA 0x21 // blanked 1+3 and blanked 2+4 and current 06mA #define DYN_B13_B24_03mA 0x11 // blanked 1+3 and blanked 2+4 and current 03mA #define DYN_NB13_B24_12mA 0x43 // not blanked 1+3 and blanked 2+4 and current 12mA #define DYN_NB13_B24_06mA 0x23 // not blanked 1+3 and blanked 2+4 and current 06mA #define DYN_NB13_B24_03mA 0x13 // not blanked 1+3 and blanked 2+4 and current 03mA #define DYN_B13_NB24_12mA 0x45 // blanked 1+3 and not blanked 2+4 and current 12mA #define DYN_B13_NB24_06mA 0x25 // blanked 1+3 and not blanked 2+4 and current 06mA #define DYN_B13_NB24_03mA 0x15 // blanked 1+3 and not blanked 2+4 and current 03mA #define DYN_12mA 0x47 // nothing blanked current 12mA #define DYN_06mA 0x27 // nothing blanked current 06mA #define DYN_03mA 0x17 // nothing blanked current 03mA