STM32F103C8T6 Boards
Aus der Mikrocontroller.net Artikelsammlung, mit Beiträgen verschiedener Autoren (siehe Versionsgeschichte)
Hauptsächlich aus China gibt es preiswerte STM32F103C8T6 Boards in 600 mil und 1300 mil Breite.
Pinbelegung
Nachfolgend die Pinbelegung beider Versionen:
Pin | Name | 600 mil | 1300 mil | Type | POR-Fct | Default | Remap |
1 | VBAT | 1 | 5 | S | VBAT | ||
2 | PC13-TAMPER- RTC(5) | 2 | 6 | I/O | PC13(6) | TAMPER-RTC | |
3 | PC14-OSC32_IN(5) | 3 | 7 | I/O | PC14(6) | OSC32_IN | |
4 | PC15- OSC32_OUT(5) | 4 | 8 | I/O | PC15(6) | OSC32_OUT | |
5 | OSC_IN | - | 9 | I | OSC_IN | PD0(7) | |
6 | OSC_OUT | - | 10 | O | OSC_OUT | PD1(7) | |
7 | NRST | - | - | I/O | NRST | ||
8 | VSSA | (19) | 3 | S | VSSA | ||
9 | VDDA | 38 | 2 | S | VDDA | ||
10 | PA0-WKUP | 5 | 11 | I/O | PA0 | WKUP/ USART2_CTS(9)/ ADC12_IN0/ TIM2_CH1_ ETR(9) | |
11 | PA1 | 6 | 12 | I/O | PA1 | USART2_RTS(9)/ ADC12_IN1/ TIM2_CH2(9) | |
12 | PA2 | 7 | 13 | I/O | PA2 | USART2_TX(9)/ ADC12_IN2/ TIM2_CH3(9) | |
13 | PA3 | 8 | 14 | I/O | PA3 | USART2_RX(9)/ ADC12_IN3/ TIM2_CH4(9) | |
14 | PA4 | 9 | 15 | I/O | PA4 | SPI1_NSS(9)/ USART2_CK(9)/ ADC12_IN4 | |
15 | PA5 | 10 | 16 | I/O | PA5 | SPI1_SCK(9)/ ADC12_IN5 | |
16 | PA6 | 11 | 17 | I/O | PA6 | SPI1_MISO(9)/ ADC12_IN6/ TIM3_CH1(9) | TIM1_BKIN |
17 | PA7 | 12 | 18 | I/O | PA7 | SPI1_MOSI(9)/ ADC12_IN7/ TIM3_CH2(9) | TIM1_CH1N |
18 | PB0 | 13 | 19 | I/O | PB0 | ADC12_IN8/ TIM3_CH3(9) | TIM1_CH2N |
19 | PB1 | 14 | 20 | I/O | PB1 | ADC12_IN9/ TIM3_CH4(9) | TIM1_CH3N |
20 | PB2 | - | 21 | I/O | PB2/BOOT1 | ||
21 | PB10 | 15 | 22 | I/O | PB10 | I2C2_SCL/ USART3_TX(9) | TIM2_CH3 |
22 | PB11 | 16 | 23 | I/O | PB11 | I2C2_SDA/ USART3_RX(9) | TIM2_CH4 |
23 | VSS_1 | 19 | 4 | S | VSS_1 | ||
24 | VDD_1 | (20) | (2) | S | VDD_1 | ||
25 | PB12 | 21 | 24 | I/O | PB12 | SPI2_NSS/ I2C2_SMBAl/ USART3_CK(9)/ TIM1_BKIN(9) | |
26 | PB13 | 22 | 25 | I/O | PB13 | SPI2_SCK/ USART3_CTS(9)/ TIM1_CH1N (9) | |
27 | PB14 | 23 | 26 | I/O | PB14 | SPI2_MISO/ USART3_RTS(9) TIM1_CH2N (9) | |
28 | PB15 | 24 | 27 | I/O | PB15 | SPI2_MOSI/ TIM1_CH3N(9) | |
29 | PA8 | 25 | 28 | I/O | PA8 | USART1_CK/ TIM1_CH1(9)/ MCO | |
30 | PA9 | 26 | 29 | I/O | PA9 | USART1_TX(9)/ TIM1_CH2(9) | |
31 | PA10 | 27 | 30 | I/O | PA10 | USART1_RX(9)/ TIM1_CH3(9) | |
32 | PA11 | 28 | 31 | I/O | PA11 | USART1_CTS/ CANRX(9)/ USBDM/ TIM1_CH4(9) | |
33 | PA12 | - | 32 | I/O | PA12 | USART1_RTS/ CANTX(9) /USBDP TIM1_ETR(9) | |
34 | PA13 | 29 | 33 | I/O | JTMS/SWDIO | PA13 | |
35 | VSS_2 | 14 | 4 | S | VSS_2 | ||
36 | VDD_2 | 20 | (2) | S | VDD_2 | ||
37 | PA14 | - | 34 | I/O | JTCK/SWCLK | PA14 | |
38 | PA15 | 30 | 35 | JTDI | TIM2_CH1_ ETR/ PA15 /SPI1_NSS | ||
39 | PB3 | 31 | 36 | I/O | JTDO | TIM2_CH2 / PB3 TRACESWO SPI1_SCK | |
40 | PB4 | 32 | 37 | I/O | JNTRST | TIM3_CH1/ PB4/ SPI1_MISO | |
41 | PB5 | 33 | 38 | I/O | PB5 | I2C1_SMBAl | TIM3_CH2 / SPI1_MOSI |
42 | PB6 | 34 | 39 | I/O | PB6 | I2C1_SCL(9)/ TIM4_CH1(9) | USART1_TX |
43 | PB7 | 35 | 40 | I/O | PB7 | I2C1_SDA(9)/ TIM4_CH2(9) | USART1_RX |
44 | BOOT0 | - | - | I | BOOT0 | ||
45 | PB8 | 36 | 41 | I/O | PB8 | TIM4_CH3(9) | I2C1_SCL / CANRX |
46 | PB9 | 37 | 42 | I/O | PB9 | TIM4_CH4(9) | I2C1_SDA/ CANTX |
47 | VSS_3 | 39 | 4 | S | VSS_3 | ||
48 | VDD_3 | (20) | (2) | S | VDD_3 |