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PDF
STM32F407VGT6.pdf
Res. EN EN N EN EN N EN EN BEN AEN rw rw rw rw rw rw rw rw rw rw rw rw Bit 31 Reserved, must be kept at reset value. Bit 30 OTGHSULPIEN: USB OTG HSULPI clock enable This bit is set and cleared by software. 0: USB OTG HS ULPI clock disabled 1: USB OTG HS ULPI clock enabled Bit 29 OTGHSEN: USB OTG HS clock
in „STM32F4 pointer Frage“ · Mikrocontroller und Digitale Elektronik ·
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PDF
STM32F429_Reference_Manual.pdf
RST RST RST RST RST RST RST rw rw rw rw rw rw rw rw rw rw rw rw Bits 31:30 Reserved, must be kept at reset value. Bit 29 OTGHSRST: USB OTG HS module reset This bit is set and cleared by software. 0: does not reset the USB OTG HS module 1: resets the USB OTG HS module Bits 28:26 Reserved, must be kept
in „USB-C Dual-Role-Device DRD mit integriertem OTG FS PHY“ · Mikrocontroller und Digitale Elektronik ·
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PDF
STM32_Reference_manual.pdf
RST RST RST RST RST RST RST rw rw rw rw rw rw rw rw rw rw rw rw Bits 31:30 Reserved, must be kept at reset value. Bit 29 OTGHSRST: USB OTG HS module reset This bit is set and cleared by software. 0: does not reset the USB OTG HS module 1: resets the USB OTG HS module Bits 28:26 Reserved, must be kept
in „STM32F4 Timer Triggered DMA SPI – NSS Problem“ · Mikrocontroller und Digitale Elektronik ·
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PDF
Testboard_KK32F7.PDF
OTG_FS_VBUS DISP DISP OTG_FS_ID OTG_FS_ID OTG_P OTG_P DAC1_OUT DAC1_OUT OTG_N OTG_N BACKL_EN BACKL_EN USB_FAULT USB_FAULT WAKE WAKE USB_EN USB_EN RESET# CS_TOUCH CS_TOUCH INT_TOUCH INT_TOUCH I2C2_SDA I2C2_SDA U_KK32F7_Sheet6 I2C2_SCL I2C2_SCL KK32F7_Sheet6.SchDoc USART3_TX USART3_TX RESET# RESET# USART3
in „STM32F7 Discovery Board“ · Mikrocontroller und Digitale Elektronik ·
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Datei
TM1637Display.cpp
"89"></td> <td id="LC89" class="blob-code blob-code-inner js-file-line"> </td> </tr> <tr> <td id="L90" class="blob-num js-line-number" data-line-number="90"></td> <td id="LC90" class="blob-code blob-code-inner js-file-line"> <span class="pl-c">// Write the data bytes</span></td> </tr> <tr> <td id="L91
in „7-Segmentanzeige an Atmega32“ · Mikrocontroller und Digitale Elektronik ·
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PDF
app187.pdf
or written to the slave devices. Due to the characteristics of the 1-Wire, when all devices respond at the same time, the result will be a logical AND of the bits sent. After the devices send the first bit of their ROM number, the master initiates the next bit and the devices then send the complement
in „1wire - Suchfunktion“ · Mikrocontroller und Digitale Elektronik ·
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PDF
JBT6K71-AS_A__v1.42_2006-02-07_E.PDF
VPL: Selects the polarity of the VLD signal. VLD = “0”: Low active. Display data write is enabled at low. Display data write is disabled at high. VLD = “1”: High active. Display data write is enabled at high. Display data write is disabled at low. EPL: Selects the polarity of the ENABLE signal. ENABLE = “0”: Low active. Display data write from the RGB bus is enabled at low. Display data write is disabled at high. ENABLE = “1”: High active. Display data write from the RGB bus is enabled at high. Display data write is disabled at low. DPL: Selects the polarity of the
in „LCD aus Benq EL71 Handy“ · Mikrocontroller und Digitale Elektronik ·
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PDF
ATMEGA_128.pdf
Working Registers + Peripheral Control Registers – Fully Static Operation – Up to 16 MIPS Throughput at 16 MHz – On-chip 2-cycle Multiplier Nonvolatile Program and Data Memories – 128K Bytes of In-System Reprogrammable Flash Endurance: 1,000 Write/Erase Cycles 8-bit – Optional Boot Code Section with Independent
in „ATMEGA128 Board im Neuhold Newsletter 2/2011“ · Mikrocontroller und Digitale Elektronik ·
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PDF
db_atmega8.pdf
than the current value of TCNT1. The result will then be that the counter will miss the Compare Match at the TOP value. The counter will then have to count to the MAX value (0xFFFF) and wrap around start- 90 ATmega8(L) 2486P–AVR–02/06 ATmega8(L) ing at 0x0000 before the Compare Match can occur. The OCR1A
in „ADC-Input und Auswahlverfahren“ · Mikrocontroller und Digitale Elektronik ·
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Datei
config-mod-LK511-mt7623n-BPiR2.txt
=y CONFIG_ATMEL=m CONFIG_PCI_ATMEL=m CONFIG_AT76C50X_USB=m CONFIG_WLAN_VENDOR_BROADCOM=y CONFIG_B43=m CONFIG_B43_BCMA=y CONFIG_B43_SSB=y CONFIG_B43_BUSES_BCMA_AND_SSB=y # CONFIG_B43_BUSES_BCMA is not set # CONFIG_B43_BUSES_SSB is not set CONFIG_B43
in „Linux Kernel 5.1.1. auf dem BPi-R2“ · PC Hard- und Software ·
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PDF
EN_UM_N32G45x_Series_User_Manual_V3.pdf
1.5 as the USB clock 01: The PLL clock is directly used as the USB clock 10: Divide the PLL clock by 2 as the USB clock 11: Divide the PLL clock by 3 as the USB clock 21:18 PLLMULFCT[3:0] PLL multiplication factor
in „ALLPOWERS S2000 PRO Reparaturhilfe“ · Mikrocontroller und Digitale Elektronik ·
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PDF
DM00135183.pdf
. Res. Res. Res. Res. RST Res. Res. Res. Res. Res. Res. RST rw rw Bits 31:8 Reserved, must be kept at reset value. Bit 7 OTGFSRST: USB OTG FS module reset Set and cleared by software. 0: does not reset the USB OTG FS module 1: resets the USB OTG FS module Bits 6:1 Reserved, must be kept at reset value
in „STM32F446 FMP I2C kein Open Drain möglich?!“ · Mikrocontroller und Digitale Elektronik ·
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PDF
Anleitung.pdf
MENU Senderempfang Sendereinstellungen Senderliste übertrag. Sie können die Senderliste auf einen USB-Speicher exportieren oder von dort importieren. ●● Von USB importieren: Hiermit importieren Sie eine Senderliste, die auf einem USB-Gerät gespeichert ist. ●● Auf USB exportieren: Hiermit können Sie
in „Möchte in mein Heimnetz streamen, weiss aber nicht wie. :-(“ · PC Hard- und Software ·
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PDF
A300_ATMEGA8xxx.pdf
nominally 2.56V or AV are provided On-chip. The volt- CC age reference may be externally decoupled at the AREF pin by a capacitor for better noise performance. 193 2486M–AVR–12/03 Figure 90. Analog to Digital Converter Block Schematic Operation ADC CONVERSION COMPLETE IRQ 8-BIT DATA BUS I I A A 15 0
in „atMega8-16 Au beschreiben“ · Mikrocontroller und Digitale Elektronik ·
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PDF
DM00031020.pdf
RST RST RST RST RST RST RST RST RST rw rw rw rw rw rw rw rw rw rw Bits 31:30 Reserved, must be kept at reset value. Bit 29 OTGHSRST: USB OTG HS module reset Set and cleared by software. 0: does not reset the USB OTG HS module 1: resets the USB OTG HS module Bits 28:26 Reserved, must be kept at reset value
in „fsmc am stm32f4“ · Mikrocontroller und Digitale Elektronik ·
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PDF
r_manuel.pdf
RST RST RST RST RST RST RST RST RST rw rw rw rw rw rw rw rw rw rw Bits 31:30 Reserved, must be kept at reset value. Bit 29 OTGHSRST: USB OTG HS module reset Set and cleared by software. 0: does not reset the USB OTG HS module 1: resets the USB OTG HS module Bits 28:26 Reserved, must be kept at reset value
in „Hilfe bei Programmierung STM32F407VG bei TIM1“ · Mikrocontroller und Digitale Elektronik ·
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PDF
AoE3_chapter9.pdf
unusual. It is a good idea to use transformers with multiple 130Vrms). taps on the primary (the Triad F-90X series, for example), At this point it may be helpful to look back at §1.7.16B, when available, for final adjustment of output voltage. where we first discussed the subject of ripple. In general, For
in „Labornetzgerät - Fragen zum Schaltplan“ · Analoge Elektronik und Schaltungstechnik ·
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Datei
openocd_log.txt
2026 23982 target.c:2600 target_read_u32(): address: 0x400e0a08, value: 0x00000001 Debug: 2027 23982 at91sam4.c:1454 efc_get_status(): Status: 0x00000001 (lockerror: 0, cmderror: 0, ready: 1) Debug: 2028 23982 at91sam4.c:2856 sam4_page_write(): Wr Page 90 @ phys address: 0x0040b400 Debug: 2029 24167 target.c
in „OpenOCD sehr langsam beim flashen“ · Mikrocontroller und Digitale Elektronik ·
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PDF
GCC_Tut_Test.pdf
Dokumentation der avr-libc. # Kommentare in Makefiles beginnen mit einem Doppelkreuz ... # ATmega8 at work MCU = atmega8 # oder MCU = atmega16 # oder MCU = at90s8535 # oder ... ... 1.6.2 Quellcode-Dateien eintragen Der Name der Quellcodedatei, welche die Funktion main en halt, wird hinter TARGET eingetragen
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PDF
u-blox-ATCommands_Manual__UBX-13002752_.pdf
13002752 - R25 Early Production Information 7 Network service Page 102 of 553 u-blox Cellular Modules - AT Commands Manual 7.23.2 Syntax Type Syntax Response Example Set AT+UCELLLOCK=<lock_mode>[,<BCCH_ OK AT+UCELLLOCK=0 ARFCN>[,<band1900>[,<UARFCN>, OK <PSC>[,<EARFCN>,<P-CID>]]]] AT+UCELLLOCK=2,90 OK AT+
in „GSM-Modul (SIM908) nur analoge Ausgänge für Anruf?“ · HF, Funk und Felder ·
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PDF
11000.pdf
CONTROL MCU IN SENSOR MODE AN1325 USING THE ST7 USB LOW-SPEED FIRMWARE V4.X AN1445 EMULATED 16-BIT SLAVE SPI AN1475 DEVELOPING AN ST7265X MASS STORAGE APPLICATION AN1504 STARTING A PWM SIGNAL DIRECTLY AT HIGH LEVEL USING THE ST7 16-BIT TIMER AN1602 16
in „Programmierung von ST72F321Bj9“ · Mikrocontroller und Digitale Elektronik ·
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PDF
atmega_328.pdf
2K Bytes Internal SRAM – Write/Erase Cycles: 10,000 Flash/100,000 EEPROM – Data retention: 20 years at 85°C/100 years at 25°C) Microcontroller – Optional Boot Code Section with Independent Lock Bits In-System Programming by On-chip Boot Program with 4/8/16/32K True Read-While-Write Operation – Programming
in „1 Wire mit Atmega328“ · Mikrocontroller und Digitale Elektronik ·
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PDF
onkyo_tx_nr_616_service_manual.pdf.pdf
MW*(10k) MP*,MG* MJJ MW*(9k) 1 89.9MHz 89.90MHz 89.90MHz 76.00MHz 2 97.9MHz 97.90MHz 97.90MHz 82.00MHz 3 98.9MHz 98.90MHz 98.90MHz 83.00MHz 4 107.1MHz 107.10MHz 107.10MHz 84.00MHz FM 5 107.9MHz 107.90MHz 107.90MHz 90.00MHz 6 100.1MHz 100.10MHz
in „Onkyo verstärker“ · Analoge Elektronik und Schaltungstechnik ·
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PDF
16F648a_40044F.pdf
0000 0000 73 9Ah EEDATA EEPROM Data Register xxxx xxxx 89 9Bh EEADR EEPROM Address Register xxxx xxxx 90 9Ch EECON1 — — — — WRERR WREN WR RD ---- x000 90 9Dh EECON2 EEPROM Control Register 2 (not a physical register) ---- ---- 90 9Eh — Unimplemented — — 9Fh VRCON VREN VROE VRR — VR3 VR2 VR1 VR0 000- 0000
in „16f627A schaltet RA5 u RA6 nicht“ · Mikrocontroller und Digitale Elektronik ·
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Datei
errorlog.txt
62) at org.eclipse.jface.viewers.Viewer$2.run(Viewer.java:162) at org.eclipse.core.runtime.SafeRunner.run(SafeRunner.java:37) at org.eclipse.core.runtime.Platform.run(Platform.java:880) at org.eclipse.ui.internal.JFaceUtil
in „AVR Eclipse Plugin 2.3“ · Mikrocontroller und Digitale Elektronik ·
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PDF
DM00043574.pdf
Set and reset by software. 0: CAN clock disabled 1: CAN clock enabled Bit 24 Reserved, must be kept at reset value. Bit 23 USBEN: USB clock enable (STM32F303xB/C/D/E devices only) Set and reset by software. 0: USB clock disabled 1: USB clock enabled Bit 22 I2C2EN: I2C2 clock enable (STM32F303xB/C/D/E,
in „STM32F3 Discovery als USB Keyboard“ · Mikrocontroller und Digitale Elektronik ·
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PDF
stm32l431_reference_manual.pdf
. 0: Power interface clock disabled 1: Power interface clock enabled Bit 27 Reserved, must be kept at reset value. (1) Bit 26 USBFSEN : USB FS clock enable Set and cleared by software. 0: USB FS clock disabled 1: USB FS clock enabled Bit 25 CAN1EN: CAN1 clock enable Set and cleared by software. 0: CAN1
in „ADC differential mode“ · Mikrocontroller und Digitale Elektronik ·
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PDF
stm32l431_reference_manual.pdf
. 0: Power interface clock disabled 1: Power interface clock enabled Bit 27 Reserved, must be kept at reset value. (1) Bit 26 USBFSEN : USB FS clock enable Set and cleared by software. 0: USB FS clock disabled 1: USB FS clock enabled Bit 25 CAN1EN: CAN1 clock enable Set and cleared by software. 0: CAN1
in „Offset Data alignment“ · Mikrocontroller und Digitale Elektronik ·
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PDF
stm32l431_reference_manual.pdf
. 0: Power interface clock disabled 1: Power interface clock enabled Bit 27 Reserved, must be kept at reset value. (1) Bit 26 USBFSEN : USB FS clock enable Set and cleared by software. 0: USB FS clock disabled 1: USB FS clock enabled Bit 25 CAN1EN: CAN1 clock enable Set and cleared by software. 0: CAN1
in „DMA one shot mode“ · Mikrocontroller und Digitale Elektronik ·
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PDF
rm0444-stm32g0x1-advanced-armbased-32bit-mcus-stmicroelectronics.pdf
After enabling PVMDAC, PVMODAC is valid after PVMDAC wakeup time. Bits 14:13 Reserved, must be kept at reset value. Bit 12 PVMOUSB: USB supply voltage monitoring output flag This flag indicates the readiness of the USB supply voltage (excess of 1.2 V). 0: USB supply voltage not ready 1: USB supply voltage
in „Problem mit Clock Configuration beim STM32G031“ · Mikrocontroller und Digitale Elektronik ·
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PDF
pic16f88.pdf
The Reset vector is at 0000h and the interrupt vector is Function Registers. Bits RP1 (STATUS<6>) and RP0 at 0004h. (STATUS<5>) are the bank select bits. RP1:RP0 Bank 00 0 01 1 10 2 11 3 Each bank extends up to 7Fh (128 bytes
in „auftrennen einer 2stelligen Dezimalzahl in asm (pic 16f88)“ · Mikrocontroller und Digitale Elektronik ·
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PDF
NovaComm_Control_Interface_User_Guide_Ver.2.3.pdf
PC or a MCU) will be handled by the new interface. That means, if you change the host interface to USB CDC, you have to use the USB communication to control the module. NovaComm Technologies Confidential -31- NovaComm Control Interface User Guide Ver.2.3 2. NovaComm provides an USB CDC driver for Windows
in „Mini Bluetooth Module mit SPP und AT Command set“ · Mikrocontroller und Digitale Elektronik ·
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PDF
ATM16_doc2466.pdf
the Compare Match Flag (OCF1A/B) which can be used to generate an output compare interrupt request. 90 ATmega16(L) 2466P–AVR–08/07 ATmega16(L) The Input Capture Register can capture the Timer/Counter value at a given external (edge trig- gered) event on either the Input Capture Pin (ICP1) or on the Analog
in „ISP - Pinbelegung“ · Mikrocontroller und Digitale Elektronik ·
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PDF
Ateme16.pdf
the Compare Match Flag (OCF1A/B) which can be used to generate an output compare interrupt request. 90 2466T–AVR–07/10 ATmega16(L) The Input Capture Register can capture the Timer/Counter value at a given external (edge trig- gered) event on either the Input Capture Pin (ICP1) or on the Analog Comparator
in „Atmega16 und spi bus“ · Mikrocontroller und Digitale Elektronik ·
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PDF
Ateme16.pdf
the Compare Match Flag (OCF1A/B) which can be used to generate an output compare interrupt request. 90 2466T–AVR–07/10 ATmega16(L) The Input Capture Register can capture the Timer/Counter value at a given external (edge trig- gered) event on either the Input Capture Pin (ICP1) or on the Analog Comparator
in „Atmega16 und spi bus“ · Mikrocontroller und Digitale Elektronik ·
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PDF
en.DM00091010.pdf
. Res. RST Res. Res. RST RST Res. Res. RST Res. rw rw rw rw rw rw Bit 31:29 Reserved, must be kept at reset value. Bit 28 PWRRST: Power interface reset Set and cleared by software. 0: No effect 1: Reset power interface Bit 27:24 Reserved, must be kept at reset value. Bit 23 USBRST: USB interface reset
in „EFM32F030 und Standby“ · Mikrocontroller und Digitale Elektronik ·
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Datei
AVR.html
1" rowspan="1" style="width: 8.485%;" class="hcp11" width="8.485%"> <p class="hcp30" align="right">AT90USB82</p> </td> <td colspan="1" rowspan="1" style="width: 6.776%;" class="hcp13" width="6.776%"> <p class="hcp14" align="center">a</p> </td> <td colspan="1" rowspan="1" style="width: 5.598%;" class=
in „Billige Alternative zu AVR STK 500 oder Wie brenne ich günstig mein Programm auf den Mikrochip?“ · Mikrocontroller und Digitale Elektronik ·
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Datei
Wie_archiviert_ihr_Websites__-_Mikrocontroller.net.html
a:hover{background-position:-60px -30px}.highslide-controls .highslide-next a{background-position:-90px 0}.highslide-controls .highslide-next a:hover{background-position:-90px -30px}.highslide-controls .highslide-next a.disabled{background-position:-90px -60px !important}.highslide-controls .highslide-move
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PDF
Reference_Manual.pdf
cleared by software. 0: FDCAN clock disabled 1: FDCAN clock enabled Bit 24 Reserved, must be kept at reset value. Bit 23 USBEN: USB device clock enable Set and cleared by software. 0: USB device clock disabled 1: USB device clock enabled Bit 22 I2C2EN: I2C2 clock enable Set and cleared by software.
in „STM32G474RE UART“ · Mikrocontroller und Digitale Elektronik ·
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PDF
C8051F53x.pdf
In addition to direct access to data memory organized as bytes, the sixteen data memory locations at 0x20 through 0x2F are also accessible as 128 individually addressable bits. Each bit has a bit address from 0x00 to 0x7F. Bit 0 of the byte at 0x20 has bit address 0x00 while bit 7 of the byte at 0x20
in „[V]erkaufe 35 µC von Silabs C8051F531 (TSSOP-20)“ · Markt ·
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PDF
C8051F531.pdf
In addition to direct access to data memory organized as bytes, the sixteen data memory locations at 0x20 through 0x2F are also accessible as 128 individually addressable bits. Each bit has a bit address from 0x00 to 0x7F. Bit 0 of the byte at 0x20 has bit address 0x00 while bit 7 of the byte at 0x20
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Datei
errors.txt
/usr/src/linux/include/linux/bitmap.h:8, from /usr/src/linux/include/linux/cpumask.h:90, from /usr/src/linux/include/linux/interrupt.h:9, from linux_wrappers.c:24: /usr/src/linux/include/linux/string.h: At top level: /usr/src/linux/include/linux/string.h:28: error: expected ‘=’, ‘,’, ‘;
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PDF
ml50x_schematics.pdf
WAIT SYSACE_USB_D12 50 MPD12 CFA03 139 SYSACE_CFA03 17 17_A03 SYSACE_USB_D11 51 (DIE DOWN) 137 SYSACE_CFA04 16 C SYSACE_USB_D10 52 MPD11 CFA04 135 SYSACE_CFA05 15 16_A04 C SYSACE_USB_D9 53 MPD10 CFA05 134 SYSACE_CFA06
in „DDR2 RAM Ansteuerung mit Virtex-5 ML507“ · FPGA, VHDL & Co. ·
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PDF
e8_manual_5_July_2008.pdf
(wide open throttle naturally aspirated). • Peak torque RPM – The RPM at which peak torque occurs, this value is used to determine at which RPM point to use the 'ignition advance at peak torque' value. • Additional ignition advance at light load (deg) – Addition ignition
in „Vollprogrammierbare Zündanlage für 1Zylinder 2 und 4 Takt Motoren“ · Mikrocontroller und Digitale Elektronik ·
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PDF
_ATmega32.pdf
and which is used for data change. As Figure 71 shows, when UCPOL is zero the data will be changed at rising XCK edge and sampled at falling XCK edge. If UCPOL is set, the data will be changed at falling XCK edge and sampled at rising XCK edge. Frame Formats A serial frame is defined to be one character
in „Anschwingvorgang µC & Quarz“ · Mikrocontroller und Digitale Elektronik ·
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PDF
Ultraschallotrungssystem_Lego_Mindstorms.pdf
160 A.12 Verkabelung und Terminatoren . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 162 A.13 Sender fur den RCX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 162 ¨ A.14 Empfan¨er fur ¨en RCX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
in „Ortung mittels Ultraschall - Projektvorstellung / Hilfegesuch“ · Mikrocontroller und Digitale Elektronik ·
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PDF
mindstorms.pdf
160 A.12 Verkabelung und Terminatoren . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 162 A.13 Sender fur den RCX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 162 ¨ A.14 Empfan¨er fur ¨en RCX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
in „Suche Transreceiver Ultraschallkapseln mit 80° Detektionswinkel“ · Mikrocontroller und Digitale Elektronik ·
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Datei
t.lst
__ORD1N ORI R30,LOW(@0) ORI R31,HIGH(@0) ORI R22,BYTE3(@0) ORI R23,BYTE4(@0) .ENDM .MACRO __DELAY_USB LDI R24,LOW(@0) __DELAY_USB_LOOP: DEC R24 BRNE __DELAY_USB_LOOP .ENDM .MACRO __DELAY_USW LDI R24,LOW(@0) LDI R25,HIGH(@0) __DELAY_USW_LOOP: SBIW R24,1 BRNE __DELAY_USW_LOOP .ENDM .MACRO __CLRD1S CLR
in „Problem mit CodevisionAVR 1.23.8c Standard“ · Mikrocontroller und Digitale Elektronik ·
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Datei
t.lst
__ORD1N ORI R30,LOW(@0) ORI R31,HIGH(@0) ORI R22,BYTE3(@0) ORI R23,BYTE4(@0) .ENDM .MACRO __DELAY_USB LDI R24,LOW(@0) __DELAY_USB_LOOP: DEC R24 BRNE __DELAY_USB_LOOP .ENDM .MACRO __DELAY_USW LDI R24,LOW(@0) LDI R25,HIGH(@0) __DELAY_USW_LOOP: SBIW R24,1 BRNE __DELAY_USW_LOOP .ENDM .MACRO __CLRD1S CLR
in „Problem mit CodevisionAVR 1.23.8c Standard“ · Mikrocontroller und Digitale Elektronik ·
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PDF
311_Schaltungen.pdf
das Flip-Flop einen definierten Zu- für Endgeräte, die mit Low-Speed (1,5 stand einnimmt, wenn der USB-Schalter MBit/s) und Full-Speed (12 MBit/s) als über die USB-B-Buchse mit dem PC ver- Übertragungsrate auf den USB-Datenlei- bunden wird. Das an der USB-A-Buchse tungen arbeiten. „Hi-Speed“ (480 MBit
in „[S] Sammlung von elektr. Schaltungen“ · Mikrocontroller und Digitale Elektronik ·