-
PDF
tps3306-_AIC_-_AID_-_AIF_-_AIG_-.pdf
TYPICAL OPERATING CIRCUIT 3.3 V 1.5 V AVDD CV TPS3306–15 R3 R4 DD SENSE1 VDD DV DD R1 SENSE2 WDI B_XF 1% TMS320 PFI PFO A_XF VC5441 R2 GND RESET RESET 1% VSS VSSA Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor
in „Identifizierung Bauteil TI68 AID“ · Analoge Elektronik und Schaltungstechnik ·
-
PDF
mt6_06.pdf
adaption connector • 2 x RS232 interface (1 x DB9 male, 1 x 10-pin header) • CAN interface (Philips SJA1000) • Ethernet interface (SMSC LAN91C96) • PS/2 connector (keyboard or mouse) • Uninterruptible Power Supply (optional) • USB target (external clamping diode, VCC necessary) • LCD-Connector (40-pin header
in „CAN-Bus Ansteuerung über C# - Compact Framework“ · Softwareentwicklung ·
-
PDF
TLV5610IDW_12-Bit__seriell__SPI__TMS320.pdf
DW OR PW PACKAGE (TOP VIEW) – 1 µs In Fast Mode – 3 µs In Slow Mode DGND 1 20 DV • Compatible With TMS320 and SPI™ Serial 2 19 DD DIN DOUT Ports SCLK 3 18 LDAC • Monotonic Over Temperature FS 4 17 MODE PRE 5 16 REF • Low Power Consumption: OUTE 6 15 OUTD – 18 mW In Slow Mode at 3-V OUTF 7 14 OUTC OUTG
in „Hilfe zu DAC über SPI“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
MB1075.pdf
PA14 PA141 TCK/SWCLK TETE TE IM[0..3] IM[0..3] SDCLKLK SDCLK BA0 BA0A0 A STM32F4_USART1_TX NPA9 PA131 TMS/SWDIO RDXDX SDCKE1E BA1A1 PA9 PA13 PB3B T_SWO WRX_DCXCX RDX I2C3_SCLCL SDCKE1 BA1 PB3 DCX_SCLC WRX_DCX I2C3_SCL I2C3_SDADA SDNE1E NBL0L0 NRST T_NRST SDADA DCX_SCL I2C3_SDA TP_INT1T SDNE1 NBL0 NBL1L1
in „.net auf STM32F429ZI“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
K2000-schematics.pdf
DATE: D D +20V U125 7815 C237 CR102 1 VIN D VOUT 3 +15V 104 3 G AGND 2 C147 2 - + 1 104 + C148 1 1000uF 50V AGND VM18 VM18 CR115 4 BAV99L 3 AGND AGND POWERA C234 + C131 104 1000uF 50V 2 AGND 5 AGND 104 4 AGND C117 2 1 1 U119 D -20V 79M25 VIN G VOUT 3 -15V J1016 U124 C232 3 CR103 104 1 VIN N VOUT 3 +
in „Kalibrierung Keithley 2000 Multimeter“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
msp430fr5969.pdf
Average LPM Currents vs Wake-up Frequency Average LPM Current vs Wake-up Frequency 10000.00 LPM0 LPM1 1000.00 LPM2,XT12 A LPM3,XT12 [ e LPM3.5,XT12 u 100.00 C - k a e 10.00 r v A 1.00 P R 0.10 0.001 0.01 0.1 1 10 100 1000 10000 100000 O Wake-Up Frequency [Hz] D C001 U The average wake-up current does not
in „Probleme mit Konfiguration der SPI-Schnittstelle am MSP430“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
mb1045_changed.pdf
Trace.SchDoc MII_RX_ER MII_RX_ER MII_COL MII_COL TDI TDI MII_CRS MII_CRS TRST TRST MII_MDC MII_MDC TMS/SWDIO TMS/SWDIO 10MHz clock MII_MDIO 25MHz clock MII_MDIO TCK/SWCLK TCK/SWCLK RESET# MII_MCO MII_MCO TDO/SWO 84MHz clock TDO/SWO U_Peripherals TRACE_CK TRACE_CK Peripherals.SchDoc TRACE_D0 TRACE_D0
-
PDF
mb1045_changed_korrigiert.pdf
Trace.SchDoc MII_RX_ER MII_RX_ER MII_COL MII_COL TDI TDI MII_CRS MII_CRS TRST TRST MII_MDC MII_MDC TMS/SWDIO TMS/SWDIO 10MHz clock MII_MDIO 25MHz clock MII_MDIO TCK/SWCLK TCK/SWCLK RESET# MII_MCO MII_MCO TDO/SWO 84MHz clock TDO/SWO U_Peripherals TRACE_CK TRACE_CK Peripherals.SchDoc TRACE_D0 TRACE_D0
-
PDF
SLR2016.PDF
1 0 200 2 13 C2 H previouslyloadeddisplay G R E Y 0.01 F 3 12 C3 L L L H L L L H L H G R E E 556 1000 p 4 Dual Timer 11 L L H H L H L H L H G R U E L H L H L L H H L L G L U E 5 10 C4 L H H H L L L L H L B L U E 0.01F 6 9 L L H H L L L H L H B L E E C1 To BL Pin L L L H L H L H H H B L E W 4700 pF 8
-
PDF
ecp_ec.pdf
NC - GND - 13 VCC - VCC - VCC - 14 TCK 6 TCK 6 TCK 6 15 GND - GND - GND - 16 TDI 6 TDI 6 TDI 6 17 TMS 6 TMS 6 TMS 6 18 TDO 6 TDO 6 TDO 6 19 VCCJ 6 VCCJ 6 VCCJ 6 20 PL7A 6 T LLM0_PLLT_IN_A PL11A 6 T LLM0_PLLT_IN_A PL20A 6 T LLM0_PLLT_IN_A 21 PL7B 6 C LLM0_PLLC_IN_A PL11B 6 C LLM0_PLLC_IN_A PL20B 6 C
in „Verwendung der Pins eines Lattice LFECP6 mit Config-Dual-Funktion als I/Os“ · FPGA, VHDL & Co. ·
-
PDF
ecp_ec.pdf
NC - GND - 13 VCC - VCC - VCC - 14 TCK 6 TCK 6 TCK 6 15 GND - GND - GND - 16 TDI 6 TDI 6 TDI 6 17 TMS 6 TMS 6 TMS 6 18 TDO 6 TDO 6 TDO 6 19 VCCJ 6 VCCJ 6 VCCJ 6 20 PL7A 6 T LLM0_PLLT_IN_A PL11A 6 T LLM0_PLLT_IN_A PL20A 6 T LLM0_PLLT_IN_A 21 PL7B 6 C LLM0_PLLC_IN_A PL11B 6 C LLM0_PLLC_IN_A PL20B 6 C
in „SPI-Slave im FPGA, Signal-Delay an MISO minimieren“ · FPGA, VHDL & Co. ·
-
PDF
TL770x.pdf
respect to GND. 6.2 ESD Ratings VALUE UNIT Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) 1000 V(ESD) Electrostatic discharge (2) V Charged device model (CDM), per JEDEC specification JESD22-C101 1000 (1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD
in „Atmega16 Flash leergeröntgt?“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
amd_functional_datasheet.pdf
Core Multiplier Frequency 100 MHz 133 MHz 166 MHz 200 MHz 1 4 800 MHz 100.00 133.33 160.00 160.00 5 1000 MHz 100.00 125.00 166.66 200.00 6 1200 MHz 100.00 133.33 150.00 200.00 7 1400 MHz 100.00 127.27 155.55 200.00 8 1600 MHz 100.00 133.33 160.00 200.00 9 1800 MHz 100.00 128.57 163.63 200.00 10 2000 MHz
in „Am3 Mainboard Vcore instabil wenn kalt“ · PC Hard- und Software ·
-
PDF
N73_RM-132_schematics_v1.pdf
C3 1.8V/ 3V depends on SIM card 33nH C9085 J8 C7513 C7514 L6520 56p C2206 VBack C2211 1n0 1n0 1n0 G1000 VCP A10 GND 1.8V if miniSD card is inserted GND GND M1000 GND 2.6V VREF_INT 1.35V KHN4NX1RA X6527 L7611 L7548 L7553 GND 4u7 L6509 GND D9 PwrOnX 1.8V 2.8V 1.8V 2.8V 2.5V DLM11GN601SZ2D 33nH 68nH 600R
in „[V] 30 5x7 LED-Matrixen, Nokia N73 Handy-Teile“ · Markt ·
-
PDF
ads8331.pdf
WH2 Pulse duration, SCLK high 12 tSCLK – WL2 ns I/O clock only 40 I/O and conversion clocks 47.6 1000 SCLK Cycle time, SCLK I/O clock, daisy-chain mode 40 ns I/O and conversion clocks, 47.6 1000 daisy-chain mode t Delay time, falling edge of SCLK to SDO invalid 10-pF load 8 ns D1 D2 Delay time, falling
in „Versorgungsspannung ADC“ · Analoge Elektronik und Schaltungstechnik ·
-
PDF
Dokumentation_MBHATM128-0206.pdf
Anschlussmöglichkeit für einen Debugger. PF6 TDO Im Lieferzustand (Factory Setting) sind diese PF5 TMS Pins normale I/O´s. Wird das Interface aktiviert, PF4 TCK sind sie nicht mehr als I/O´s verwendbar. RTC (Real Time Clock) PG4 TOSC1 32Khz externer Takt für RTC (Quarz) PG3 TOSC2 32Khz externer Takt
in „atmega128 modul“ · Markt ·
-
PDF
Spartan-3A_FPGA_Family.pdf
0.3 1.2 1.95 MINI_LVDS_33 (3) 3.0 3.3 3.6 200 – 600 0.3 1.2 1.95 LVPECL_25 (5) Inputs Only 100 800 1000 0.3 1.2 1.95 LVPECL_33 (5) Inputs Only 100 800 1000 0.3 1.2 2.8(6) (3) RSDS_25 2.25 2.5 2.75 100 200 – 0.3 1.2 1.5 RSDS_33 (3) 3.0 3.3 3.6 100 200 – 0.3 1.2 1.5 (3, 4, 7) TMDS_33 3.14 3.3 3.47 150 –
in „Ultraschallgerät(Medizin) HMI Touch Vertikale Streifen“ · FPGA, VHDL & Co. ·
-
PDF
DAC8562_3.pdf
Scale 1200 V REFIN 5 V, Gain = 1 Mid Scale 1200 Gain = 2 Mid Scale ) Zero Scale ) Zero Scale z z −1000 − 1000 / / n n ( 800 ( 800 i i o o e 600 e 600 g g l 400 l 400 V V 200 200 0 0 10 100 1k 10k 100k 10 100 1k 10k 100k Frequency (Hz) Frequency (Hz) Figure 45. DAC Output Noise Density vs Frequency Figure
in „Problem mit Positionsrückmeldung bei GRBL“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
LPC3130_31.pdf
DIO1 Buffered TCK out signal. Used for connecting an on board TAP controller (FPGA, DSP, etc.). BUF_TMS D14 SUP3 DO O DIO1 Buffered TMS out signal. Used for connecting an on board TAP controller (FPGA, DSP, etc.). UART [4][5] mUART_CTS_N N13 SUP3 DI / GPIO I DIO1 UART Clear To Send (active LOW) mUART_RTS_N
in „LCD-Interface LPC3131“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
MELEXIS_Sensor-IC-MLX90316KDC_EN.pdf
Supply R1 (Ω) R2 (Ω) R3 (Ω) R4 (Ω) R5 (Ω) Type (V) (V) (V) 5V μCtrl w/o O.D. w/o 3.3V 5V 5V 5V 100 1000 20,000 1000 20,000 BS170 5V μCtrl w/o O.D. w/ 3.3V 5V 3.3V 5V 150 1000 N/A 1000 20,000 BS170 (30) 3.3V μCtrl w/o O.D. 3.3V 3.3V 5V 150 1000 N/A N/A N/A BS170 5V μCtrl w/ O.D. w/o 3.3V) 5V 5V 5V 100 1000 20,000 1000 20,000 N/A 3.3V μCtrl w/ O.D. 3.3V 3.3V 5V 150 1000 N/A N/A N/A N/A Table 3 - Resistor Values for Common Specific Applications 30μCtrl w/ O.D. : Micro-controller with open-drain capability
in „MLX90316 mit Atmega8 über SPI“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
DL_Anleitung_XO2_140416.pdf
serielle Schnittstelle mit den folgenden 4 Signalen: TDI Test Data In TDO Test Data Out TCK Test Clock TMS Test Mode Select Die Verwendung im Zusammenhang mit einem PLD ist in Abb. 1.4 dargestellt. TDI TDO JTAG PLD TCK TMS Abb. 1.4 PLD mit JTAG-Schnittstelle 14.4.2016 11/160 Anleitung zum „Digitallabor“
in „Bildung des Zweierkomplements einer 4 Bit-Zahl“ · FPGA, VHDL & Co. ·
-
PDF
ATmega32.pdf
Instruction Register from the TDI input at the rising edge of TCK. The TMS input must be held low during input of the 3 LSBs in order to remain in the Shift-IR state. The MSB of the instruction is shifted in when this state is left by setting TMS high. While the instruction
in „STK500 als ISP“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
Mega32.pdf
Instruction Register from the TDI input at the rising edge of TCK. The TMS input must be held low during input of the 3 LSBs in order to remain in the Shift-IR state. The MSB of the instruction is shifted in when 219 2503G–AVR–11/04 this state is left by setting TMS high.
in „AVR Timer/Counter Zeit berechnen“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
msp430f5529.pdf
BGA MI ZQE 80 2500 330.0 12.4 5.3 5.3 1.5 8.0 12.0 Q1 CROSTA R JUNI OR MSP430F5515IPNR LQFP PN 80 1000 330.0 24.4 15.0 15.0 2.1 20.0 24.0 Q2 MSP430F5517IPNR LQFP PN 80 1000 330.0 24.4 15.0 15.0 2.1 20.0 24.0 Q2 MSP430F5519IPNR LQFP PN 80 1000 330.0 24.4 15.0 15.0 2.1 20.0 24.0 Q2 MSP430F5521IPNR LQFP
in „Tastatur komplett selbst erstellen“ · PC Hard- und Software ·
-
PDF
rudi_____RX-V4A_TSR-400.pdf
AC I I/O CEC Signal 137 AINA04/PN4 THM3 DSP_PON I I Thermal Detection 3 172 ERD_N/INT04b/PF0 JTAG_TMS DSP_PON O O JTAG TMS Signal 138 AINA05/PN5 PS1_PRT +3.3S_PON I I 'PS protection detection 1 173 EWR_N/PF1 USB_VBUS_PON USB_VBUS_PON O O Power Control 139 AINA06/PN6 PS2_PRT +3.3S_PON I I 'PS protection
in „Test in der Schaltung STR3A400“ · Analoge Elektronik und Schaltungstechnik ·
-
PDF
INTERFACE_FT2232H.pdf
JTAG – TDO, Test Data output SPI – DI, Serial Data Input Output Signal Select. For example: 19 41 TMS/CS OUTPUT JTAG – TMS, Test Mode Select SPI – CS, Serial Chip Select 21 43 GPIOL0 I/O General Purpose input/output 22 44 GPIOL1 I/O General Purpose input/output General Purpose input/output 23 45 GPIOL2
in „LC Filter nach LDO nötig?“ · Analoge Elektronik und Schaltungstechnik ·
-
PDF
DS_FT2232H.pdf
JTAG – TDO, Test Data output SPI – DI, Serial Data Input Output Signal Select. For example: 19 41 TMS/CS OUTPUT JTAG – TMS, Test Mode Select SPI – CS, Serial Chip Select 21 43 GPIOL0 I/O General Purpose input/output 22 44 GPIOL1 I/O General Purpose input/output General Purpose input/output 23 45 GPIOL2
-
PDF
DS_FT2232H.pdf
JTAG – TDO, Test Data output SPI – DI, Serial Data Input Output Signal Select. For example: 19 41 TMS/CS OUTPUT JTAG – TMS, Test Mode Select SPI – CS, Serial Chip Select 21 43 GPIOL0 I/O General Purpose input/output 22 44 GPIOL1 I/O General Purpose input/output General Purpose input/output 23 45 GPIOL2
-
PDF
1a_timer_irq_ESE_Skript.pdf
Beenden der Serviceroutine Bild 5.5 b) Assemblerübersetzung • Wiederholungsfrequenz > 1/100 .. 1/1000 * Prozessorfrequenz • Geforderter Jitter (Abweichung des Starts der Reaktionsroutine) < 10 .. 1000 Instruktionszeiten • Bearbeitungszeit einer ISR > 10% Gesamtbearbeitungszeit Die angegebenen Grenzen
in „Zeitmessung mit Timer2 asynchron“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
593d.pdf
ESR Low ESR automotive grade Very low DCL TEMPERATURE RANGE -55 °C to +125 °C CAPACITANCE 0.1 μF to 1000 μF 0.1 μF to 100 μF 1 μF to 470 μF 0.47 μF to 1000 μF 0.1 μF to 470 μF 0.1 μF to 470 RANGE μF VOLTAGE RANGE 4 V to 75 V 4 V to 50 V 4 V to 50 V 4 V to 75 V 4 V to 50 V 4 V to 50 V CAPACITANCE ± 10 %
in „Wo bekomm ich dieses Bauteil her?“ · Analoge Elektronik und Schaltungstechnik ·
-
PDF
lpc11u3x.pdf
output pin. - I AD0 — A/D converter, input 0. - O CT32B0_MAT3 — Match output 3 for 32-bit timer 0. [6] TMS/PIO0_12/AD1/ 22 C7 33 44 I; PU I TMS — Test Mode Select for JTAG interface. CT32B1_CAP0 - I/O PIO_12 — General purpose digital input/output pin. - I AD1 — A/D converter, input 1. - I CT32B1_CAP0 — Capture
in „LPC11U3 CRP zurücksetzen“ · Analoge Elektronik und Schaltungstechnik ·
-
PDF
293d.pdf
ESR VS. FREQUENCY Axis Title Axis Title 100 10000 100 10000 Impedance Impedance ESR ESR ) ) ( 10 1000 ( 10 1000 R R e E e e e E e e l / l l l / l l d c s n d c 10 μF, 16DC- C case s n 2 a 4.7 μF, 1DC- B case 1 2 2 a 1 2 d d p 1 100 p 1 100 I I 4.7 μF, 1DCV D case 0.1 10 0.1 10 1K 10K 100K 1M 10M 100M
in „Suche dringend passenden SMD Kondensator“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
_ATmega32.pdf
instruction register from the TDI input at the rising edge of TCK. The TMS input must be held low during input of the 3 LSBs in order to remain in the Shift-IR state. The MSB of the instruction is shifted in when 219 2503C–AVR–10/02 this state is left by setting TMS high.
in „Anschwingvorgang µC & Quarz“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
ATMega16.pdf
register or Data Register. When the JTAG interface is enabled, this pin can not be used as an I/O pin. TMS – Port C, Bit 3 TMS, JTAG Test Mode Select: This pin is used for navigating through the TAP-controller state machine. When the JTAG interface is enabled, this pin can not be used as an I/O pin. TCK
in „DCF auf INT0“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
DLO2416.pdf
display. 0.01 F 3 556 12 C3 If the cursor is not required, the cursor enable signal (CUE) Dual Timer 1000 pF may be tied low to disable the cursor function. For a flashing 4 11 cursor, simply pulse CUE. If the cursor has been loaded to any 5 10 C4 or all positions in the display, then CUE will control whether
-
PDF
Ateme16.pdf
used as an I/O pin. The TD0 pin is tri-stated unless TAP states that shifts out data are entered. TMS – Port C, Bit 3 TMS, JTAG Test Mode Select: This pin is used for navigating through the TAP-controller state machine. When the JTAG interface is enabled, this pin can not be used as an I/O pin. TCK
in „Atmega16 und spi bus“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
Ateme16.pdf
used as an I/O pin. The TD0 pin is tri-stated unless TAP states that shifts out data are entered. TMS – Port C, Bit 3 TMS, JTAG Test Mode Select: This pin is used for navigating through the TAP-controller state machine. When the JTAG interface is enabled, this pin can not be used as an I/O pin. TCK
in „Atmega16 und spi bus“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
am79c961.pdf
Impedance TXP Differential Driver (Note 5) 80 Output Impedance IEEE 1149.1 (JTAG) Test Port VIL TCK, TMS, TDI 0.8 V VIH TCK, TMS, TDI 2.0 V VOL TDO OL = 2.0 mA 0.4 V VOH TDO OH = –0.4 mA 2.4 V IL TCK, TMS, TDI VDD = 5.5 V,IV = 0.5 V –200 A IIH TCK, TMS, TDI VDD =5.5 V, I = 2.7 V –100 A IOZ TDO 0.4 V <
-
Datei
LPC11Axx.h
0x40044018) I/O configuration for pin TDI / P0_6 / AD0 /CT32B0_MAT3 / SSP0_MISO / unused */ __IO uint32_t TMS_PIO0_7; /*!< (@ 0x4004401C) I/O configuration for pin TMS/P0_7/AD1/CT32B1_CAP0/CT16B0_MAT0 */ __IO uint32_t TDO_PIO0_8; /*!< (@ 0x40044020) I/O configuration for pin TDO/P0_8/AD2/CT32B1_MAT0/SCK1 */
in „constexpr Mikrokontroller Pointer Hartwarezugriff“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
ATM16_doc2466.pdf
used as an I/O pin. The TD0 pin is tri-stated unless TAP states that shifts out data are entered. TMS – Port C, Bit 3 TMS, JTAG Test Mode Select: This pin is used for navigating through the TAP-controller state machine. When the JTAG interface is enabled, this pin can not be used as an I/O pin. TCK
in „ISP - Pinbelegung“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
DLx2416.pdf
easily be constructed using a 555 2 13 C3 as table multivibrator. Figure 4 illustrates a circuit in 1000 pF which varying R2 (100K~10K) will have a flash rate of C 3 12 1.0 Hz~10 Hz. 0.01 µF 4 556 11 The display can be dimmed by pulse width modulating Dual Timer C4 the (BL) at a frequency sufficiently
in „(V) 4-Fach 5*7 Punktmatrix Osram DLR 2416, Bistabile Relais SDS, LED-Display 7-Seg. 4-Fach“ · Markt ·
-
PDF
AM335x_Sitara_Prozessor.pdf
Available Available Available ZCZ: 2 ports ZCZ: 2 ports ZCZ: 2 ports Ethernet media access 10/100/1000 10/100/1000 10/100/1000 10/100/1000 10/100/1000 10/100/1000 10/100/1000 controller (EMAC) with 2- ZCE: 1 port ZCE: 1 port ZCE: 1 port ZCE: 1 port No ZCE No ZCE No ZCE port switch ZCZ: 2 ports ZCZ: 2
in „BeagleboneBlack: Sensor über I2C“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
TechnicalReference_ATmega32Board.pdf
Steckers ist kompatibel zum AVR JTAG. Pin 1 : TCK (PC2) Pin 2 : GND Pin 3 : TDO (PC4) Pin 4 : Vcc Pin 5 : TMS (PC3) Pin 6 : Reset Pin 7 : Vcc Pin 8 : n.c. Pin 9 : TDI (PC5) Pin 10 : GND Port X Der ATtiny2313 erweitert die Platine um Port X. Port X unterstützt 8 Ausgänge. Die Ansteuerung erfolgt über Kommandos
in „unbekanntes Board / Programmer ib-markl“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
ADS8327IPW.pdf
wH(SCLK) Pulse duration, SCLK high 8 c(SCLK)- 8 ns I/O Clock only 30 I/O and conversion clock 47.6 1000 c(SCLK) Cycle time, SCLK I/O Clock, chain mode 30 ns I/O and conversion clock, chain mode 47.6 1000 t Delay time, falling edge of SCLK to SDO 10-pF Load 8 ns d(SCLKF-SDOINVALID) invalid d(SCLKF-SDOVALID
in „Kennt jemand ADS8327? Ist er wirklich SPI-kompatibel?“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
Sony_M610__MBX-176_.pdf
FBVDDQ0 6.27A(Frame Buffer core power for I/O) EBMS160808A121 NV_4.7U_10V_Y_Y NV_0.1U_16V_Y_Y NV_1000P_50V_M_B G24 FBA_PLLGND FBVDDQ1 AA26 +1_8VRUN 2 0805 2 0402 2 0402 FBVDDQ2 AB25 1 C406 1 C407 1 C427 1 C426 FBVDDQ3 AB26 FBVDDQ4 G11 NV_0.1U_16V_M_B NV_0.1U_16V_M_B NV_1000P_50V_M_B NV_1000P_50V_M_B
in „Blitzschaden an Sony Vaio Notebook“ · PC Hard- und Software ·
-
PDF
Vishay-293D.pdf
low DCL industrial grade automotive grade TEMPERATURE RANGE -55 °C to +125 °C CAPACITANCE 0.1 μF to 1000 μF 0.1 μF to 100 μF 1 μF to 470 μF 0.47 μF to 1000 μF 0.1 μF to 470 μF 0.1 μF to 470 μF RANGE VOLTAGE RANGE 4 V to 75 V 4 V to 50 V 4 V to 50 V 4 V to 75 V 4 V to 50 V 4 V to 50 V CAPACITANCE ± 10 %
in „Was ist das für ein Bauteil? (Aus einem Autoschlüssel)“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
Atmega128_doc2467.pdf
Internal Memory Internal Memory 0x0FFF 0x0FFF 0x10FF 0x10FF 0x1000 0x1000 0x1100 0x1100 External External 0x7FFF 0x7FFF 0x7FFF 0x7FFF 0x8000 Memory 0x8000 Memory 0x90FF 0x8FFF 0x9100 0x9000 (Unused) (Unused) 0xFFFF 0xFFFF 34 ATmega128 2467R–AVR–06/08 ATmega128 Using
in „ATMEGA128 Timer“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
Kemet_Tantalum_Chip_Capacitors__F3102TA_.pdf
Z = None Voltage Failure Rate Symbol* D = 6V J = 20V (*See Note Below) F = 10V K = 25V B = (0.1%/1000 hrs. H = 15V M - 35V C = (0.01%/1000 hrs. D = (0.001%/1000 hrs. Termination Finish Code H = Solder Plated Capacitance Tolerance Capacitance Picofarad Code M = ±20% K = ±10% First two digits represent
-
PDF
nightsky_arx15.pdf
CPU_VCC_SENSE 57 1K_04 APU_TCK C15 TCK VDDIO_MEM_S3_SENSE G14 VDDIO_MEM_S3_SENSE T49 SOC_VCC_SENSE 57 i APU_TMS B15 TMS VSS_SENSE_A F15 VSS_SENSE R542 0_04 CPU_VSS_SENSE CPU_VSS_SENSE 57 a Šŕ APU_TRST# B13 TRST_L R541 0_04 SOC_VSS_SENSE SOC_VSS_SENSE 57 APU_PWROK łő APU_DBRDY E13 DBRDY VDDP_SENSE AL22 g C1334
in „SMD TGAJ TVS Diode USB“ · Mikrocontroller und Digitale Elektronik ·
-
PDF
xmega_a1.pdf
Address ATxmega64A1 0 I/O Registers 0 I/O Registers 0 I/O Registers FFF (4 KB) FFF (4 KB) FFF (4 KB) 1000 EEPROM 1000 EEPROM 1000 EEPROM 17FF (2 KB) 17FF (2 KB) 17FF (2 KB) RESERVED RESERVED RESERVED 11 8067I–AVR–04/09 XMEGA A1 Figure 7-2. Data Memory Map (Hexadecimal address) 2000 Internal SRAM 2000 Internal
in „Welchen Wert hat der Pull-up-Widerstand dieses XMega?“ · Mikrocontroller und Digitale Elektronik ·