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PDF
ads830.pdf
–20 SFDR = 65dBFS ) ) d –30 d –30 ( ( d –40 d –40 i i g –50 g –50 a a M –60 M –60 –70 –70 –80 –80 –90 –90 0 7.5 15 22.5 30 0 7.5 15 22.5 30 Frequency (MHz) Frequency (MHz) TWO-TONE INTERMODULATION DISTORTION DIFFERENTIAL LINEARITY ERROR 0 0.2 f1= 9.5MHz at –7dBFS fIN 10MHz –10 f2= 9.9MHz at –7dBFS IMD(3) = –60dBc –20 0.1 ) d –30 ) e S u –40 ( i E 0 g –50 D M –60 –0.1 –70 –80 –90 –0.2 0 7.5 15 22.5 30 0 64 128 192 256 Frequency (MHz) Output Code ADS830 5 SBAS086A TYPICAL CHARACTERISTICS (Cont.) At TA= full specified temperature range, single-ended input range = 1.5V to 3.5V,
in „USB Speicher-Oszilloskop (Anfängerhilfe)“ · Mikrocontroller und Digitale Elektronik ·
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PDF
TLC5922.pdf
brightness deviations of LED connected to the output channels OUT0 to OUT15. Each of the 16 channels can be programmed with a 7-bit word. The channel output can be adjusted in 128 steps from 0% to 100% of the maximum output current I MAX. Equation 2 determines the output current for each OUTn: MAX ▯ DC
in „daisy-chaining Verzögerung“ · Mikrocontroller und Digitale Elektronik ·
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PDF
HD66766-10.pdf
high-speed RAM write with a window address-range specified is shown below. The window address-range can be rewritten to consecutively and quickly by inserting two dummy writes at the start of a row and three dummy writes at the end of a row, as determined by using the window address-range specification
in „The Siemens S65 132x176, 65536 color display with AVR“ · Projekte & Code ·
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PDF
Ansteuer-IS_UC1698__Vers._1.21_fuer_DEM_240160AFGH-PW___240x160.pdf
as a black and white display, at larger LCD panels, use lower resistance ITO lower Mux Rate. However, it is also true that such technique generally can not maintain LCD’s glass. quality of gray shade performance, since the Due to crosstalk
in „LCD DEM240160 mit UC1698 wie Bildspeicher auslesen“ · Mikrocontroller und Digitale Elektronik ·
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PDF
ELEMENT14.pdf
MINI6935 CPU module is an ARM embedded board, integrated with the ATMEL ARM926EJ-S-based processor AT91SAM9X35, operating at 400MHz frequency. The board has 128MB DDR2 SDRAM, 256MB NAND Flash, 4MB DataFlash, 4KB two-wire EEPROM. The Base Board expands the rich set of connectivity and user interface
in „CAN und I2C Projektumsetzung“ · Mikrocontroller und Digitale Elektronik ·
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PDF
SST39VF1602.pdf
SST39VF160x/320x devices offer a 256-bit Security ID space. The Secure ID space is divided into two 128-bit segments - one factory programmed segment and one user programmed segment. The first segment is programmed and locked at SST with a random 128-bit number. The user segment is left un-programmed
in „Pinout TSSOP“ · Analoge Elektronik und Schaltungstechnik ·
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PDF
AVR042_Hardware_Design_Considerations_doc2521.pdf
GND Ground Plane The AVR devices which have power and ground lines placed close together (like the AT90S8535) can be better decoupled than devices with industry standard pinout (like the AT90S8515), where the power and ground pins are placed in opposite corners of the DIP package. This disadvantage can
in „Atmega 8A PU“ · Mikrocontroller und Digitale Elektronik ·
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PDF
HD66766R.PDF
high-speed RAM write with a window address-range specified is shown below. The window address-range can be rewritten to consecutively and quickly by inserting two dummy writes at the start of a row and three dummy writes at the end of a row, as determined by using the window address-range specification
in „LCD-Modul F51661GNCJU-MLW-AA * Info *“ · Mikrocontroller und Digitale Elektronik ·
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PDF
IC1210-F128LQ_Datasheet.pdf
Speed DPLUS/DMINUS Pins DC Electrical Characteristics Integrated Circuit Solution Inc. 13 IC1210-F128LQ 8. AC CHARACTERISTICS 8.1. USB AT FULL SPEED Parameter Conditions Min. Nom. Max. Units Rise/Fall Time 50pf, 10~90% 4 20 ns Cross Over Voltage Excludes the First Transition From Idle 1.3 2.0 V Rise/Fall Time Mismatch State 90 111.11 % 8.2. USB AT HIGH SPEED Parameter Conditions Min. Nom. Max. Units Differential Rise/Fall Time 500 ps Transmit Eye Diagram Refer to NSTL test report Receive Requirements Refer to NSTL test report
in „MCS-52 (IC1210-F128LQ)“ · Mikrocontroller und Digitale Elektronik ·
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PDF
CFAG12864BTFHV_v3.0.pdf
=430kHz at FS=1(V ) DD fosc=215kHz at FS=0(Vss) ．Slave mode Connect to VDD 31 DS1 Input Selection of display duty. 32 DS2 ．Master mode DS1 DS2 Duty L 1/48 L H 1/64 L 1/96 H H 1/128 ． Slave mode Connect to V DD
in „avr asm LCD Problem“ · Mikrocontroller und Digitale Elektronik ·
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PDF
2243913.pdf
there are 128 resistors in a string N = N = between terminal A and terminal B. The wiper can be 256 128 set to tap onto any of these 128 resistors thus providing 129 possible settings (including terminal A and terminal
in „[V] 11St. SMD Dual Digital Poti - I2C Microchip MCP4561-103 10kOhm 256Steps Nonvolatile (8€)“ · Markt ·
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PDF
22107B-1180063.pdf
there are 128 resistors in a string N = N = between terminal A and terminal B. The wiper can be 256 128 set to tap onto any of these 128 resistors thus providing 129 possible settings (including terminal A and terminal
in „[V] 24St SMD Digital I2C / 256 Steps 5K Dual Poti Microchip MCP4561- 502E/MS (MSOP8) (alle 15€)“ · Markt ·
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PDF
2243913.pdf
there are 128 resistors in a string N = N = between terminal A and terminal B. The wiper can be 256 128 set to tap onto any of these 128 resistors thus providing 129 possible settings (including terminal A and terminal
in „[V] 44St. SMD Digital I2C / 256 Steps 10K Poti Microchip MCP4561- 103E/MS (MSOP8 Gehäuse)“ · Markt ·
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PDF
2243913.pdf
there are 128 resistors in a string N = N = between terminal A and terminal B. The wiper can be 256 128 set to tap onto any of these 128 resistors thus providing 129 possible settings (including terminal A and terminal
in „[V] 10St. Digitalpoti MCP4561-103E/MS 8MSOP orginalverpackt. (9€)“ · Markt ·
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PDF
128mb_burst_cr1_5_p26z.pdf
WRITE, and page READ operations. By using fixed initial latency (BCR[14] = 1), this CellularRAM device can be used in burst mode without monitoring the WAIT signal. However, WAIT can still be used to deter- mine when valid data is available at the start of the burst and at the end of the row. If WAIT is
in „Problem mit der Ansteuerung von PSRAM“ · FPGA, VHDL & Co. ·
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PDF
MT45W8MW16.pdf
WRITE, and page READ operations. By using fixed initial latency (BCR[14] = 1), this CellularRAM device can be used in burst mode without monitoring the WAIT signal. However, WAIT can still be used to deter- mine when valid data is available at the start of the burst and at the end of the row. If WAIT is
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PDF
AD5241_5242-1501681.pdf
while SCL is high. In write mode, the master pulls the SDA line high during While most old systems can operate at one voltage, a new the tenth clock pulse to establish a stop condition (see component may be optimized at another. When they operate Figure4).Inreadmode,themasterissuesanoacknowledge the same signal at two different voltages, a proper method of fortheninthclock pulse(thatis, theSDAlineremainshigh). level-shifting is needed. For instance, a 3.3 V E PROM can be The master then brings the SDA line low
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PDF
pcm1796.pdf
are factory preset to 10011. The next two bits of the address byte are the device select bits which can be user-defined by the ADR1 and ADR0 terminals. A maximum of four PCM1796s can be connected on the same bus at one time. Each PCM1796 responds when it receives its own slave address. Packet Protocol
in „Audio Signal verdoppeln“ · Analoge Elektronik und Schaltungstechnik ·
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PDF
MX25L12835FM2I-10G.pdf
frequency fC. The first address byte can be at any location. The address is automatically increased to the next higher address after each byte data is shifted out, so the whole memory can be read out at a single FAST_READ instruction. The
in „FLASH Memory Chip im Lenovo X200 von 8 MB auf 16 MB vergroessern“ · PC Hard- und Software ·
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PDF
PD243x_353x_443x.pdf
: The state of the lower two bits of the Although there is only one Control Word, it is duplicated at theControl Word are used to set the brightness of the entire dis- four address locations 0–3. Data can be read from any of these play, from 0% to 100%. The table below shows the correspon- locations.
in „SIEMENS Matrix LED Anzeige PB4437“ · Mikrocontroller und Digitale Elektronik ·
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PDF
PD2435_1x4_Dotmatrix_parallel.pdf
: The state of the lower two bits of the Although there is only one Control Word, it is duplicated at theControl Word are used to set the brightness of the entire dis- four address locations 0–3. Data can be read from any of these play, from 0% to 100%. The table below shows the correspon- locations.
in „[V] Intelligente LED-Matrix-Displays, HDSP 2112, SCF 5740, PD 2435“ · Markt ·
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PDF
stc32g-en.pdf
frequency division is 12M. [3](Note: PLL input clock range is 12M*(1±35%), i.e. about 8M~16M, users can adjust the input frequency :appropriately to meet the needs of PLL output special frequency)up to 144M, different microcontroller families operate at different frequ nci s, with the STC32G12K128 family
in „STC32 -- 8051 auf Steroide“ · Mikrocontroller und Digitale Elektronik ·
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PDF
External_Clock_DS1090.pdf
Integrated Products 1 For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. Low-Frequency, Spread-Spectrum EconOscillator ABSOLUTE MAXIMUM RATINGS 0 9 Voltage Range on CC Relative to Ground...........-0.5V to +Operating
in „Master-Clock (Takt) an 64 ICs verteilen“ · Mikrocontroller und Digitale Elektronik ·
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PDF
cic1.pdf
graph of sin x./x represents damped oscillations whose amplitude steadily decreases as x increases. As can be seen from the above graph, the nulls of the function exist at multiples of π. Therefore using the argument of the power response above, the nulls of the response exist at multiples of f=1/M. We can
in „Verständnis von CIC Decimation“ · Digitale Signalverarbeitung / DSP / Machine Learning ·
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PDF
ads830.pdf
–20 SFDR = 65dBFS ) ) d –30 d –30 ( ( d –40 d –40 i i g –50 g –50 a a M –60 M –60 –70 –70 –80 –80 –90 –90 0 7.5 15 22.5 30 0 7.5 15 22.5 30 Frequency (MHz) Frequency (MHz) TWO-TONE INTERMODULATION DISTORTION DIFFERENTIAL LINEARITY ERROR 0 0.2 f1= 9.5MHz at –7dBFS fIN 10MHz –10 f2= 9.9MHz at –7dBFS IMD(3) = –60dBc –20 0.1 ) d –30 ) e S u –40 ( i E 0 g –50 D M –60 –0.1 –70 –80 –90 –0.2 0 7.5 15 22.5 30 0 64 128 192 256 Frequency (MHz) Output Code ADS830 5 SBAS086A TYPICAL CHARACTERISTICS (Cont.) At TA= full specified temperature range, single-ended input range = 1.5V to 3.5V,
in „ads830 ad wandler“ · Mikrocontroller und Digitale Elektronik ·
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PDF
LT_1787fc.pdf
U TYPICAL PERFORMANCE CHARACTERISTICS Step Response at Step Response at Step Response at V = 0V to 10mV V = 0V to 128mV V = 0V to 128mV SENSE SENSE SENSE 10mV 100mV 100mV 0V 0V 0V 80mV 1V 1V 500mV 500mV 0V 0V 0V COUT= 0pF 1787 G12 COUT= 0pF 1787 G18 COUT = 1000pF 1787 G13 Step Response at Step Response at Step Response at V SENSE = 0V to –128mV VSENSE = 0V to –128mV V SENSE = –128mV to 128mV 0V 0V 1000V –100mV –100mV –100mV 0V 0V 1V –500mV –500mV 0V –1V –1V –1V COUT= 0 1787 G19 COUT=
in „Logger für Strom und Spannung im Selbstbau“ · Mikrocontroller und Digitale Elektronik ·
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PDF
LT_1787fc.pdf
U TYPICAL PERFORMANCE CHARACTERISTICS Step Response at Step Response at Step Response at V = 0V to 10mV V = 0V to 128mV V = 0V to 128mV SENSE SENSE SENSE 10mV 100mV 100mV 0V 0V 0V 80mV 1V 1V 500mV 500mV 0V 0V 0V COUT= 0pF 1787 G12 COUT= 0pF 1787 G18 COUT = 1000pF 1787 G13 Step Response at Step Response at Step Response at V SENSE = 0V to –128mV VSENSE = 0V to –128mV V SENSE = –128mV to 128mV 0V 0V 1000V –100mV –100mV –100mV 0V 0V 1V –500mV –500mV 0V –1V –1V –1V COUT= 0 1787 G19 COUT=
in „AD 8323 : Analog Digital Wandler 16-Bit, Parallel, 500kSPS“ · Analoge Elektronik und Schaltungstechnik ·
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PDF
UC1698u_Revision__1.5.pdf
recommended the LC material has the (R ROW / 2.7 + COM) x CROW < 0.8 S following characteristics: where (V90-V10/V10 = (VONV OFF)/VOFFx 0.72~0.80 l CROW : LCD loading capacitance of one row of pixels. It can where V 90d V 10are the LC characteristics, andON and LCD panel capacitance.ux-Rate, where C LCDis the
in „Defekte Heizungsregelung RC310 Display leuchtet“ · Haus & Smart Home ·
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PDF
DLx2416.pdf
contains memory, ASCII ROM decoder, multiplexing circuitry and drivers. Data entry is asyn- chronous and can be random. A display system can be built using any number of DLX2416s since each digit can be addressed independently and will continue to display the character last stored until replaced by another
in „(V) 4-Fach 5*7 Punktmatrix Osram DLR 2416, Bistabile Relais SDS, LED-Display 7-Seg. 4-Fach“ · Markt ·
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PDF
TMS320F2812_Datasheet.pdf
& CU NIPDAU Level-2-260C-1 YEAR no Sb/Br) TMS320F2811PBKA ACTIVE LQFP PBK 128 90 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR no Sb/Br) TMS320F2811PBKQ ACTIVE LQFP PBK 128 90 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR no Sb/Br) TMS320F2811PBKS ACTIVE LQFP PBK 128 90 Green (RoHS
in „Wieder eine Elektronik-Anfängerfrage“ · Mikrocontroller und Digitale Elektronik ·
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PDF
SAM-V71Q-SAM-V71N-SAM-V71J_Datasheet.pdf
following constraints must be respected: Data to be programmed must be contained in integer multiples of 128-bit address-aligned words. 128-bit words can be programmed only if all the corresponding bits in the Flash array are erased (at logical value 1). See Figure 22-9 "Partial Page Programming". Optimized
in „Atmel SAMV71 CAN FD“ · Mikrocontroller und Digitale Elektronik ·
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PDF
PDFresult.pdf
change at RC.1 Bit 2 = 1 Signal change at RC.2 Bit 3 = 1 Signal change at RC.3 5.20 Input Ports RD Port RD consists of pins RD.0 to RD.3. Each pin of port RD can be connected to a pull -high resistor, which is
in „Pocket Comm One µC“ · Mikrocontroller und Digitale Elektronik ·
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PDF
XC866_ds_v12.pdf
by the CPU instruction itself, but is derived from bit RMAP in the system control register SYSCON0 at address 8F H . To access SFRs in the mapped area, bit RMAP in SFR SYSCON0 must be set. Alternatively, the SFRs in the standard area can be accessed by clearing bit RMAP. The SFR area can be selected
in „Wie schnell ist der Counter eines 8-Bir µC's“ · Mikrocontroller und Digitale Elektronik ·
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Datei
mso5202d.txt
architecture S3C2416: IRQ Support S3C24XX DMA Driver, Copyright 2003-2006 Simtec Electronics DMA channel 0 at c4804000, irq 88 DMA channel 1 at c4804100, irq 89 DMA channel 2 at c4804200, irq 90 DMA channel 3 at c4804300, irq 91 DMA channel 4 at c4804400, irq 92 DMA channel 5 at c4804500, irq 93 bio: create
in „Tekway/Hantek/Voltcraft MSO“ · Mikrocontroller und Digitale Elektronik ·
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PDF
ads831.pdf
SFDR = 66dBFS –20 ) ) B –30 B –30 ( ( d –40 d –40 i i g –50 g –50 a a M –60 M –60 –70 –70 –80 –80 –90 –90 0 10 20 30 40 0 10 20 30 40 Frequency (MHz) Frequency (MHz) TWO-TONE INTERMODULATION DISTORTION DIFFERENTIAL LINEARITY ERROR 0 0.5 f1= 9.5MHz at –7dBFS fIN 10MHz –10 f2= 9.9MHz at –7dBFS IMD(3) = –57dBc ) –20 0.25 S F –30 ) d S e –40 ( d E 0 i –50 D g a –60 M –0.25 –70 –80 –90 –0.5 0 10 20 30 40 0 64 128 192 256 Frequency (MHz) Output Code ADS831 5 SBAS087A TYPICAL CHARACTERISTICS (Cont.) At TA= full specified temperature range, single-ended input range = 1.5V to 3.5V, sampling
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PDF
ZigBit_OEM_Module_Product_Datasheet.pdf
can be connected directly to the module, thus expanding the existing set of sensor interfaces. The over-the-air control via AT-commands makes debugging and network testing easier. It also enables wireless
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PDF
ADS1293_3_Kanal_24BIT_EKG_SPI_Dez_2014.pdf
Time Measured at 10% / 90% 15 ns point OZD SDO Tristate-to-Driven Time Measured at 10% / 90% 15 ns point OD SDO Output Delay Time 10 ns t CSB Set-up Time 5 ns CSS CSH CSB Hold Time 5 ns IAG Inter-Access Gap 10 ns t Data
in „Warum soll ADS1293 mit einem 4,096 MHz Quarz betrieben werden?“ · Mikrocontroller und Digitale Elektronik ·
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PDF
2_gameboy.pdf
128 to 127 (i.e. pattern #0 lies at address $9000). The Tile Data Table address for the background can be selected via LCDC register. BG Map Attributes (CGB Mode only) In CGB Mode, an additional map of
in „(Chip8 / gameboy) Emulator für AVR AVR32“ · Mikrocontroller und Digitale Elektronik ·
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PDF
AT89C51CC03.pdf
message object, EICHi, Enable reception interrupt, ENRX. To enable an interrupt on message object error: 90 AT89C51CC03 4182D–CAN–03/04 AT89C51CC03 Enable General CAN IT in the interrupt system register, Enable interrupt by message object, EICHi, Enable interrupt on error, ENERCH. To enable an interrupt on
in „Einstellung Akzeptanzfilter - Programm / Tool gesucht“ · Mikrocontroller und Digitale Elektronik ·
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PDF
AK5388AEQ.pdf
to “L”. BICK should be fixed to2128fs. In the slave mode, “H” time and “L” time of LRCK should be at least 1/128fs. In master mode, “H” time (“L” time at I S mode) of LRCK is 1/4fs (typ). TDM128 mode supports up to 192kHz sampling. Cautions for when using TDM128 mode in slave mode When setting the AK5388A
in „Audio-ADC - Taktfrequenzen I2S“ · Mikrocontroller und Digitale Elektronik ·
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PDF
DLO2416.pdf
Luminous (4.06 .51) .100 16 pl.tensity Code • Dot Matrix Replacement for DL2416T (2.41) (.46) (2.54) at Seating Plane • 0.200" 5 x 7 Dot Matrix Characters ref. .002 (.05) 18 pl. • 128 Special ASCII Characters for English, German, TOLERANCE: XXX .01 (.25) Italian, Swedish, Danish, and Norwegian Languages
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PDF
MBI5040_Datasheet_V1.00-English.pdf
individually calibrate the deviated brightness and color of LEDs. Moreover, the preset current of MBI5040 can be further adjusted by 128 steps for LED global brightness adjustment. With in-message error detection, MBI5039 can detect individual LED for both open- and short-circuit errors on-the-fly without extra
in „TLC5940 (PWM driver) | Kauftip!“ · Mikrocontroller und Digitale Elektronik ·
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PDF
2128wichtig.pdf
Pool (ORP) — Electrically Erasable and Reprogrammable E 0139(9A)/2128 — Non-Volatile N — 100% Tested at Time of Manufacture Description — Unused Product Term Shutdown Saves Power R The ispLSI 2128 and 2128A are High Density Program- • IN-SYSTEM PROGRAMMABLE maOleLogicDevices.Thedevicescontains128Registers
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PDF
90s1200.pdf
Oscillator as the clock source when programmed (“0”). The AT90S1200 is normally shipped with this bit unprogrammed (“1”). Parts with this bit programmed can be ordered as AT90S1200A. The RCEN-bit can be changed by parallel programming only. When using the On-chip
in „Unterschied zwischen einzelnen avr´s“ · Mikrocontroller und Digitale Elektronik ·
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PDF
HM17CM4096.pdf
display 16 gradations can be selected from 32 gradations by PWM control Black/White display 162 (128 3) bits display is possible 8 bit BUS interface directly connectable with 68 / 80 series CPU RAM data length 8 BIT / 16 BIT
in „LCD Graphik Display mit µController ansteuern“ · Mikrocontroller und Digitale Elektronik ·
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PDF
LED_Matrix_Controller_V5.pdf
Set pix planes 82 PIXMASK ORIENTATION Set the number of pixel planes used in LED controller. Value can be between 4 and 8 If PIXMASK=8 you have full 24bit RGB color but slightly low refresh rate. Other values then 4..8 defaults to 8. Sets the image orientation in 90° steps. 0 = 0°, 1=90° ... [not yet
in „Universeller 64x64 LED-Matrix Controller“ · Projekte & Code ·
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PDF
TE28F128J3D75.pdf
as one-hundred-twenty-eight 128- Kbyte erase blocks • 8 Mbytes or 4 Mword (64-Mbit), organized as sixty-four 128-Kbyte erase blocks • 4 Mbytes or 2 Mword (32-Mbit), organized as thirty-two 128-Kbyte erase blocks These devices can
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PDF
AudioCodec-WM8731_8731L.pdf
driver. The • Audio Performance WM8731/L is designed specifically for portable MP3 audio - ADC SNR 90dB (‘A’ weighted) at 3.3V, 85dB at 1.8V and speech players and recorders. The WM8731 is also - DAC SNR 100dB (‘A’ weighted) at 3.3V, 95dB at 1.8V ideal for MD, CD-RW machines and DAT recorders. • Low
in „Elektret-Mikrofon-Verstärker-->Line-In mit assymmetrischer Vers.Sp.“ · Mikrocontroller und Digitale Elektronik ·
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PDF
Datasheet_DM00039193-490390.pdf
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89 Table 60. IWDG min/max timeout period at 40 kHz (LSI). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90 Table 61. WWDG min/max timeout value at 48 MHz (PCLK). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
in „STM32F05 SPI 3 Wire Verbindung mit Accelerometer“ · Mikrocontroller und Digitale Elektronik ·
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PDF
WM8731_WM8731L.pdf
driver. The • Audio Performance WM8731/L is designed specifically for portable MP3 audio - ADC SNR 90dB (‘A’ weighted) at 3.3V, 85dB at 1.8V and speech players and recorders. The WM8731 is also - DAC SNR 100dB (‘A’ weighted) at 3.3V, 95dB at 1.8V ideal for MD, CD-RW machines and DAT recorders. • Low
in „Altera DE1 Board: Frage zu I2C Bus Adresse vom Audiocodec.“ · FPGA, VHDL & Co. ·