1 | #include "stm32f10x_lib.h"
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2 | #include "bits.h"
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3 |
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4 | //--------------- Private Functions ---------------------------------------------
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5 |
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6 | void nmi_handler(void);
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7 | void hardfault_handler(void);
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8 | int main(void);
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9 | void myDelay(unsigned long delay );
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10 | void RCC_Configuration(void);
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11 | void GPIO_Configuration(void);
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12 | void NVIC_Configuration(void);
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13 |
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14 |
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15 | //-------------------------------------------------------------------------------
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16 |
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17 | // VARIABLES
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18 |
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19 | TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
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20 |
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21 | TIM_OCInitTypeDef TIM_OCInitStructure;
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22 | u16 CCR1_Val = 500;
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23 | u16 CCR2_Val = 375;
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24 | u16 CCR3_Val = 250;
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25 | u16 CCR4_Val = 125;
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26 | ErrorStatus HSEStartUpStatus;
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27 |
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28 | GPIO_InitTypeDef GPIO_InitStructure;
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29 |
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30 | //------------------------- MAIN -----------------------------------------------
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31 |
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32 | int main(void)
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33 | {
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34 | #ifdef DEBUG
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35 | debug();
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36 | #endif
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37 |
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38 | // System Clocks Configuration
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39 | RCC_Configuration();
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40 |
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41 | // NVIC Configuration
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42 | NVIC_Configuration();
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43 |
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44 | // GPIO Configuration
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45 | GPIO_Configuration();
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46 |
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47 | /* -----------------------------------------------------------------------
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48 | TIM3 Configuration: generate 4 PWM signals with 4 different duty cycles:
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49 | TIM3CLK = 36 MHz, Prescaler = 0x0, TIM3 counter clock = 36 MHz
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50 | TIM3 ARR Register = 999 => TIM3 Frequency = TIM3 counter clock/(ARR + 1)
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51 | TIM3 Frequency = 36 KHz.
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52 | TIM3 Channel1 duty cycle = (TIM3_CCR1/ TIM3_ARR)* 100 = 50%
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53 | TIM3 Channel2 duty cycle = (TIM3_CCR2/ TIM3_ARR)* 100 = 37.5%
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54 | TIM3 Channel3 duty cycle = (TIM3_CCR3/ TIM3_ARR)* 100 = 25%
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55 | TIM3 Channel4 duty cycle = (TIM3_CCR4/ TIM3_ARR)* 100 = 12.5%
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56 | ----------------------------------------------------------------------- */
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57 |
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58 | // Time base configuration
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59 | TIM_TimeBaseStructure.TIM_Period = 999;
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60 | TIM_TimeBaseStructure.TIM_Prescaler = 0;
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61 | TIM_TimeBaseStructure.TIM_ClockDivision = 0;
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62 | TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
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63 |
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64 | TIM_TimeBaseInit(TIM3, &TIM_TimeBaseStructure);
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65 |
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66 | // PWM1 Mode configuration: Channel1
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67 | TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;
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68 | TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
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69 | TIM_OCInitStructure.TIM_Pulse = CCR1_Val;
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70 | TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;
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71 |
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72 | TIM_OC1Init(TIM3, &TIM_OCInitStructure);
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73 |
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74 | TIM_OC1PreloadConfig(TIM3, TIM_OCPreload_Enable);
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75 |
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76 | // PWM1 Mode configuration: Channel2
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77 | TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
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78 | TIM_OCInitStructure.TIM_Pulse = CCR2_Val;
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79 |
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80 | TIM_OC2Init(TIM3, &TIM_OCInitStructure);
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81 |
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82 | TIM_OC2PreloadConfig(TIM3, TIM_OCPreload_Enable);
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83 |
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84 | // PWM1 Mode configuration: Channel3
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85 | TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
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86 | TIM_OCInitStructure.TIM_Pulse = CCR3_Val;
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87 |
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88 | TIM_OC3Init(TIM3, &TIM_OCInitStructure);
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89 |
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90 | TIM_OC3PreloadConfig(TIM3, TIM_OCPreload_Enable);
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91 |
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92 | // PWM1 Mode configuration: Channel4
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93 | TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
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94 | TIM_OCInitStructure.TIM_Pulse = CCR4_Val;
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95 |
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96 | TIM_OC4Init(TIM3, &TIM_OCInitStructure);
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97 |
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98 | TIM_OC4PreloadConfig(TIM3, TIM_OCPreload_Enable);
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99 |
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100 | TIM_ARRPreloadConfig(TIM3, ENABLE);
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101 |
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102 | // TIM3 enable counter
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103 | TIM_Cmd(TIM3, ENABLE);
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104 |
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105 | while (1)
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106 | {}
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107 |
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108 |
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109 | }
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110 |
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111 | //SUB Routines-----------------------------------------------------------------
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112 |
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113 | void nmi_handler(void)
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114 | {
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115 | return ;
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116 | }
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117 |
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118 | void hardfault_handler(void)
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119 | {
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120 | return ;
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121 | }
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122 | //Functions definitions
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123 | void myDelay(unsigned long delay )
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124 | {
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125 | while(delay) delay--;
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126 | }
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127 |
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128 | /*************************************************************************
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129 | * Function Name: Clk_Init
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130 | * Parameters: Int32U Frequency
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131 | * Return: Int32U
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132 | *
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133 | * Description: Init clock system
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134 | *
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135 | *************************************************************************/
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136 |
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137 | void RCC_Configuration (void)
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138 | {
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139 | // RCC system reset(for debug purpose)
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140 | RCC_DeInit();
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141 |
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142 | // Enable HSE
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143 | RCC_HSEConfig(RCC_HSE_ON);
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144 |
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145 | // Wait till HSE is ready
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146 | HSEStartUpStatus = RCC_WaitForHSEStartUp();
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147 |
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148 | if (HSEStartUpStatus == SUCCESS)
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149 | {
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150 | // Enable Prefetch Buffer
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151 | FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
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152 |
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153 | // Flash 2 wait state
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154 | FLASH_SetLatency(FLASH_Latency_2);
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155 |
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156 | // HCLK = SYSCLK
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157 | RCC_HCLKConfig(RCC_SYSCLK_Div1);
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158 |
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159 | // PCLK2 = HCLK
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160 | RCC_PCLK2Config(RCC_HCLK_Div1);
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161 |
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162 | // PCLK1 = HCLK/4
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163 | RCC_PCLK1Config(RCC_HCLK_Div4);
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164 |
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165 | // PLLCLK = 8MHz * 9 = 72 MHz
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166 | RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9);
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167 |
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168 | // Enable PLL
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169 | RCC_PLLCmd(ENABLE);
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170 |
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171 | // Wait till PLL is ready
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172 | while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET)
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173 | {}
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174 |
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175 | // Select PLL as system clock source
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176 | RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
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177 |
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178 | // Wait till PLL is used as system clock source
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179 | while (RCC_GetSYSCLKSource() != 0x08)
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180 | {}
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181 | }
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182 |
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183 | // TIM3 clock enable
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184 | RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM3, ENABLE);
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185 |
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186 | // GPIOA and GPIOB clock enable
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187 | RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB, ENABLE);
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188 |
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189 | }
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190 |
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191 |
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192 |
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193 | void GPIO_Configuration(void)
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194 | {
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195 | GPIO_InitTypeDef GPIO_InitStructure;
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196 |
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197 | //GPIOA Configuration: TIM3 channel 1 and 2 as alternate function push-pull
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198 | GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6 | GPIO_Pin_7;
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199 | GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
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200 | GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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201 |
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202 | GPIO_Init(GPIOA, &GPIO_InitStructure);
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203 |
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204 | //GPIOB Configuration: TIM3 channel 3 and 4 as alternate function push-pull
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205 | GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1;
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206 |
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207 | GPIO_Init(GPIOB, &GPIO_InitStructure);
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208 |
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209 | }
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210 |
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211 | /*******************************************************************************
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212 | * Function Name : NVIC_Configuration
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213 | * Description : Configures Vector Table base location.
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214 | * Input : None
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215 | * Output : None
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216 | * Return : None
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217 | *******************************************************************************/
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218 | void NVIC_Configuration(void)
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219 | {
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220 | #ifdef VECT_TAB_RAM
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221 | /* Set the Vector Table base location at 0x20000000 */
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222 | NVIC_SetVectorTable(NVIC_VectTab_RAM, 0x0);
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223 | #else /* VECT_TAB_FLASH */
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224 | /* Set the Vector Table base location at 0x08000000 */
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225 | NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x0);
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226 | #endif
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227 | }
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228 |
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229 | #ifdef DEBUG
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230 | /*******************************************************************************
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231 | * Function Name : assert_failed
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232 | * Description : Reports the name of the source file and the source line number
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233 | * where the assert_param error has occurred.
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234 | * Input : - file: pointer to the source file name
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235 | * - line: assert_param error line source number
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236 | * Output : None
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237 | * Return : None
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238 | *******************************************************************************/
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239 | void assert_failed(u8* file, u32 line)
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240 | {
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241 | /* User can add his own implementation to report the file name and line number,
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242 | ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
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243 |
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244 | while (1)
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245 | {}
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246 | }
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247 | #endif
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